A Technology-Agnostic MTJ SPICE Model with User-Defined Dimensions for STT-MRAM Scalability Studies

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A Technology-Agnostic MTJ SPICE Model with User-Defined Dimensions for STT-MRAM Scalability Studies Model download website: mtj.umn.edu Jongyeon Kim 1, An Chen 2, Behtash Behin-Aein 2, Saurabh Kumar 1, Jian-Ping Wang 1, and Chris H. Kim 1 1 University of Minnesota, Minneapolis, MN 55455 USA 2 GLOBALFOUNDRIES, Sunnyvale, CA 94085 USA kimx2889@umn.edu 1

Overview Spin-Transfer Torque (STT) MRAM: Basic Concepts Magnetic Tunnel Junction (MTJ): Key Physics to Be Modeled Model Framework and Implementation Case Study: STT-MRAM Scalability and Variability Simulations Summary 2

STT-MRAM Basics STT-MRAM bit-cell structure and STT switching [1] * SRAM: ~120F 2 Type Stand-alone Embedded W TX Minimum 18F 1T-1MTJ 6F 2 57F 2 2T-1MTJ 8F 2 40F 2 1T-1MTJ layout 2T-1MTJ layout Bit-cell area comparison Key features: Nonvolatile, compact, CMOS compatible, high endurance [1] R. Takemura, JSSC 2010 (Hitachi) 3

Target Applications & Recent Progress [1] STT-MRAM target applications Low power main memory Embedded cache memory: - No standby power, compact size - Low latency due to reduced global interconnect delay Recent demonstration by TDK [2] 8Mbits embedded STT-MRAM 90nm CMOS/ 50F 2 1T-1MTJ 150% TMR, 4/5ns Read/Write Less than 1ppm bit error rate for 10yr retention/125c Chip micrograph and write shmoos [1] K. Lee, TMAG 2011 (Qualcomm) [2] G. Jan, VLSI 2014 (TDK) 4

STT-MRAM Scaling Challenges [1] Read-disturb One critical issue is the conflict between read and write operations which becomes more severe with MTJ scaling The development of a scalable MTJ SPICE model is a key aspect of exploring the potential of STT-MRAM in future technology nodes [1] K. Ono, IEDM 2009 (Hitachi) 5

Key MTJ Physics to Be Modeled [1] = Eb k T B = H k M sv 2k T B : Thermal stability factor E b : Energy barrier, V: Magnet volume, H k : Anisotropy field, M s : Saturation magnetization Thermal stability and magnetic anisotropy Thermal stability (Δ) determines the degree of nonvolatility Thermal stability is defined as E b with respect to thermal fluctuation H k decides the energetic preference of spin direction (i.e. easy axis): In-plane or perpendicular magnetic anisotropy [1] R. Takemura, JSSC 2003 (Hitachi) 6

Key MTJ Physics to Be Modeled [1] H K M STT-induced dynamic spin motion Thermally assisted switching region Switching current vs. pulse width [1] J. Sun, Nature 2003 (IBM) Temperature-dependent R-V curve *TMR: Tunneling magnetoresistance ratio 7

Proposed Technology-Agnostic SPICE-Compatible MTJ Model Overall model framework User-defined input parameters Covers all types of anisotropy sources (shape, crystal, and interface) Dimension-dependent anisotropy field enables scalability and variability analyses Changing the initial angle parameter allows convenient simulation of MTJ switching probability 8

SPICE Implementation 2 1+ α d M γ dt = M H Keff α M ( M H Keff ) + A stt M ( M M p ), A stt hpj = 2et M F s V( M y) PRC y I DMP, y I STT, y 1+α 2 C= γ I, V ) ( M y 0 V( A stt ) I MTJ h R = 2 PF ewlt M s V( H Kefx ) V H ) V H ) ( Kefy ( Kefz SPICE implementation of LLG equation (only y-coordinate shown for simplicity) Internal variables are represented as node voltages using circuit elements Differential behavior of magnetization by emulating an incremental charge build-up over time in a capacitor: I=C dv/dt 9

Model Verification Temp. dependency of material parameters In-plane switching Perpendicular switching Comparison with measurement data [1], [2] MTJ switching characteristics [1] H. Zhao, JAP 2011 (UMN) [2] C. J. Lin, IEDM 2009 (TSMC) 10

Overview Spin-Transfer Torque (STT) MRAM: Basic Concepts Magnetic Tunnel Junction (MTJ): Key Physics to Be Modeled Model Framework and Implementation Case Study: STT-MRAM Scalability and Variability Simulations Summary 11

Scalability Study: MTJ Options 1. In-plane MTJ (IMTJ) Geometry dependent shape anisotropy Longer dimension Easier magnetization high polarization but high switching current due to H dz J C 0 = 2eαM S t F ( H K + 2πM hη S ) J C0 2eαM t S F = ( HK 4πM hη S ) 2. Crystal perpendicular MTJ (c-pmtj) Crystal perpendicular anisotropy from high-k u materials (FePt, FePd, etc) H dz reduces switching current Low polarization, high damping 3. Interface perpendicular MTJ (i-pmtj) Interface perpendicular anisotropy in thin CoFeB CoFeB turns from in-plane to perpendicular when t F < t c (~1.5nm) Which MTJ technology is best from a scaling perspective? 12

Scalability Study: I c Scaling Trend MTJ scaling methods under iso-retention condition MTJ scaling scenario Critical switching current (I c ) trend MTJ scaling based on iso-retention using realistic materials Interface PMTJ shows the superior switching efficiency over the scaling 13

Variability Study: Simulation Setup CMOS 65nm, i-pmtj (Δ=70), 85ºC Read path Write path................. STT-MRAM column circuit Overall memory operation Optimized bit-cell connection for symmetric current driving Bi-directional write current driver, dual-voltage WL driver Parallelizing read current, Mid-point reference circuit using I Ref =(I AP +I P )/2 14

Variability Study: Write and Read Delays Percentile (%) Percentile (%) 30 20 10 0 3.5 30 20 10 3.5 0 0 0 4.5 0.5 5.5 1 STT-MRAM 6σ write delay VDD (1.2V): 7.49ns VDD+0.1V: 6.49ns VDD+0.2V: 5.80ns VDD+0.3V: 5.29ns 4.5 5.5 6.5 7.5 Write delay (ns) STT-MRAM 6σ sensing delay TMR 100%: 1.32ns TMR 200%: 0.82ns TMR 300%: 0.67ns 0.5 1.0 1.5 < 2.0 Sensing delay (ns) CMOS 65nm, i-pmtj (Δ=70), 85ºC 6.5 1.5 Read failures 7.5 2 Write and sensing delay distributions with 6σ values Includes realistic variation for both MTJ (i.e. W, L, t F, RA) and CMOS (i.e. transistor W, L, V th, T ox ) 15

Model Download Website http://mtj.umn.edu 16

Summary We have developed a technology-agnostic MTJ model for benchmarking future STT-MRAMs The proposed compact model is useful for studying the scalability and variability of different MTJ devices and material options. Model available online at mtj.umn.edu Acknowledgements This work was supported in part by C-SPIN, one of six centers of STARnet, a Semiconductor Research Corporation program, sponsored by MARCO and DARPA. 17