EE C45 ME C8 Introducton to MEM Desgn Fall 7 Prof. Clark T.C. Nguyen Dept. of Electrcal Engneerng & Computer cences Unersty of Calforna at Berkeley Berkeley, C 947 Dscusson: eew of Op mps EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8
eadng: entura Chpt. 4 Lecture Topcs: Ideal Op mps NonIdeal Op mps Fnte gan & bandwdth Input offset oltage Lecture Outlne EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8
Ideal Operatonal mplfers EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 3
Ideal Op mp Equalent Crcut of an Ideal Op mp: n ngleended output ( ) ( ) Dfferental nput ( ) VoltageControlled Voltage ource (VCV) Propertes of Ideal Op mps:. n 4.. 3., assumng fnte 5. Why? EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 4
Ideal Op mp (cont) Propertes of Ideal Op mps: n. 4.. 3. 5., assumng fnte Why? Because for ( ) fnte ( fnte ) rtual short crcut (rtual ground) Bg assumpton! How can we assume ths? We can assume ths only when there s an approprate negate feedback path! EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 5
Negate Feedback Δ 4 Δ ε ε a Δ ε 5 Δ β β 3 Δ a a( ε β ) ε β ( a β ) a a aβ β β [ a ] fnte! Where could be a current, oltage, dsplacement, etc., Negate feedback acts to oppose or subtract from nput. a aβ Oerall transfer functon. (When there s negate FB around the amplfer.) fnte! EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 6
Negate Feedback Comments:. Negate FB can nsure fnte een wth a.. Oerall gan dependent (or oerall T.F.) dependent only on external components. (e.g., β). 3. Oerall (Closedloop) gan ( o / ) s ndependent of amplfer gan a. Very mportant, t snce amplfers usng transstors t can be desgned to hae large gan, but t s hard to get an exact gan..e., f you re shootng for a 5,, you mght get 47, or 6, nstead. Comment 3 makes ths less consequental. EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 7
Poste Feedback Contrast wth Poste Feedback: Δ Δ a Δ Output blows up! (for aβ β > ) Δ β β Wll be the case for a. If β s a bandpass β bquad transfer functon get oscllaton at the resonance frequency ω ο ω But for a bounded, controllable functon, need negate FB around the op amp EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 8
Inertng mplfer Δ Δ OV Vrtual ground. Verfy that there s negate FB. fnte Δ Beneft: ny shunt C at ths node wll be grounded d out.. node attached to () termnal s rtual 3. ground. NOTE: Gan dependent only on & (external components), not on the op amp gan. EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 9
Flp the Op mp round Put the feedback around the () termnal and see what happens Δ Δ Δ Ths s not () FB fnte, Cannot analyze usng the deal op amp method Crcut wll ral out L L or L dependng on ntal condtons L ( ) ( ) EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8
Transresstance mplfer Take away OV Vrtual ground gan, shunt C at ths node wll be grounded out.. Verfy that there s neg. FB yes, snce same FB as nertng amplfer. Thus, o fnte () termnal s rtual ground 3. n nertng amplfer s just a transresstance amplfer wth an to conert oltage to current! EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8
Integrator eplace wth C C OV Vrtual ground gan, shunt elements at ths node wll be grounded out.. Verfy that there s neg. FB need a large resstor to DC connect the output and () termnal. Wth, o fnte () termnal rtual gnd 3. sc sc sc EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8
NonInertng mplfer. Verfy that there s negate FB same feedback crcut as for nertng amplfer, so neg. FB. fnte 3. nalyss: ( ) gan, gan depends only on & (external or ratoed components), not on the op amp gan. EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 3
Unty Gan Buffer NonInertng mplfer Unty Gan Buffer EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 4
NonIdeal Operatonal mplfers EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 5
ctual Op mps re Not Ideal ctual op amps, of course, are not deal; rather, they Generate nose Hae fnte gan, o Hae fnte bandwdth, ω b Hae fnte nput resstance, Hae fnte nput capactance, C Hae fnte output resstance, o Hae an offset oltage V O between ther () and () termnals Hae nput bas currents Hae an offset I O between the bas currents nto the () and () termnals Hae fnte slew rate Hae fnte output swng (goerned by the supply oltage used, L to L) nd what s worse: ll of the aboe can be temperature (or otherwse enronmentally) dependent! EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 6
Fnte Op mp Gan and Bandwdth For an deal op amp: In realty, the gan s gen by: For ω>>ω b : ω b ωt ( s) s ω s ( ) log ( jω) ( ) s b () s s ω b Fnte Gan Fnte Bandwdth Integrator w/ tme const. /ω T Ths pole actually desgned n for some op amps. Openloop response of the amplfer. db/dec 3 db frequency Unty gan frequency: ωt ω b ωb ωt ω EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 7
Fnte Gan/BW of Op mps (cont.) Example: Inertng mplfer Negate FB Block Dagram ε I α I (s) β I gnals from and are summed at ths node! How much gets to ths node s determned by the alues of α and β. EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 8
Frequency response of Closed Loop mplfers Example: NonInertng mplfer ε β ε β Negate FB Block Dagram ε I ε (s) β β β β β β EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 9
Fnte Gan BW of Op mps Brute Force Deraton. ( ) I ( )( ) ( ) ( ) I ( ) ± ( ) ( ) I ( ) ( ) I I ( ) ( ) I I EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 ( ) I
Fnte Gan BW of Op mps (cont.) Brute Force Deraton (cont.). ( ) I ( ) I ( ) I ( ) EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8
Fnte Gan BW of Op mps (cont.) Brute Force Deraton (cont.). ( ) I ( ) ( ) ( ) ( ) w w b I b w b EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8
Fnte Gan BW of Op mps (cont.) Brute Force Deraton (cont.). ( ) I w w b b w b EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 3 w b
Fnte Gan/BW of Op mps ecall from our preous feedback analyss: ( ) ( ) β ( ) ( ) w b ( ) ( ) Δ "loop gan" w b ( ) I β β w w b b closedloop Frequency dc gan shapng term term β I w β ( ) b T β T β "loop gan"at w EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 4 ( ) (.e., at dc)
Input Offset Voltage EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 5
Input Offset Voltage V Input Offset Voltage, V : ( ) Ideal case: ealty: (usually, L or L : t rals out!) Why? Internal msmatches wthn the op amp cause a dc offset. Model ths wth an equalent nput offset oltage V. V V Typcally, V mv 5mV EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 6
Effect of V on Op mp Crcuts Example: NonInertng mplfer V V V e.g., 9, V 5mV V 5 mv (not so bad ) EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 7
Effect of V on Op mp Crcuts (cont.) Example: Integrator V V f C C To fx ths, place a resstor n shunt wth the C then: f V V dt C t V V dt C t V C C t t Wll contnue to ncrease untl op amp saturates t EE C45: Introducton to MEM Desgn Dscusson Mat ls C. Nguyen //8 8