S J TXR0 TXR TXR TXR[:0] TXR TXR LK TX[:0] TX0 TX TX0 TX TX TX TX TX TX TX TX TX TX TX TX TX R 0K R 0K J J0 PIV R 0K TXPR R0. H/E0 H/E H/E TXLV TXSO J J HRST HLK HPERR HGNT HISEL HEVSEL HSTOP HTRY HIRY HFRME HPR H/E H[:0] H H0 H H H H H H H H H H0 H H H H H H H H H H0 H H H H H H H H H H0 SR_LR SR_LR[:0] SR_LR0 SR_LR SR_LR[:] SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR0 SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LT SR_LT[:0] SR_LT0 SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT0 SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT0 SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT0 R. R R R R0 R R R R X 0 S SL WP V U TE PPROVLS ONTRT. RWN HEKE ENGINEER SHEMTI IENT. RWING. SLE: NE PPROVE TE LTR ZONE ISIONS INITIL RELESE ESRIPTION MINSPEE TEHLOGIES, IN. OULER, O 00 /0 /0 N SOTT /PROJET/P/OR-0/T00-0-0.00P T00-X00 P: T00-0-0 --00_0: N OR N-X0 EVM J00 J J J J J J J J0 G J J J0 SR-STT0 SR-STT R.K SYSLK. R MHZ.0 0K R TO-TI PRST PHY_INT HSERR HINT HREQ PS PWNR TK PITI V VSS OUT Y J0 M M M[:0] M M0.K R0 J PS J RXLV RXSO RXPR R 0 R 0 RXR RXR[:0] RXR0 RXR RXR RXR J0 J0 MS[:0] MS MS0 SL RX[:0] RX RX0 RX RX RX RX RX RX RX RX RX0 RX RX RX RX RX. R J J SYSLKX LK RXEN SRUTOPRXLK SPRE- SPRE- SPRE- SPRE- SPRE- SPRE- SPRE-E LKX LK EEPWR FRFG0 FRFG FRTRL/RXLK H0 H H0 H H H H H H H H H H H0 H H H H H H H H H H H0 H H H H H H H HLK HFIFOR0 HFIFOR HFIFOR HFIFOR HFIFOR HFIFOR HFIFOWR0 HFIFOWR HFIFOWR HFIFOWR HFIFOWR HFIFOWR HISEL HPR LR0 LR LR0 LR LR LR LR LR LR LR LR LR LR LR LR LR LR LR LR LT0 LT LT0 LT LT LT LT LT LT LT LT LT LT LT0 LT LT LT LT LT LT LT LT LT LT LT0 LT LT LT LT LT LT LT PR0 PR PSEL0 PSEL PIV PRO PWNR RM RXR0 RXR RXR RXR RXR RX0 RX RX0 RX RX RX RX RX RX RX RX RX RX RX RX RX RXMRK RXPR SHREF SL S STT0 STT SYSLK TLK TI TO SPRE- SPRE-F TXR0 TXR TXR TXR TXR TX0 TX TX0 TX TX TX TX TX TX TX TX TX TX TX TX TX TXMRK TXPR H/E0 H/E H/E H/E HEVSEL HENUM HFRME HGNT HINT HIRY HLE HPERR HREQ HRST HSERR HSTOP HSWITH HTRY MS0 MS MS MS M0 M M M MWR PS PE0 PE PE PE PLST PS PEN PFIL PINT PRY PRST PWIT RXEN RXFLG TXEN TXFLG Serial EEPROM Test Signals Interface Processor TM Physical Local us Local us Interface Interface oundary Scan Memory Host PI Interface Signals locks/status HSM N SPRE- VGG UTOPI TXLK U E N L E F H H H J J J P P P R R R R T U U V V V W E W W E F F F G G N E F T K Y Y Y W W W V V V U U U T T R R R R P P P N Y 0 0 0 G E F E F F F E F E F E F E 0 E F F M F E F E F E E F 0 0 E0 F0 E F F E F K N T L M Y M L L Y Y L L F M K K J J H H H G G J 0 E F E TXEN SRUTOPTXLK R 0 R0 0 PIV tied high = v signaling PI VOLTGE SELET PIV tied low =.v signaling N LL OPEN = UL GROUN = UL avid Jones (0)-0 JP JP J RY J
J J0 J TX0 J HP-TX0 TX J HP-TX TX J HP-TX TX J HP-TX TX J HP-TX TX J HP-TX TX HP-TX J0 TX J HP-TX TX J HP-TX TX J HP-TX TX0 J HP-TX0 TX J HP-TX TX J HP-TX TX J HP-TX TX J HP-TX TX J HP-TX TXPR J0 HP-TXPR TXSO J HP-TXSO TXEN J HP-TXEN TXR0 J HP-TXR0 TXR J HP-TXR TXR J HP-TXR TXR J HP-TXR TXR J HP-TXR TXLVJ0 HP-TXLV RX0 RX RX RX RX RX RX RX RX RX RX0 RX RX RX RX RX RXPR RXSO RXEN RXR0 RXR RXR RXR RXR RXLV J J J J J J J J0 J J J J J J J J J J J J HP-RX0 HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX0 HP-RX HP-RX HP-RX HP-RX HP-RX HP-RXPR J HP-RXSO HP-RXEN HP-RXR0 HP-RXR HP-RXR HP-RXR HP-RXR HP-RXLV LK U LKIN FIN LK LK LK LK V V LK LK LK LK0 S S ISM- SOI.0 N or N EVM ONFIGURTION JUMPER J0-J LOSE OPEN J0- J LOSE J-J LOSE OPEN OPEN R.K 0 R.K 0 R.K 0 J0 J J J J J J J J0 J J J J J J J J J0 J HP-UTOPTXLK HP-UTOPRXLK J0 TX 0 0 0 0 0 0 0 0 J0 RX 0 0 0 0 0 0 0 0 Polarity Peg Polarity Peg STT0 STT STT STT STT STT STT STT LF PF ZERO ELY UFFER R 0 R 0 R 0 R 0 R 0 R 0 R 0 R 0 R0 0 R 0 R 0 SMT 00 SMT 00 SMT 00 SMT 00 RE SMT 00 SMT 00 SMT 00 SMT 00 0 SMT 00 SMT 00 R0 R 0K.0 R R R GREEN LO RI-P IS-P RI-L IS-L LOP OOF LOS LF PF PWR UTOPRXLK UTOPTXLK SRUTOPRXLK SRUTOPTXLK TK PITO HLK HREQ H H H H H/E H H H H H/E HIRY HEVSEL HPERR HSERR H/E H H H0 H H H H H SLE: NE TK TO INT INT PRSNT 0RSV PRSNT RSV LK REQ 0 _E 0 _E IRY EVSEL LOK 0PERR SERR _E 0 0 0 0 0 0 0K HJ IENT. /0 PI ONNETOR KEY TI INT INT RSV RSV RSV RST GNT RSV 00 ISEL 0 FRME TRY STOP 0 SONE SO PR 0 _E0 0 0 0 00 REQ 0 RWING. PITI HINT HRST HGNT H0 H H H HISEL H H0 H H HFRME HTRY HSTOP HPR H H H H H/E0 H H H H0 T00-X00 --00_: T00-0-0.00P
J-N R J-N 0..UF 0PF Y R R X0- UF.0UF V. 0PF PLRXPFP LRXPFN L0 OUT M LTXPFP LTXPFN L LOTE NER TRNSEIVER VSS G PLL J YTELK P PLLLK N/ L J R.MHZ N/ L J0 00 G see TE M Jumper installed at for J ONESEIN N N ONESEOUT J KHZIN LOK & N R UTOPI testing, or when J P TXFRMEREF TXSERL ONTROL P PRST M RXFRMEREF J Y and J are +v parts 0 RESET N NJ VGG VGG J L SIGET R J TXLKI- L TXLKI- TXLKI+ K TXLKI+ PM TXLKO- P J RXT- P0 RXT- TXLKO+ M M0 RXT+ TXT- P RXT+ TXT- RXLK- K RXLK- TXT+ N J TXT+ LOTE NER THE X0 J RXLK+ L RXLK+ TX R SYN M SYN INT PHY_INT LOTE NER SYSLK L MLK T[] G LT R 00 R R PS S T[] H LT X0 MT-RJ SFF J do not stuff N PS J PWNR W/R T[] H LT 0 TRNEIVER 0 0 S T[] J LT R MS J LR E R[] MIRO RX E T[] J LT LR 0 R[] F T[] K LT R LOTE NER THE TRNSEIVER LR R[] LR F R[] T[] K LT do not stuff LR F R[] T[0] K LT0 LR F R[] H RY LT[:0] R LR0 G MRY LR[:0] R[0] 0 T- T+ N VEE V S V VEE.0 L UH + 0 Top bracket ottom bracket R+ R- L UH R.0.0. L E 00 R. L E 00 V V 0 SYN J UTOPI US WITH bit bit UTOPI L L - N - N - N - N J JP JP SSEMLY TE: N REQUIRES IT & L SETTINGS. N EFULT SETTINGS RE IT & L. THESE TWO POINTS SHOUL E ROUTE TO OMMON VI NER NLOG PINS N, N, & P OF X0 SEE RTWORK IN X0 TSHEET. TE HP-UTOPTXLK J- TK TO-TI LIS PIS UTXLK HP-TXEN HP-TXR HP-TXR[:0] HP-TXR HP-TXR HP-TXR HP-TXR0 G HP-TXSO HP-TXPR J HP-TX HP-TX HP-TX UTOPTXLK REMOVE HP-TX OTH HP-TX UTOPRXLK SOLER HP-TX0 SHORTS HP-TX FOR HP-TX UTOPI HP-TX TESTING HP-TX HP-TX HP-TX HP-TX HP-TX HP-TX J0 HP-TX0 HP-UTOPRXLK HP-TX[:0] URXLK HP-RXEN HP-RXR J- HP-RXR HP-RXR HP-RXR HP-RXR0 HP-RXR[:0] N TK M P L TI INSLNIS F INSPTHIS UTOPTXLK E TXEN N TXR[] P TXR[] N TXR[] M TXR[] P TXR[0] E TXSO E TXPRTY F F G G G H H TXT[] TXT[] TXT[] TXT[] TXT[] TXT[0] TXT[] H TXT[] J TXT[] J TXT[] J TXT[] K TXT[] K TXT[] L TXT[] L TXT[] M TXT[0] H UUSWITH N UTOP UTOPRXLK RXEN RXR[] RXR[] RXR[] RXR[] RXR[0] JTG STTUS UTOPI RV N TO STTOUT[] STTOUT[] STTOUT[] STTOUT[] STTOUT[] STTOUT[] STTOUT[] STTOUT[0] UTOPI XMIT LFOUT PFOUT F E TXLV RXLV RXSO RXPRTY RXT[] RXT[] RXT[] RXT[] RXT[] RXT[0] RXT[] RXT[] RXT[] RXT[] 0 RXT[] 0 RXT[] RXT[] RXT[] RXT[] RXT[0] PITO STT STT STT STT STT STT STT STT0 LF PF R. R 0 R 0 STT[:0] J0 G0 J0 J J R. R. HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX0 HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX HP-RX0 SLE: NE R 0K R0.K IENT. R 0K HP-RX[:0] LIS PIS R.K R.K HP-TXLV HP-RXSO RWING. HP-RXLV HP-RXPR T00-X00 R 0 --00_: R.0 /0 E F G H J K L M N P 0 X0 G T00-0-0.00P
SR_LR[:0] SR_LR0 SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR0 SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR SR_LR LR0 LR LR LR LR LR LR LR LR LR LR0 LR LR LR LR LR LR LR LR LR[:0] R LT0 LT LT LT LT LT LT LT LT LT LT0 LT LT LT LT LT LT LT LT LT LT0 LT LT LT LT LT LT LT LT LT LT0 LT LT[:0] SR_LT0 SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT0 SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT0 SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT SR_LT0 SR_LT SR_LT[:0] R 0 R 0 R 0 G G 0 0 IO IO IO IO IO IO IO IO N N V V VSS VSS S KX U 0 0 0 G 0 0 IO IO IO IO IO IO IO IO N N V V VSS VSS S KX U 0 0 0 G G LT M M M M0 LR LR LR LR LR LR0 MS0 LR LR LR LR LR LR LR LR LR LR LR0 LR LR LR LR LR0 LR LR LR LR LR LR LR LR LR LR MS0 LR0 LR LR LR LR LR LR LR LR0 LR LR LR LR LR LR LR 0 0 IO IO IO IO IO IO IO IO N N V V VSS VSS S KX U 0 0 0 LR LR LR MS0 LR0 LR LR LR LR LR LR LR LR LR LR LR0 MS0 LR LR LR 0 0 IO IO IO IO IO IO IO IO N N V V VSS VSS S KX U 0 0 0 LR LR LR LR LR LR LR LR0 LR LR LT0 LT LT LT LT LT LT LT LT LT LT0 LT LT LT LT LT LT LT LT LT0 LT LT LT LT LT LT LT LT LT LT0 LT SLE: IENT. RWING. NE /0 T00-X00 --00_:0 R 0 R 0 R 0 SERIES TERMINTION SERIES TERMINTION OTTOM SIE TOP SIE T00-0-0.00P
X0 VR LM0 V _V 0,, J, J, K + 0 + 0 + 0 + 0 + 0 IGITL POR PINS, 0,,, NLOG POR PINS L, M, M, M, N GROUN PINS,,,, E, E, G, G, H 00PF 00PF 00PF 00PF 00PF 00PF 00PF 0 00PF 00PF 00PF 00PF TE: = SR SUPPLY is +.V is +v from host PI bus J, L, L, M, N N, N0, P, P ONNET PINS NLOG IS SUPPLY FOR THE X0 PHY NLOG VOLTGE PINS ONLY, G, M + 0 + 0 0 0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0 0 + 0.0 0.0.0.0.0.0 00.0.0.0.0.0.0.0.0.0.0 VREG SOT- VR VIN VOUT EN YP NLOG 0PF 0.UF 00PF N OR N POR PINS, E, H, J, K, L L, N, P, T, U,, E,, E, E, E,,, E, F, E E,,, V, U, T, N, K J, G, E,, + 0 + 0 + 0 + 0.0.0 0.0.0.0.0.0.0.0.0.0.0 0.0,,,,,,,, PINS,, E, G, K, M M, N, T, V, W,, F,, F, E0,, F, F, F, F, Y, W, U, P, N M, K, H, G, E,,,, 0.0.0.0.0.0.0.0 0.0.0 + 0.0.0.0 0.0.0.0.0,,,, 0,,, THERML PINS L TO L M TO M N TO N P TO P R TO R T TO T IENT. RWING. T00-X00 SLE: POR NE T00-0-0.
LOK IGRM ONTROL PI US H[:0] SR N *OR* N TX[:0] ONTROL ITS FOR UTOPI US RX[:0] LT[:0] LT[:0] LOL US LR[:0] LR[:0] PHY X0 RXT+&- PEL PM TXT+&- MP # RV XMIT STT[:0] SERIL EEPROM LR[:0] LT[:0] STTUS LES MEMORY NK MYTE STT0=LO STT=RI-P STT=IS-P STT=RI-L STT=IS-L STT=LOP STT=OOF STT=LOS IENT. -0 RWING. T00-X00 SLE: NE lock iagram T00-0-0.