FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch

Similar documents
FSUSB31 Low-Power 1-Port Hi-Speed USB 2.0 (480Mbps) Switch

Description. For Fairchild s definition of Eco Status, please visit:

NC7SV74 TinyLogic ULP-A D-Type Flip-Flop with Preset and Clear

NC7SB3157 TinyLogic Low Voltage UHS Analog Switch 2-Channel Multiplexer/Demultiplexer (Preliminary)

FSA2567 Low-Power, Dual SIM Card Analog Switch

Is Now Part of To learn more about ON Semiconductor, please visit our website at

SGM7227 High Speed USB 2.0 (480Mbps) DPDT Analog Switch

NC7SZ374 TinyLogic UHS D-Type Flip-Flop with 3-STATE Output

NC7SVU04 TinyLogic ULP-A Unbuffered Inverter

USB1T20 Universal Serial Bus Transceiver

NC7SP05 TinyLogic ULP Inverter (Open Drain Output)

NC7SV11 TinyLogic ULP-A 3-Input AND Gate

FSUSB242. FSUSB242 Type-C USB Port Protection Switch

FPF1003A / FPF1004 IntelliMAX Advanced Load Management Products

74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

74VHC273 Octal D-Type Flip-Flop

74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs

MM74HC175 Quad D-Type Flip-Flop With Clear

NLSV2T Bit Dual-Supply Inverting Level Translator

74LCX07 Low Voltage Hex Buffer with Open Drain Outputs

AOZ Ω Low-Voltage Dual-DPDT Analog Switch

74ACT825 8-Bit D-Type Flip-Flop

74LCX16374 Low Voltage 16-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

74VHC00 Quad 2-Input NAND Gate

MM74HC175 Quad D-Type Flip-Flop With Clear

MM74HC154 4-to-16 Line Decoder

FSA1208 Low-Power, Eight-Port, High-Speed Isolation Switch

MM74HC00 Quad 2-Input NAND Gate

MM74HCT08 Quad 2-Input AND Gate

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop

MM74HC151 8-Channel Digital Multiplexer

74AUP1G95 TinyLogic Low Power Universal Configurable Two-Input Logic Gate (Open Drain Output)

CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop

MM74HC251 8-Channel 3-STATE Multiplexer

74AUP1G59 TinyLogic Low Power Universal Configurable Two-Input Logic Gate (Open Drain Output)

MM74HC08 Quad 2-Input AND Gate

INTEGRATED CIRCUITS. PCK2002P 533 MHz PCI-X clock buffer. Product data Supersedes data of 2001 May Dec 13. Philips Semiconductors

MM74HC573 3-STATE Octal D-Type Latch

CD4028BC BCD-to-Decimal Decoder

74ACT Bit D-Type Flip-Flop with 3-STATE Outputs

74LCXH Low Voltage 16-Bit D-Type Flip-Flop with Bushold and 26Ω Series Resistors in Outputs

AOZ Ω Low-Voltage Dual SPDT Analog Switch. General Description. Features. Applications AOZ6236

74LCX16374 Low Voltage 16-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

MM74HC32 Quad 2-Input OR Gate

MM74HC373 3-STATE Octal D-Type Latch

FIN1531 5V LVDS 4-Bit High Speed Differential Driver

USB1T11A Universal Serial Bus Transceiver

74F109 Dual JK Positive Edge-Triggered Flip-Flop

MM74HC595 8-Bit Shift Register with Output Latches

MM74HC164 8-Bit Serial-in/Parallel-out Shift Register

74F153 Dual 4-Input Multiplexer

MM74HC139 Dual 2-To-4 Line Decoder

MM74HC374 3-STATE Octal D-Type Flip-Flop

MM74HC157 Quad 2-Input Multiplexer

MM74HC4020 MM74HC Stage Binary Counter 12-Stage Binary Counter

74AC153 74ACT153 Dual 4-Input Multiplexer

MM74HC259 8-Bit Addressable Latch/3-to-8 Line Decoder

74LCX841 Low Voltage 10-Bit Transparent Latch with 5V Tolerant Inputs and Outputs

MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

CD4071BC CD4081BC Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate

Low Voltage 2-1 Mux, Level Translator ADG3232

MM74HC74A Dual D-Type Flip-Flop with Preset and Clear

CD40106BC Hex Schmitt Trigger

74F174 Hex D-Type Flip-Flop with Master Reset

74VHCT74A Dual D-Type Flip-Flop with Preset and Clear

MM74HC373 3-STATE Octal D-Type Latch

MM74HCT138 3-to-8 Line Decoder

74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

AOZ6135 High Performance, Low R ON, 1Ω SPDT Analog Switch

74VHC00 Quad 2-Input NAND Gate

MM74HC138 3-to-8 Line Decoder

Hex inverting Schmitt trigger with 5 V tolerant input

FEATURES BENEFITS APPLICATIONS

74AC08 74ACT08 Quad 2-Input AND Gate

Is Now Part of To learn more about ON Semiconductor, please visit our website at

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset

MM74HC244 Octal 3-STATE Buffer

PO3B14A. Description. Truth Table. High Bandwidth Potato Chip V CC N.C. EN EN S 1 A 3 B 3 B 2 A 2 A 1 B 1 Y A Y B GND

74F175 Quad D-Type Flip-Flop

MM74HCT540 MM74HCT541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer

74F379 Quad Parallel Register with Enable

SGM7SZ00 Small Logic Two-Input NAND Gate

2 Input NAND Gate L74VHC1G00

CD4021BC 8-Stage Static Shift Register

NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset

74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer

NLSV22T244. Dual 2-Bit Dual-Supply Non-Inverting Level Translator

INTEGRATED CIRCUITS. 74LVC138A 3-to-8 line decoder/demultiplexer; inverting. Product specification 1998 Apr 28

74F139 Dual 1-of-4 Decoder/Demultiplexer

MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

Powered-off Protection, 1, 1.8 V to 5.5 V, SPDT Analog Switch (2:1 Multiplexer)

74VHC373 Octal D-Type Latch with 3-STATE Outputs

74VHC573 Octal D-Type Latch with 3-STATE Outputs

54AC258 54ACT258 Quad 2-Input Multiplexer with TRI-STATE Outputs

PI4GTL bit bidirectional low voltage translator

CD4028BC BCD-to-Decimal Decoder

74VHCT373A Octal D-Type Latch with 3-STATE Outputs

74LVX374 Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs

74VHC244 Octal Buffer/Line Driver with 3-STATE Outputs

74LCX760 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs

Transcription:

FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch Features? Low On Capacitance: 3.7pF (Typical)? Low On Resistance: 6.5 (Typical)? Low Power Consumption: 1µA (Maximum) 10µA Maximum I CCT over an Expanded Control Voltage Range (V IN = 2.6V, V CC = 4.3V)? Wide -3dB Bandwidth, >720MHz? 8kV ESD Protection? Power-Off Protection when V CC = 0V; D+/D- Pins can Tolerate up to 5.5V? Packaged in: 10-lead MicroPak (1.6 x 2.1mm) 10-lead MSOP 10-lead UMLP (1.4 x 1.8mm) Applications? Cell phone, PDA, Digital Camera, and Notebook LCD Monitor, TV, and Set-top Box Related Application Notes? AN-6022 Using the FSUSB30 / FSUSB31 to Comply with USB 2.0 Fault Condition Requirements Ordering Information Order Number Package Number Product Code Top Mark April 2013 Description The FSUSB30 is a low-power, two-port, high-speed USB 2.0 switch. Configured as a double-pole double-throw (DPDT) switch, it is optimized for switching between two high-speed (480Mbps) sources or a Hi-Speed and Full- Speed (12Mbps) source. The FSUSB30 is compatible with the requirements of USB2.0 and features an extremely low on capacitance (C ON ) of 3.7pF. The wide bandwidth of this device (720MHz), exceeds the bandwidth needed to pass the third harmonic, resulting in signals with minimum edge and phase distortion. Superior channel-to-channel crosstalk minimizes interference. The FSUSB30 contains special circuitry on the D+/ D- pins which allows the device to withstand an overvoltage condition when powered off. This device is also designed to minimize current consumption even when the control voltage applied to the S pin, is lower than the supply voltage (V CC ). This feature is especially valuable to ultraportable applications such as cell phones, allowing for direct interface with the general purpose I/Os of the baseband processor. Other applications include switching and connector sharing in portable cell phones, PDAs, digital cameras, printers, and notebook computers. Package Description FSUSB30L10X MAC010A FJ 10-Lead MicroPak, 1.6 x 2.1mm FSUSB30MUX MUA10A FSUSB30 10-Lead Molded Small Outline Package (MSOP), JEDEC MO- 187, 3.0mm Wide FSUSB30UMX MLP010A GJ 10-Lead, Quad, Ultrathin, MLP (UMLP) 1.4 x 1.8mm Set Top Box (STB) CPU or DSP Processor USB2.0 Controller 1D+ VCC 1D FSUSB30 D+ D USB Connector 2D+ DVR or Mass Storage Controller 2D Control S OE Figure 1. Typical Application MicroPak is a trademark of Fairchild Semiconductor Corporation. FSUSB30 Rev. 1.1.8

Connection Diagrams Pad Assignments for MicroPak OE HSD1 HSD2 D 9 8 7 6 V CC 10 5 1 2 3 4 S HSD1+ HSD2+ D+ (Top View) Pad Assignments for DQFN NC V CC 1 14 S 2 13 OE HSD1+ 3 12 HSD1 NC 4 11 NC HSD2+ 5 10 HSD2 D+ 6 9 D 7 8 NC (Top Through View) Pin Assignment for MSOP S 1 10 V CC HSD1+ 2 9 OE Analog Symbol Pin Descriptions Pin Name Description OE Bus Switch Enable S Select Input D+, D, HSDn+, HSDn Data Ports NC No Connect Truth Table HSD1+ D+ HSD2+ HSD1 D HSD2 S Control OE S OE Function X HIGH Disconnect LOW LOW D+, D = HSD1 n HIGH LOW D+, D = HSD2 n HSD2+ 3 8 HSD1 D+ 4 7 HSD2 5 6 D (Top Through View) Pad Assignments for µmlp HSD1 HSD2 V CC 7 6 OE D 8 9 Sel 1 2 10 5 4 3 D+ HSD1+ HSD2+ (Top Through View) FSUSB30 Rev. 1.1.8 2

Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Minimum Maximum Unit V CC Supply Voltage -0.5 +5.5 V V CNTRL DC Input Voltage (1) -0.5 V CC V V SW DC Switch Voltage (1) D+,D- when V CC > 0 0.5 V CC V HSDnX 0.5 V CC V D+,D- when V CC = 0-0.50 V CC V I IK DC Input Diode Current -50 ma I OUT DC Output Current 50 ma T STG Storage Temperature -65 +150 C ESD Human Body Model All Pins 8 kv I/O to 8 kv Note: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. (2) Symbol Parameter Minimum Maximum Unit V CC Supply Voltage 3.0 4.3 V V IN Control Input Voltage 0 V CC V V SW Switch Input Voltage 0 V CC V T A Operating Temperature -40 +85 C J A Thermal Resistance, 10 MicroPak 250 C/W Note: 2. Control input must be held HIGH or LOW and it must not float. FSUSB30 Rev. 1.1.8 3

DC Electrical Characteristics All typical values are at 25 C unless otherwise specified. Symbol Parameter Conditions V CC (V) Notes: 3. Measured by the voltage drop between Dn, HSD1 n, HSD2 n pins at the indicated current through the switch. On resistance is determined by the lower of the voltage on the two ports. 4.Guaranteed by characterization. AC Electrical Characteristics All typical values are for V CC = 3.3V at 25 C unless otherwise specified. T A = 40 C to +85 C Min. Typ. Max. V IK Clamp Diode Voltage I IN = -18mA 3.0-1.2 V V IH Input Voltage HIGH Unit 3.0 to 3.6 1.3 V 4.3 1.7 V V IL Input Voltage LOW 3.0 to 3.6 0.5 V 4.3 0.7 V I IN Control Input Leakage V SW = 0.0V to V CC 4.3-1.0 1.0 µa I OZ OFF State Leakage 0 Dn, HSD1 n, HSD2 n V CC 4.3-2.0 2.0 µa I OFF Power OFF Leakage Current (D+, D ) V SW = 0V to 4.3V, V CC = 0V 0-2.0 2.0 µa R ON Switch On Resistance (3) V SW = 0.4V, I ON = -8mA 3.0 6.5 10.0 V SW = 0V, I O = 30mA at 25 C 3.6 7.0 R ON Delta R (4) ON V SW = 0.4V, I ON = -8mA 3.0 0.35 R ON Flatness R ON Flatness (3) V SW = 0.0V - 1.0V, I ON = -8mA 3.0 2.0 I CC I CCT Quiescent Supply Current Increase in I CC Current per Control Voltage V CNTRL = 0.0V or V CC, I OUT = 0 4.3 1.0 µa V CNTRL (control input) = 2.6V 4.3 10.0 µa Symbol Parameter Conditions V CC (V) Turn-On Time S, t ON OE to Output Turn-Off Time S, t OFF OE to Output HD1 n, HD2 n = 0.8V, R L = 50, C L = 5pF HD1 n, HD2 n = 0.8V, R L = 50, C L = 5pF T A = 40 C to +85 C Unit Figure Number Min. Typ. Max. 3.0 to 3.6 13 30 ns Figure 9 3.0 to 3.6 12 25 ns Figure 9 t PD Propagation Delay (4) R L = 50, C L = 5pF 3.3 0.25 ns t BBM O IRR Xtalk BW Break-Before-Make Off Isolation (Non-Adjacent) Non-Adjacent Channel Crosstalk 3dB Bandwidth R L = 50, C L = 5pF, V IN = 0.8V Figure 7 Figure 8 3.0 to 3.6 2.0 6.5 ns Figure 10 f = 240MHz, R T = 50 3.0 to 3.6-30 db Figure 13 R T = 50, f = 240MHz 3.0 to 3.6-45 db Figure 14 R T = 50, C L = 0pF 720 3.0 to 3.6 R T = 50, C L = 5pF 550 MHz Figure 12 FSUSB30 Rev. 1.1.8 4

USB Hi-Speed Related AC Electrical Characteristics Symbol Parameter Conditions V CC (V) t SK(O) t SK(P) t J Total Jitter (5) t R = t F = 500ps at 480 Mbps R L = 50, C L = 5pF, (PRBS = 2 15 1) Note: 5. Guaranteed by characterization. Capacitance T A = 40 C to +85 C Units Figure Number Min. Typ. Max. Channel-to-Channel Skew (5) R L = 50, C L = 5pF 3.0 to 3.6 50 ps Skew of Opposite Transitions of the R L = 50, C L = 5pF 3.0 to 3.6 20 ps Same Output (5) Symbol Parameter Conditions 3.0 to 3.6 200 ps T A = 40 C to +85 C Min. Typ. Max. Units Figure 7 Figure 11 Figure 7 Figure 11 Figure Number C IN Control Pin Input Capacitance V CC = 0V 1.5 pf Figure 16 C ON D1 n, D2 n, Dn On Capacitance V CC = 3.3, OE = 0V 3.7 pf Figure 15 C OFF D1 n, D2 n Off Capacitance V CC and OE = 3.3 2.5 pf Figure 16 FSUSB30 Rev. 1.1.8 5

Typical Characteristics Gain (db) Off Isolation (db) 0-1 -2-3 -4-5 -6-7 Frequency Response -8 1 10 100 1000 10000 Frequency (MHz) C L = 0pF, V CC = 3.3V Figure 2. Gain vs. Frequency Frequency Response 0-10 -20-30 -40-50 -60-70 -80-90 -100-110 -120 1 10 100 1000 Frequency (MHz) Figure 3. Off Isolation Crosstalk (db) Frequency Response 0-10 -20-30 -40-50 -60-70 -80-90 -100-110 -120 1 10 100 1000 Frequency (MHz) V CC = 3.3V Figure 4. Crosstalk FSUSB30 Rev. 1.1.8 6

Test Diagrams HSDn V IN V ON R ON = V ON / I ON Select Dn V S = 0 to V CC Figure 5. On Resistance HSDn V IN V Sel R S D+, D C L Figure 7. AC Test Circuit Load R L I ON V OUT R L, R S, and C L are functions of the application environment (see AC Electrical tables for specific values). C L includes test fixture and stray capacitance. NC ID n(off) V IN Select V S = 0 or V CC Each switch port is tested separately. Figure 6. Off Leakage t RISE = 500ps t FALL = 500ps 800mV Input: HSDn+, 90% 90% HSDn 400mV 10% 10% V OH Output: D+, D V OL t PLH t PHL Figure 8. Switch Propagation Delay Waveforms A t RISE = 2.5ns t FALL = 2.5ns V CC Input S, OE 90% V CC /2 90% V CC /2 10% 10% Output V OUT V OH 90% 90% V OL t ON t OFF Figure 9. Turn-On / Turn-Off Waveform FSUSB30 Rev. 1.1.8 7

V O Control Input HSDn HSDn S V CC V CC D+, D *C L includes test fixture and stray capacitance. Input: t RISE = 500ps 800mV HSDn+ HSDn 400mV Output: D+, D V OH V OL 90% 90% t PLH T SK(P) = t PHL t PLH Pulse Skew, T SK(P) R L V OUT C L * Control Input V CC 0V V OUT Figure 10. Break-Before-Make (t BBM ) t FALL = 500ps 10% 10% t PHL Output1: t RISE = 500ps 800mV Input: D+, D 400mV V OH HSD1+ HSD1 V OL V OH Output1: D2+, D2 V OL t PLH1 t R = t F = 2.5ns (10 90%) t D 90% 90% 10% 10% t PLH2 0.9 x V OUT t FALL = 500ps t PHL1 t PHL2 T SK(O) = t PLH1 t PLH2 or t PHL1 t PHL2 Output Skew, T SK(OUT) Figure 11. Switch Skew Tests FSUSB30 Network Analyzer R S V Sel V IN V S R S and R T are functions of the application environment (See AC Electrical Tables for specific values). Figure 12. Bandwidth R T V OUT FSUSB30 Rev. 1.1.8 8

V Sel VSel FSUSB30 OFF-Isolation = 20 Log (V OUT / V IN ) FSUSB30 R T Figure 13. Channel Off Isolation NC R T R S and R T are functions of the application environment (50, 75 or 100Ω) Crosstalk = 20 Log (V OUT / V IN ) Network Analyzer Figure 14. Non-Adjacent Channel-to-Channel Crosstalk V IN V IN R S V OUT R T R S V S Network Analyzer R T V S V OUT Capacitance Meter f = 240MHz Dn FSUSB30 S V Sel = 0 or V CC Capacitance Meter Dn FSUSB30 S V Sel = 0 or V CC D1n, D2n f = 240MHz D1n, D2n Figure 15. Channel On Capacitance Figure 16. Channel Off Capacitance FSUSB30 Rev. 1.1.8 9

Application Guidance: Meeting USB 2.0 Vbus Short Requirements In section 7.1.1 of the USB 2.0 specification, it notes that USB devices must be able to withstand a Vbus short to D+ or D- when the USB devices is either powered off or powered on. The FSUSB30 can be successfully configured to meet both these requirements. Power-Off Protection For a Vbus short circuit, the switch is expected to withstand such a condition for at least 24 hours. The FSUSB30 has specially designed circuitry which prevents unintended signal bleed through as well as guaranteed system reliability during a power-down, overvoltage condition. The protection has been added to the common pins (D+, D-). HSD+ HSD+ HSD- HSD- 100 Ohms VCC= 3.6 V FSUSB30 Power-On Protection The USB 2.0 specification also notes that the USB device should be capable of withstanding a Vbus short during transmission of data. Fairchild recommends adding a 100 series resister between the switch VCC pin and supply rail to protect against this case. This modification works by limiting current flow back into the V CC rail during the over-voltage event so current remains within the safe operating range. In this application, the switch passes the full 5.25V input signal through to the selected output, while maintaining specified off isolation on the un-selected pins. D+ = 5.25V D- = 5.25V Figure 17. Adding 100 resistor in series with the V CC supply allows the FSUSB30 to withstand a Vbus short when powered up For more information, see Applications Note AN-6022 Using the FSUSB30 to Comply with USB 2.0 Fault Condition Requirements at www.fairchildsemi.com FSUSB30 Rev. 1.1.8 10

Tape and Reel Specifications Tape Format for DQFN Package Designator BQX Tape Section Tape Dimensions Dimenions are in millimeters unless otherwise specified. Number Cavities Cavity Status Cover Tape Status Leader (Start End) 125 (typ) Empty Sealed Carrier 2500/3000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed FSUSB30 Rev. 1.1.8 11

Reel Dimensions for DQFN Dimensions are in inches (millimeters) unless otherwise specified. Tape Size A B C D N W1 W2 (12mm) 13.0 (330) 0.059 (1.50) 0.512 (13.00) 0.795 (20.20) 7.008 (178) 0.488 (12.4) 0.724 (18.4) FSUSB30 Rev. 1.1.8 12

Tape Dimensions for MSOP Dimensions are in inches (millimeters) unless otherwise specified. Reel Dimensions for MSOP Dimensions are in inches (millimeters) unless otherwise specified Tape Size A B C D N W1 W2 W3 (12mm) 13 (330) 0.059 (1.5) 0.512 (13) 0.795 (20.2) 7.008 (178) 0.448 (12.4) 0.724 (18.4) 0.468-0.606 (11.9-15.4) FSUSB30 Rev. 1.1.8 13

Physical Dimensions 2X PIN1 IDENT IS 2X LONGER THAN OTHER LINES 0.05 C DETAIL A 0.35 0.25 (0.29) 0.10 C C 0.50 TOP VIEW SIDE VIEW D 0.65 0.55 2.10 1 4 10 5 9 6 1.62 BOTTOM VIEW (0.36) A 0.25 9X 0.15 B 1.60 0.05 0.00 0.56 2X 0.35 9X 0.25 0.10 C 0.55 MAX 0.05 C 0.10 C A B 0.05 C ALL FEATURES (0.15) 1.12 (0.11) 0.56 0.50 1.62 (0.35) 10X (0.25) 10X RECOMMENDED LAND PATTERN (0.20) 0.35 0.25 0.35 0.25 DETAIL A 2X SCALE KEEPOUT ZONE, NO TRACES OR VIAS ALLOWED NOTES: A. PACKAGE CONFORMS TO JEDEC REGISTRATION MO-255, VARIATION UABD. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. PRESENCE OF CENTER PAD IS PACKAGE SUPPLIER DEPENDENT. IF PRESENT IT IS NOT INTENDED TO BE SOLDERED AND HAS A BLACK OXIDE FINISH. E. DRAWING FILENAME: MKT-MAC10Arev5. Figure 17. 10-Lead MicroPak, 1.6 x 2.1mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. FSUSB30 Rev. 1.1.8 14

Physical Dimensions Figure 18. 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. FSUSB30 Rev. 1.1.8 15

Physical Dimensions 2X 0.15 C PIN#1 IDENT 0.10 C 0.08 C 0.05 DETAIL A PIN#1 IDENT TOP VIEW 0.55 MAX. SEATING PLANE SIDE VIEW 0.35 0.45 (9X) 3 1 10 BOTTOM VIEW 0.55 0.45 1.40 0.10 6 A 0.152 C B 1.80 0.15 C 2X 0.40 0.15 0.25 (10X) 0.10 C A B 0.05 C 0.40 1.70 (9X) 0.663 0.563 (10X)0.225 1 RECOMMENDED LAND PATTERN 0.55 0.40 (10X) 0.225 1.45 2.10 9X 0.45 1.85 OPTIONAL MINIMIAL TOE LAND PATTERN NOTES: A. PACKAGE DOES NOT FULLY CONFORM TO JEDEC STANDARD. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY. E. DRAWING FILENAME: MKT-UMLP10Arev3. 0.10 DETAIL A SCALE : 2X 0.10 LEAD OPTION 1 SCALE : 2X PACKAGE EDGE LEAD OPTION 2 SCALE : 2X Figure 19. 10-Lead, Quad, Ultrathin Molded Leadless Package (UMLP), 1.4 x 1.8mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. FSUSB30 Rev. 1.1.8 16

FSUSB30 Rev. 1.1.8 17