CHAPTER.6 :TRANSISTOR FREQUENCY RESPONSE

CHAPTER.6 :TRANSISTOR FREQUENCY RESPONSE To understand Decibels, log scale, general frequency considerations of an amplifier. low frequency analysis - Bode plot low frequency response BJT amplifier Miller effect capacitance high frequency response BJT amplifier Introduction It is required to investigate the frequency effects introduced by the larger capacitive elements of the network at low frequencies and the smaller capacitive elements of the active device at high frequencies. Since the analysis will extend through a wide frequency range, the logarithmic scale will be used. Logarithms To say that log a M = x means exactly the same thing as saying ax = M. For example: What is log 2 8? Basic Rules Logarithmic Rule 1: "To what power should 2 be raised in order to get 8?" Since 8 is 2 3 the answer is "3." So log 2 8 = 3 Logarithmic Rule 2: Logarithmic Rule 3: 1

Natural Logarithm (or base e) There is another logarithm that is also useful (and in fact more common in natural processes). Many natural phenomenon are seen to exhibit changes that are either exponentially decaying (radioactive decay for instance) or exponentially increasing (population growth for example). These exponentially changing functions are written as ea, where a represents the rate of the exponential change. In such cases where exponential changes are involved, we usually use another kind of logarithm called natural logarithm. The natural log can be thought of as Logarithm Base-e. This logarithm is labeled with ln (for "natural log"), where, e = 2.178. Semi Log graph Decibels The term decibel has its origin in the fact that the power and audio levels are related on a logarithmic basis. The term bel is derived from the surname of Alexander Graham Bell. Bel is defined by the following equation relating two power levels, P1 and P2: G = [log 10 P2 / P1] bel It was found that, the Bel was too large a unit of measurement for the practical purposes, so the decibel (db) is defined such that 10 decibels = 1 bel. Therefore, GdB = [10 log 10 P2 / P1 ] db 2

The decimal rating is a measure of the difference in magnitude between two power levels. For a specified output power P2, there must be a reference power level P1. The reference level is generally accepted to be 1mW. GdBm = [10 log 10 P2 / 1mW ] dbm GdB = [10 log 10 P2 / P1 ] db = [10 log 10 (V 22 / R i ) / (V 12 / R i )] db = 10 log 10 (V 2 / V 1 )2 GdB = [20 log 10 V 2 / V 1 ] db One of the advantages of the logarithmic relationship is the manner in which it can be applied to cascaded stages wherein the overall voltage gain of a cascaded system is the sum of individual gains in db. Problem1: A V = (A v 1)(A v 2)(A v 3). A V db = (A v 1dB)+(A v 2dB)+(A v 3dB). Find the magnitude gain corresponding to a voltage gain of 100dB. Problem 2: GdB = [20 log 10 V 2 / V 1 ] db = 100dB = 20 log 10 V 2 / V 1 ; V 2 / V 1 = 10 5 = 100,000 The input power to a device is 10,000W at a voltage of 1000V. The output power is 500W and the output impedance is 20. Find the power gain in decibels. Find the voltage gain in decibels. GdB = 10 log 10 (P o /P i ) = 10 log 10 (500/10k) = -13.01dB GV = 20 log 10 (V o /V i ) = 20 log 10 ( PR/1000) = 20 log 10 [ (500)(20)/1000] = - 20dB ( Note: P = V 2 /R; V = PR) 3

Problem 3 : An amplifier rated at 40 W output is connected to a 10 speaker. a. Calculate the input power required for full power output if the power gain is 25dB. b. Calculate the input voltage for rated output if the amplifier voltage gain is 40dB. a. 25 = 10 log 10 40/P i P i = 40 / antilog(2.5) = 126.5mW b. GV = 20log 10 V o /V i ; Also, Thus, 40 = 20log 10 V o /V i V o /V i = antilog 2 = 100 V o = PR = (40)(10) = 20V V i = V o / 100 = 20/100 = 200mV General Frequency considerations At low frequencies the coupling and bypass capacitors can no longer be replaced by the short circuit approximation because of the increase in reactance of these elements. The frequency dependent parameters of the small signal equivalent circuits and the stray capacitive elements associated with the active device and the network will limit the high frequency response of the system. An increase in the number of stages of a cascaded system will also limit both the high and low frequency response. The horizontal scale of frequency response curve is a logarithmic scale to permit a plot extending from the low to the high frequency For the RC coupled amplifier, the drop at low frequencies is due to the increasing reactance of C C and C E, whereas its upper frequency limit is determined by either the parasitic capacitive elements of the network or the frequency dependence of the gain of the active device. In the frequency response, there is a band of frequencies in which the magnitude of the gain is either equal or relatively close to the midband value. To fix the frequency boundaries of relatively high gain, 0.707A Vmid is chosen to be the gain at the cutoff levels. 4

The corresponding frequencies f 1 and f 2 are generally called corner, cutoff, band, break, or half power frequencies. The multiplier 0.707 is chosen because at this level the output power is half the midband power output, that is, at mid frequencies, P O mid = Vo 2 / Ro = A Vmid V i 2 / R O And at the half power frequencies, P OHPF = 0.707 A Vmid V i 2 / R o = 0.5 A Vmid V i 2 / R o And, P OHPF = 0.5 P Omid The bandwidth of each system is determined by f 2 f 1 A decibel plot can be obtained by applying the equation, (A V / A Vmid )db = 20 log 10 (A V / A Vmid ) Most amplifiers introduce a 180 phase shift between input and output signals. At low frequencies, there is a phase shift such that V o lags V i by an increased angle. At high frequencies, the phase shift drops below 180. Low frequency analysis Bode plot In the low frequency region of the single stage BJT amplifier, it is the RC combinations formed by the network capacitors C C and C E, the network resistive parameters that determine the cutoff frequencies. Frequency analysis of an RC network 5

Analysis of the above circuit indicates that, X C = 1/2 fc 0 Thus, V o = V i at high frequencies. At f = 0 Hz, X C =, V o = 0V. Between the two extremes, the ratio, A V = Vo / Vi will vary. As frequency increases, the capacitive reactance decreases and more of the input voltage appears across the output terminals. The output and input voltages are related by the voltage divider rule: V o = RV i / ( R jx C ) the magnitude of V o = RV i / R 2 + X C2 For the special case where X C = R, V o =RV i / R 2 = (1/ 2) V i A V = V o / V i = (1/ 2) = 0.707 The frequency at which this occurs is determined from, X C = 1/2 f 1 C = R where, f 1 = 1/ 2 RC Gain equation is written as, A V = V o / V i = R / (R jx C ) = 1/ ( 1 j(1/ CR) = 1 / [ 1 j(f 1 / f)] In the magnitude and phase form, A V = V o / V i = [1 / 1 + (f 1 /f) 2 ] tan - 1 (f 1 / f) In the logarithmic form, the gain in db is 6

A V = V o / V i = [1 / 1 + (f 1 /f) 2 ] = 20 log 10 [1 / 1 + (f 1 /f) 2 ] = - 20 log 10 [ 1 + (f 1 /f) 2 ] = - 10 log 10 [1 + (f 1 /f) 2 ] For frequencies where f << f 1 or (f 1 / f) 2 the equation can be approximated by At f = f 1 ; At f = ½ f 1 ; At f = ¼ f 1 ; At f = 1/10 f 1 ; A V (db) = - 10 log 10 [ (f 1 / f) 2 ] f 1 / f = 1 and = - 20 log 10 [ (f 1 / f)] at f << f 1 20 log 10 1 = 0 db f 1 / f = 2 20 log 10 2 = - 6 db f 1 / f = 4 20 log 10 2 = - 12 db f 1 / f = 10 20 log 10 10 = - 20dB The above points can be plotted which forms the Bode plot. Note that, these results in a straight line when plotted in a logarithmic scale. Although the above calculation shows at f = f 1, gain is 3dB, we know that f 1 is that frequency at which the gain falls by 3dB. Taking this point, the plot differs from the straight line and gradually approaches to 0dB by f = 10f 1. Observations from the above calculations: When there is an octave change in frequency from f 1 / 2 to f 1, there exists corresponding change in gain by 6dB. When there is an decade change in frequency from f 1 / 10 to f 1, there exists corresponding change in gain by 20 db. 7

Low frequency response BJT amplifier A voltage divider BJT bias configuration with load is considered for this analysis. For such a network of voltage divider bias, the capacitors C S, C C and C E will determine the low frequency response. Let us consider the effect of each capacitor independently. C S : f Ls 1 2 (Rs Ri)C s Ri R1 R2 βre At mid or high frequencies, the reactance of the capacitor will be sufficiently small to permit a short circuit approximations for the element. The voltage V i will then be related to V s by V i mid = V s R i / (R i +R s ) At f = F LS, V i = 70.7% of its mid band value. 8

The voltage V i applied to the input of the active device can be calculated using the voltage divider rule: Effect of C C : V i = R i V s / ( R i + R s jx Cs ) Since the coupling capacitor is normally connected between the output of the active device and applied load, the RC configuration that determines the low cutoff frequency due to C C appears as in the figure given below. f LC 1 2π(Ro R L )Cc R o = R c r o Effect of C E : 1 R s β fle Re RE ( re) 2πReCE R s Rs R1 R2 9

The effect of C E on the gain is best described in a quantitative manner by recalling that the gain for the amplifier without bypassing the emitter resistor is given by: A V = - R C / ( r e + R E ) Maximum gain is obviously available where R E is 0. At low frequencies, with the bypass capacitor C E in its open circuit equivalent state, all of R E appears in the gain equation above, resulting in minimum gain. As the frequency increases, the reactance of the capacitor C E will decrease, reducing the parallel impedance of R E and C E until the resistor R E is effectively shorted out by C E. The result is a maximum or midband gain determined by A V = - R C / r e. The input and output coupling capacitors, emitter bypass capacitor will affect only the low frequency response. At the mid band frequency level, the short circuit equivalents for these capacitors can be inserted. Although each will affect the gain in a similar frequency range, the highest low frequency cutoff determined by each of the three capacitors will have the greatest impact. Problem: Determine the lower cutoff freq. for the network shown using the following parameters: C s = 10μF, C E = 20μF, C c = 1μF R s = 1kΩ, R 1 = 40kΩ, R 2 = 10kΩ, R E = 2kΩ, R C = 4kΩ, R L = 2.2kΩ, β = 100, r o = Ω, Vcc = 20V Solution: 10

a. To determine r e for the dc conditions, let us check whether R E > 10R 2 Here, R E = 200k, 10R 2 = 100k. The condition is satisfied. Thus approximate analysis can be carried out to find I E and thus r e. Mid band gain: Input impedance V B = R 2 V CC / ( R 1 +R 2 ) = 4V V E = V B 0.7 = 3.3V I E = 3.3V / 2k = 1.65mA r e = 26mV / 1.65mA = 15.76 A V = V o / V i = -R C R L / r e = - 90 Zi = R1 R2 re = 1.32K Cut off frequency due to input coupling capacitor ( f Ls ) Effect of C E : f Ls = 1/ [2 (R s +R i )C C1 = 6.86Hz. f Lc = 1 / [2 (R C + R L ) C C = 1 / [ 6.28 (4k + 2.2k )1uF] = 25.68 Hz R S = R S R 1 R 2 = 0.889 R e = R E (R S / + r e ) = 24.35 f Le = 1/2 R e C E = 327 Hz f Le = 327 Hz f LC = 25.68Hz f Ls = 6.86Hz In this case, f Le is the lower cutoff frequency. In the high frequency region, the capacitive elements of importance are the interelectrode ( between terminals) capacitances internal to the active device and the wiring capacitance between leads of the network. The large capacitors of the network that controlled the low frequency response are all replaced by their short circuit equivalent due to their very low reactance level. For inverting amplifiers, the input and output capacitance is increased by a capacitance level sensitive to the inter-electrode capacitance between the input and output terminals of the device and the gain of the amplifier. 11

Miller Effect Capacitance Any P-N junction can develop capacitance. This was mentioned in the chapter on diodes. In a BJT amplifier this capacitance becomes noticeable between: the Base- Collector junction at high frequencies in CE BJT amplifier configurations. It is called the Miller Capacitance. It effects the input and output circuits. I i = I 1 + I 2 Eqn (1) Using Ohm s law yields I 1 = V i / Z i, I 1 = V i / R 1 and I 2 = (V i V o ) / X cf = ( V i A v V i ) / X cf I 2 = V i (1 A v ) / X cf Substituting for I i, I 1 and I 2 in eqn(1), V i / Z i = V i / R i + [(1 A v )V i ] /X cf 1/ Z i = 1/R i + [(1 A v )] /X cf 1/ Z i = 1/R i + 1/ [X cf / (1 A v )] 1/ Z i = 1/R i + 1/ X CM Where, X CM = [X cf / (1 A v )] = 1/[ (1 A v ) C f ] C Mi = (1 A v ) C f C Mi is the Miller effect capacitance. 12

For any inverting amplifier, the input capacitance will be increased by a Miller effect capacitance sensitive to the gain of the amplifier and the inter-electrode ( parasitic) capacitance between the input and output terminals of the active device. Miller Output Capacitance (C Mo ) C Applying KCL at the output node results in: Mo Cf I o = I 1 +I 2 and I 1 = V o /R o I 2 = (V o V i ) / X Cf The resistance R o is usually sufficiently large to permit ignoring the first term of the equation, thus Substituting V i = V o / A V, I o (V o V i ) / X Cf I o = (V o V o /A v ) / X Cf = V o ( 1 1/A V ) / X Cf I o / V o = (1 1/A V ) / X Cf V o / I o = X Cf / (1 1/A V ) = 1 / Cf (1 1/A V ) = 1/ C Mo C Mo = ( 1 1/A V )C f 13

C Mo C f [ A V >>1] If the gain (A v ) is considerably greater than 1: High frequency response BJT Amplifier At the high frequency end, there are two factors that define the 3dB cutoff point: The network capacitance ( parasitic and introduced) and the frequency dependence of h fe ( ) Network parameters CMo Cf In the high frequency region, the RC network of the amplifier has the configuration shown below. Vi Vo At increasing frequencies, the reactance X C will decrease in magnitude, resulting in a short effect across the output and a decreased gain. o V o = V i (-jx C ) / R -jx C V o / V i = 1/[ 1+j(R/X C )] ; X C = 1/2 fc A V = 1/[ 1+j(2 frc)]; A V = 1/[ 1+jf/f 2 ] This results in a magnitude plot that drops off at 6dB / octave with increasing frequency. 14

Network with the capacitors that affect the high frequency response Capacitances that will affect the high-frequency response: C be, C bc, C ce internal capacitances C wi, C wo wiring capacitances C S, C C coupling capacitors C E bypass capacitor The capacitors C S, C C, and C E are absent in the high frequency equivalent of the BJT amplifier.the capacitance C i includes the input wiring capacitance, the transition capacitance C be, and the Miller capacitance C Mi.The capacitance C o includes the output wiring capacitance C wo, the parasitic capacitance C ce, and the output Miller capacitance C Mo.In general, the capacitance C be is the largest of the parasitic capacitances, with C ce the smallest. As per the equivalent circuit, f H = 1 / 2 R thi C i R thi = R s R 1 R 2 R i C i = C wi +C be +C Mi = C Wi + C be +(1- A V ) C be 15

At very high frequencies, the effect of C i is to reduce the total impedance of the parallel combination of R 1, R 2, R i, and C i.the result is a reduced level of voltage across C i, a reduction in I b and the gain of the system. For the output network, f Ho = 1/(2 R Tho C o ) R Tho = R C R L r o C o = C wo +C ce +C Mo At very high frequencies, the capacitive reactance of C o will decrease and consequently reduce the total impedance of the output parallel branches. The net result is that V o will also decline toward zero as the reactance X c becomes smaller.the frequencies f Hi and f Ho will each define a -6dB/octave asymtote. If the parasitic capacitors were the only elements to determine the high cutoff frequency, the lowest frequency would be the determining factor.however, the decrease in h fe (or ) with frequency must also be considered as to whether its break frequency is lower than f Hi or f Ho. hfe (or ) variation The variation of h fe ( or ) with frequency will approach the following relationship h fe = h fe mid / [1+(f/f )] f is that frequency at which h fe of the transistor falls by 3dB with respect to its mid band value. The quantity f is determined by a set of parameters employed in the hybrid model. In the hybrid model, r b includes the base contact resistance base bulk resistance base spreading resistance 16

Hybrid model The resistance r u (r bc ) is a result of the fact that the base current is somewhat sensitive to the collector to base voltage. Since the base to emitter voltage is linearly related to the base current through Ohm s law and the output voltage is equal to the difference between the base the base to emitter voltage and collector to base voltage, we can say that the base current is sensitive to the changes in output voltage. Thus, f = 1/[2 r (C +C u )] Therefore, r = r e = h fe mid r e f = 1/[2 h femid r e (C +C u )] OR f = 1/[2 mid r e (C +C u )] The above equation shows that, f is a function of the bias configuration. As the frequency of operation increases, h fe will drop off from its mid band value with a 6dB / octave slope. Common base configuration displays improved high frequency characteristics over the common emitter configuration. Miller effect capacitance is absent in the Common base configuration due to non inverting characteristics. A quantity called the gain bandwidth product is defined for the transistor by the condition, h femid / [1+j(f/f ) = 1 So that, h fe db = 20 log 10 h femid / [1+j(f/f ) = 20 log 10 1 = 0 db The frequency at which h fe db = 0 db is indicated by f T. 17

h femid / [1+j(f/f ) = 1 h femid / 1+ (f T /f ) 2 h femid / (f T /f ) =1 ( by considering f T >>f ) Thus, f T = h femid f OR f T = mid f But, f = 1/[2 mid r e (C +C u )] f T = ( mid ) 1/[2 mid r e (C +C u )] f T = 1/[2 r e (C +C u )] Problem: For the amplifier with voltage divider bias, the following parameters are given: R S = 1k, R 1 = 40k, R 2 = 10k, R c = 4k, R L = 10k C s = 10 F, C c = 1 F, C E = 20 F = 100, r o =, V CC = 10 C = 36pF, C u = 4pF, C ce =1pF, C wi =6pF, C wo =8pF a. Determine f Hi and f Ho b. Find f and f T Solution: To find r e, DC analysis has to be performed to find I E. V B = R 2 V CC / R 1 +R 2 = 2V V E = 2 0.7 = 1.3V I E = 1.3/1.2K = 1.083mA r e = 26mV / 1.083mA r e = 24.01, r e = 2.4k R i = R S R 1 R 2 r e R i = 1.85k A V = V o /V i = - (R c R L ) / r e A V = - 119 R Thi = R s R 1 R 2 R i 18

R Thi = 0.6k To determine f Hi and f Ho : f Hi = 1/[2 R Thi C i ] ; C i = C wi +C be +(1 A V )C bc = 6pF + 36pF + (1 (-119)) 4pF C i = 522pF f Hi = 1/2 R Thi C i f Hi = 508.16kHz R Tho = R c R L R Tho = 2.86k C o = C wo +C ce +C Mo = 8pF+1pF+(1 (1/-119))4pF C o = 13.03pF f Ho = 1/2 R Tho C o f Ho = 8.542MHz f = 1/[2 mid r e (C +C u )] f = 1.66MHz f T = f f T = 165.72MHz Summary Frequency response of BJT Amplifiers Logarithm of a number gives the power to which the base must be brought to obtain the same number Since the decibel rating of any equipment is a comparison between levels, a reference level must be selected for each area of application. For Audio system, reference level is 1mW The db gain of a cascaded systems is the sum of db gains of each stage. It is the capacitive elements of a network that determine the bandwidth of a system. The larger capacitive elements of the design determine the lower cutoff frequencies. Smaller parasitic capacitors determine the high cutoff frequencies. The frequencies at which the gain drops to 70.7% of the mid band value are called cutoff, corner, band, break or half power frequencies. The narrower the bandwidth, the smaller is the range of frequencies that will permit a transfer of power to the load that is atleast 50% of the midband level. 19

A change in frequency by a factor of 2, is equivalent to one octave which results in a 6dB change in gain. For a 10:1 change in frequency is equivalent to one decade results in a 20dB change in gain. For any inverting amplifier, the input capacitance will be increased by a Miller effect capacitance determined by the gain of the amplifier and the inter electrode ( parasitic) capacitance between the input and output terminals of the active device. C Mi = (1 A V )C f Also, C Mo C f (if A V >>1) A 3dB drop in will occur at a frequency defined by f, that is sensitive to the DC operating conditions of the transistor. This variation in defines the upper cutoff frequency of the design. Problems: 1. The total decibel gain of a 3 stage system is 120dB. Determine the db gain of each stage, if the second stage has twice the decibel gain of the first and the third has 2.7 times decibel gain of the first. Also, determine the voltage gain of the each stage. Given: G dbt = 120dB We have Given, Therefore, G dbt = G db1 +G db2 +G db3 G db2 = 2G db1 G db3 = 2.7G db1 120dB = 5.7G db1 G db1 = 21.05, G db2 = 42.10 G db3 =56.84 We have G db = 10 log[v o / V i ] V o / V i = antilog ( G db /10) G1 = 127.35 G2 = 16.21k G3 = 483.05k 2. If the applied ac power to a system is 5 W at 100mV and the output power is 48W, determine a. The power gain in decibels 20

b. The output voltage c. The voltage gain in decibels, if the output impedance is 40k. d. The input impedance Given: P i = 5 W.V i = 100mV, P o = 48w R o = 40k a. G db =10 log [48/ 5 ] = 69.82 b. P o = V 2 o /R o, V o = P o R o = 1385.64V c. Voltage gain in db = 20 log [1385.64/100m] = 82.83 d. R i = V 2 i / P i = 2k General steps to solve a given problem: Normally, the amplifier circuit with all the values of biasing resistors, value of and values inter electrode capacitances ( C be, C bc and C ce ) will be given. It is required to calculate: f LS, f LC and f LE Also, f Hi, f Ho, f and f T Step1: Perform DC analysis and find the value of I E, and r e Find the value of R i ( Z i ) using the value of r e Find the value of A Vmid Step 2: Find f LS using the formula 1/2 (R i +R S )C S Step 3: Find f LC using the formula 1/2 (R C +R L )C C Step 4: Determine the value of f LE using the formula 1/2 R e C E where, R e = R E [(R S )/ + r e ] R S = R S R 1 R 2 Step 5: Determine f Hi using the formula 1/2 R Thi C i where R Thi = R 1 R 2 R S r e C i = C wi + C be + (1-A V )C bc Step 6: Determine f Ho using the formula 1/2 R Tho C o where R Tho = R C R L r o C o = C wo + C ce + C bc Step 7: Determine f using the formula 1/[2 mid r e (C +C u )] 21

Step 8: Determine f T using the formula f T = mid f Problem: Determine the following for the given network: 1. f Ls 2. f Lc 3. f LE 4. f Hi 5. f Ho 6. f and f T Given: V CC = 20V, R B = 470k, R C = 3k, R E = 0.91k, R S = 0.6k, R L = 4.7k C S = C C = 1 F, C E = 6.8 F C wi = 7pF, C wo =11pF, C be = 6pF, C be = 20pF and C ce = 10pF Solution: I B = (V CC V BE ) / [R B + ( +1)R E ] I B = 3.434mA I E = I B I E = 3.434mA r e = 26mV / I E r e = 7.56 22

A V = - (R C R L ) / r e A V = -242.2 Z i = R B r e Z i = 754.78 f LS = 1/2 (R i +R S )C S f LS = 117.47Hz where, f LC = 1/2 (R C +R L )C C f LC = 20.66 Hz f LE = 1/2 R e C E ; R e = [(R S / )+ r e ] R E R S = R B R S f LE = 1.752kHz C i = C wi + C be + (1 A V ) C bc C i = 1.48nF R Thi = R S R B r e R Thi = 334.27 f Hi = 1 / 2 (1.48nF)(334.37) f Hi = 321.70 KHz C o = C Wo + C ce + (1 1/A V ) C bc C o = 27.02pF R Tho = R C R L R Tho = 1.83K f Ho = 1 / 2 (27.02p)(1.83k) f Ho = 3.21MHz f = 1 / 2 (100) (7.56)( 20p + 6p) f = 8.09MHz f T = f f T = 803MHz 23

Equations - Logarithms 1. a = bx, x = log b a 2. G db = 10 log P 2 / P 1 3. G db = 20 log V 2 / V 1 Equations Low frequency response 1. A V = 1 / [1 j(f 1 /f)], where, f 1 = 1/2 RC Equations BJT low frequency response 1. f Ls = 1 / [2 (R S +R i )C S ], where, R i = R 1 R 2 r e 2. f LC = 1 /[2 (R o +R L )C C ], where, R o = R C r o 3. f LE = 1 / 2 R e C E, where, R e = R E ( R S / +r e ) and R S = R S R 1 R 2 Miller effect Capacitance C Mi = (1 A V )C f, C MO = ( 1 1/A V )C f BJT High frequency response: 1. A V = 1/ [1 + j(f/f 2 )] 2. f Hi = 1 / 2 R Thi C i, where, R Thi = R S R 1 R 2 R i, C i = C Wi +C be + C Mi 3. f HO = 1/ 2 R Tho C o, where, R Tho = R C R L r o C o = C Wo +C ce + C Mo 4. f = 1/[2 mid r e (C +C u )] 5. f T = f 24