Quad Matched Resistor Network Features n Excellent Matching A-Grade: 0.0% Matching B-Grade: 0.0% Matching n 0.ppm/ C Matching Temperature Drift n ±V Operating Voltage (±0V Abs Max) n ppm/ C Absolute Resistor Value Temperature Drift n Long-Term Stability: <ppm at 000 Hrs n C to 0 C Operating Temperature n -Lead MSOP Package Applications n Difference Amplifier n Reference Divider n Precision Summing /Subtracting Description The LT 00 is a quad resistor network with excellent matching specifications over the entire temperature range. Matching is also specified when the LT00 is configured in a difference amplifier. This enhanced matching specification guarantees CMRR performance to be up to better than independently matched resistors. All four resistors can be accessed and biased independently, making the LT00 a convenient and versatile choice for any application that can benefit from matched resistors. These resistor networks provide precise ratiometric stability required in highly accurate difference amplifiers, voltage references and bridge circuits. The LT00 is available in a space-saving -pin MSOP package, and is specified over the temperature range of C to 0 C. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Difference Amplifier Distribution of Matching Drift.pF 0 INPUTS REF LT00- R R R R LT RELATIVE OCCURRENCE 0 0.pF 00 TA0a LT00- CMRR > 0dB AT 00kHz THD < 0dB AT khz, 0V P-P 0 0.0.0.0. 0 0. 0. 0. 0. ppm/ C 00 G0
Absolute Maximum Ratings (Note ) Total Voltage (Across Any Pins) (Note )..±0V Power Dissipation (Each Resistor) (Note )... 00mW Operating Temperature Range (Note ) LT00C... 0 C to C LT00I... 0 C to C LT00H... 0 C to C LT00MP... C to 0 C Specified Temperature Range (Note ) LT00C... 0 C to 0 C LT00I... 0 C to C LT00H... 0 C to C LT00MP... C to 0 C Maximum Junction Temperature... 0 C Storage Temperature Range... C to 0 C Pin Configuration TOP VIEW R R R R MSE PACKAGE -LEAD PLASTIC MSOP θ JA = 0 C/W, θ JC = 0 C/W EXPOSED PAD (PIN 9) IS FLOATING Available Options PART NUMBER R = R (Ω) R = R (Ω) RESISTOR RATIO LT00-0k 0k : LT00-00k 00k : LT00-0k 00k :0 LT00- k k : LT00- M M : LT00- k k :
Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT00ACMSE-#PBF LT00ACMSE-#TRPBF LTFVR -Lead Plastic MSOP 0 C to 0 C LT00BCMSE-#PBF LT00BCMSE-#TRPBF LTFVR -Lead Plastic MSOP 0 C to 0 C LT00AIMSE-#PBF LT00AIMSE-#TRPBF LTFVR -Lead Plastic MSOP 0 C to C LT00BIMSE-#PBF LT00BIMSE-#TRPBF LTFVR -Lead Plastic MSOP 0 C to C LT00AHMSE-#PBF LT00AHMSE-#TRPBF LTFVR -Lead Plastic MSOP 0 C to C LT00BHMSE-#PBF LT00BHMSE-#TRPBF LTFVR -Lead Plastic MSOP 0 C to C LT00BMPMSE-#PBF LT00BMPMSE-#TRPBF LTFVR -Lead Plastic MSOP C to 0 C LT00ACMSE-#PBF LT00ACMSE-#TRPBF LTGBG -Lead Plastic MSOP 0 C to 0 C LT00BCMSE-#PBF LT00BCMSE-#TRPBF LTGBG -Lead Plastic MSOP 0 C to 0 C LT00AIMSE-#PBF LT00AIMSE-#TRPBF LTGBG -Lead Plastic MSOP 0 C to C LT00BIMSE-#PBF LT00BIMSE-#TRPBF LTGBG -Lead Plastic MSOP 0 C to C LT00AHMSE-#PBF LT00AHMSE-#TRPBF LTGBG -Lead Plastic MSOP 0 C to C LT00BHMSE-#PBF LT00BHMSE-#TRPBF LTGBG -Lead Plastic MSOP 0 C to C LT00BMPMSE-#PBF LT00BMPMSE-#TRPBF LTGBG -Lead Plastic MSOP C to 0 C LT00ACMSE-#PBF LT00ACMSE-#TRPBF LTGBH -Lead Plastic MSOP 0 C to 0 C LT00BCMSE-#PBF LT00BCMSE-#TRPBF LTGBH -Lead Plastic MSOP 0 C to 0 C LT00AIMSE-#PBF LT00AIMSE-#TRPBF LTGBH -Lead Plastic MSOP 0 C to C LT00BIMSE-#PBF LT00BIMSE-#TRPBF LTGBH -Lead Plastic MSOP 0 C to C LT00BHMSE-#PBF LT00BHMSE-#TRPBF LTGBH -Lead Plastic MSOP 0 C to C LT00ACMSE-#PBF LT00ACMSE-#TRPBF LTGCF -Lead Plastic MSOP 0 C to 0 C LT00BCMSE-#PBF LT00BCMSE-#TRPBF LTGCF -Lead Plastic MSOP 0 C to 0 C LT00AIMSE-#PBF LT00AIMSE-#TRPBF LTGCF -Lead Plastic MSOP 0 C to C LT00BIMSE-#PBF LT00BIMSE-#TRPBF LTGCF -Lead Plastic MSOP 0 C to C LT00AHMSE-#PBF LT00AHMSE-#TRPBF LTGCF -Lead Plastic MSOP 0 C to C LT00BHMSE-#PBF LT00BHMSE-#TRPBF LTGCF -Lead Plastic MSOP 0 C to C LT00BMPMSE-#PBF LT00BMPMSE-#TRPBF LTGCF -Lead Plastic MSOP C to 0 C LT00ACMSE-#PBF LT00ACMSE-#TRPBF LTGCG -Lead Plastic MSOP 0 C to 0 C LT00BCMSE-#PBF LT00BCMSE-#TRPBF LTGCG -Lead Plastic MSOP 0 C to 0 C LT00AIMSE-#PBF LT00AIMSE-#TRPBF LTGCG -Lead Plastic MSOP 0 C to C LT00BIMSE-#PBF LT00BIMSE-#TRPBF LTGCG -Lead Plastic MSOP 0 C to C LT00BCMSE-#PBF LT00BCMSE-#TRPBF LTGCK -Lead Plastic MSOP 0 C to 0 C LT00BIMSE-#PBF LT00BIMSE-#TRPBF LTGCK -Lead Plastic MSOP 0 C to C LT00BHMSE-#PBF LT00BHMSE-#TRPBF LTGCK -Lead Plastic MSOP 0 C to C LT00BMPMSE-#PBF LT00BMPMSE-#TRPBF LTGCK -Lead Plastic MSOP C to 0 C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Electrical Characteristics The l denotes the specifications which apply over the full specified temperature range, otherwise specifications are at T A = C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS R/R Resistor Matching Ratio (Any Resistor to Any Other Resistor) A-Grade T A = 0 C to 0 C T A = 0 C to C T A = 0 C to C l l l ±0.00 ±0.00 ±0.0 ±0.0 B-Grade l ±0.0 % ( R/R) CMRR Matching for CMRR A-Grade (Note ) l ±0.00 % B-Grade (Note ) l ±0.0 % ( R/R)/ T Resistor Matching Ratio Temperature Drift (Note ) l ±0. ± ppm/ C Resistor Voltage Coefficient l <0. ppm/v Excess Current Noise Mil-Std-0 Method 0 < db R Absolute Resistor Tolerance A-Grade l ±. % B-Grade l ± % Distributed Capacitance Resistor to Exposed Pad Resistor to Resistor.. pf pf R/ T Absolute Resistor Value Temperature Drift (Note ) l 0 ppm/ C Resistor Matching Ratio Long-Term Drift C 000Hours, 0mW 0 C 000Hours, 0mW Resistor Matching Ratio Moisture Resistance C %R.H. Hours < ppm Resistor Matching Ratio Thermal Shock/Hysteresis 0 C to 0 C, Cycles < ppm Resistor Matching Ratio IR Reflow C to 0 C, Cycles < ppm Resistor Matching Ratio Accelerated Shelf Life 0 C, 000Hours 0 ppm Harmonic Distortion 0V P-P, khz, Difference Amplifier 0 dbc < < % % % % ppm ppm Note : Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note : The instantaneous difference between the highest voltage applied to any pin and the lowest voltage applied to any other pin should not exceed the Absolute Maximum Rating. This includes the voltage across any resistor, the voltage across any pin with respect to the exposed pad of the package, and the voltage across any two unrelated pins. Note : In order to keep the junction temperature within the Absolute Maximum Rating, maximum power dissipation should be derated at elevated ambient temperatures. Note : The LT00C is guaranteed functional over the operating temperature range of 0 C to C. The LT00C is designed, characterized and expected to meet specified performance from 0 C to C but is not tested or QA sampled at these temperatures. The LT00I is guaranteed to meet specified performance from 0 C to C. The LT00H is guaranteed to meet specified performance from 0 C to C and is 00% tested at these temperature extremes. The LT00MP is guaranteed to meet specified performance from C to 0 C and is 00% tested at these temperature extremes. Note : This parameter is not 00% tested. Note : ( R/R) CMRR (Matching for CMRR) is a metric for the contribution of error from the LT00 when configured in a difference amplifier (see Difference Amplifier in Typical Applications): ( R/R) = CMRR R R R R R R The resistor contribution to CMRR can then be calculated in the following way: R CMRR = ( R/R) R CMRR R R R R For LT00 options with resistor ratio :, the resistor contribution to CMRR can be simplified: CMRR ( R/R) CMRR
Typical Performance Characteristics 0 Distribution of Matching Drift Change in Matching vs Time RELATIVE OCCURRENCE 0 0 CHANGE IN RESISTOR MATCHING (ppm) 0 0 0.0.0.0. 0 0. 0. 0. 0. ppm/ C 00 G0 0 00 00 00 00 000 TIME (HOURS) 00 G0
Applications Information Where to Connect the Exposed Pad The exposed pad is not DC connected to any resistor terminal. Its main purpose is to reduce the internal temperature rise when the application calls for large amounts of dissipated power in the resistors. The exposed pad can be tied to any voltage (such as ground) as long as the absolute maximum ratings are observed. There is capacitive coupling between the resistors and the exposed pad, as specified in the Electrical Characteristics table. To avoid interference, do not tie the exposed pad to noisy signals or noisy grounds. Connecting the exposed pad to a quiet AC ground is recommended as it acts as an AC shield and reduces the amount of resistor-resistor capacitance. Thermal Considerations Each resistor is rated for relatively high power dissipation, as listed in the Absolute Maximum Ratings section of this data sheet. To calculate the internal temperature rise inside the package, add together the power dissipated in all of the resistors, and multiply by the thermal resistance coefficient of the package (θ JA or θ JC as applicable). For example, if each resistor dissipates 0mW, for a total of W, the total temperature rise inside the package equals 0 C. All resistors will be at the same temperature, regardless of which resistor dissipates more power. The junction temperature must be kept within the Absolute Maximum Rating. At elevated ambient temperatures, this places a limit on the maximum power dissipation. In addition to limiting the maximum power dissipation, the maximum voltage across any two pins must also be kept less than the absolute maximum rating. ESD The LT00 can withstand up to ±kv of electrostatic discharge (ESD, human body). To achieve the highest precision matching, the LT00 is designed without explicit ESD internal protection diodes. ESD beyond this voltage can damage or degrade the device including causing pin-to-pin shorts. To protect the LT00 against large ESD strikes, external protection can be added using diodes to the circuit supply rails or bidirectional Zeners to ground (Figure ). BAV99 EXTERNAL CONNECTOR V V LT00 Figure EXTERNAL CONNECTOR LT00 UMZK 00 F0 Matching Specification The LT00 specifies matching in the most conservative possible way. In each device, the ratio error of the largest of the four resistors to the smallest of the four resistors meets the specified matching level. Looser definitions would compare each resistor value to the average of the resistor values, which would typically result in specifications that appear twice as good as they are per the LT00 s more conservative definition. The following two examples illustrate this point. In an inverting gain-of- amplifier, if the largest resistor is allowed to deviate only 0.0% from the smallest resistor, then the worst-case gain can be.0000/0.9999 =.000, which is a 0.0% error from the ideal.0000. That is the LT00 definition. In a looser definition, if each resistor would be allowed to deviate by 0.0% from the average, then the worst-case gain could be.000/0.9999 =.000, which is a 0.0% error from the ideal.0000. In a divide-by- resistor divider network, if the largest resistor is allowed to deviate only 0.0% from the smallest resistor, then the worst-case ratio can be.0000/(.0000 0.9999) = 0.000, which is a 0.00% error from the ideal 0.0000. That is the LT00 definition. In a looser definition, if each resistor would be allowed to deviate by 0.0% from the average, then the worst-case ratio could be.000/(.000 0.9999) = 0.000, which is a 0.0% error from the ideal 0.0000.
Typical Applications Difference Amplifier.pF INPUTS REF LT00- R R R R LT.pF LT00- CMRR > 0dB AT 00kHz THD < 0dB AT khz, 0V P-P 00 TA0 Low Noise Reference Divider with Op Amp Input Bias Current Balancing V LTC -.09.09V.µF LT00- R R R R V LT00.0V 0µF 00 TA0 Micropower Reference Divide-by- V IN.V TO V LT- V µf LT00- R R V IN R R LT.V µf 00 TA0
Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MSE Package -Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 0-0- Rev I). ± 0.0 (.0 ±.00) 0.9 ± 0. (.0 ±.00) BOTTOM VIEW OF EXPOSED PAD OPTION. (.0). (.0) 0.9 REF. (.0) MIN 0. ± 0.0 (.0 ±.00) TYP. ± 0.0 (.0 ±.00) 0. (.0) BSC.0. (..).00 ± 0.0 (. ±.00) (NOTE ) DETAIL B 0. (.00) REF 0.0 REF DETAIL B CORNER TAIL IS PART OF THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE RECOMMENDED SOLDER PAD LAYOUT GAUGE PLANE 0. (.00) 0. (.00) DETAIL A NOTE:. DIMENSIONS IN MILLIMETER/(INCH). DRAWING NOT TO SCALE 0 TYP 0. ± 0. (.0 ±.00) DETAIL A SEATING PLANE.90 ± 0. (.9 ±.00).0 (.0) MAX 0. 0. (.009.0) TYP 0. (.0) BSC. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.mm (.00") PER SIDE. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.mm (.00") PER SIDE. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.0mm (.00") MAX. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.mm (.00") PER SIDE..00 ± 0.0 (. ±.00) (NOTE ) 0. (.0) REF 0.0 ± 0.00 (.00 ±.00) MSOP (MSE) 090 REV I
Revision History REV DATE DESCRIPTION PAGE NUMBER A / Added LT00-, LT00-, LT00-. Changes reflected throughout the data sheet. -0 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 9
Typical Application Precision Single-Ended to Differential Conversion IN LT00- R R R R LTC OUTPUT 00 TA0 THD = 0dB AT khz, V P-P GROUNDING EXPOSED PAD RESULTS IN STABLE, NO OVERSHOOT RESPONSE Related Parts PART NUMBER DESCRIPTION COMMENTS LT99 Precision Difference Amplifier 0.0% Resistor Matching,00µA Op Amp LT990 High Voltage Difference Amplifier ±0V Input Range LT Instrumentation Amplifier >90dB CMRR 0 LT 0 REV A PRINTED IN USA Linear Technology Corporation 0 McCarthy Blvd., Milpitas, CA 90- (0) -900 FAX: (0) -00 www.linear.com LINEAR TECHNOLOGY CORPORATION 0