JFET/MESFET JFET: small gate current (reverse leakage of the gate-to-channel junction) More gate leakage than MOSFET, less than bipolar. JFET has higher transconductance than the MOSFET. Used in low-noise, high input-impedance op-amps and sometimes used in switching applications. MESFET: usually constructed in compound semiconductor technologies lacking high quality surface passivation such as GaAs, InP, or SiC, and are faster but more expensive than silicon-based JFETs or MOSFETs. Production MESFETs are operated up to approximately 30 GHz, and are commonly used for microwave frequency communications and radar. Majority carrier device (like Schottky diode).
SiC JFET p n p
MODFET (HEMT) Modulation doped field effect transistor (MODFET) High electron mobility transistor (HEMT) Modulation doped field effect transistor High electron mobility transistor V T = Threshold voltage = voltage where charge is depleted
Heterostructure pn junction formed from two semiconductors with different band gaps
PhD Thesis Sergey Smirnov http://www.iue.tuwien.ac.at/phd/smirnov/node71.html MODFET/HEMT undoped channel HEMT: HEMT devices are found in cell phones, electronic warfare systems, microwave and millimeter wave communications, radar, and radio astronomy.
MODFET (HEMT) j = nev = neµ E d n y I = jzt = Zeµ n E n s y t is the thickness of the 2DEG n s is the sheet charge at the interface in C/cm 2. n = n s t VG V( y) is the voltage between the gate and the 2DEG n s = 0 when V V( y) = V G T gate y 2DEG q = CV ( ) en ( y) = C V V ( y) V s g G T
MODFET (HEMT) ( ) en ( y) = C V V ( y) V s g G B T is the charge on the 2DEG at point y The charge is zero when V V ( y) = V G B T solve for n s n s ( y) = ( ( ) ) C V V y V g G B T e Substitute this in Ohm's law: I = jzt = Zeµ n E n s y
MODFET (HEMT) n s I = jzt = Zeµ n E ( y) = n s y ( ( ) ) C V V y V g G T substitute n s in the top equation and substitute e E y = dv ( y) dy ( ( )) I= Zµ CV V V y n G T dv ( y) dy integrate along the length of the channel L V D 0 0 ( ( )) Idy = Zµ C V V V y dv n G T 2 Z VD ( ) L µ ID = nc VG VT VD 2
MODFET (HEMT) 2 Z VD n ( G T) D L µ 2 I = C V V V di Z nc VG VT VD dv = L µ = D ( ) 0 Set the derivative = 0 to find saturation voltage ( ) V = V V sat G T Substitute the saturation voltage into the formula at the top to find saturation current I = Z CV V 2L µ ( ) 2 sat n G T
MODFET/HEMT HEMT: HEMT devices are found in many types of equipment ranging from cell phones and DBS receivers to electronic warfare systems, microwave and millimeter wave communications, radar, and radio astronomy. 600 GHz
GaN-HEMT Source: Oliver Hilt, Bauteile aus GaN, ETG Tagung Bad Nauheim 2011
Quantized conduction R K = h/e 2 = 25812.807557(18) Ω Quantized conductance of point contacts in a two-dimensional electron gas, B. J. van Wees, H. van Houten, C. W. J. Beenakker, J. G. Williamson, L. P. Kouwenhoven, D. van der Marel, and C. T. Foxon, Phys. Rev. Lett. 60, 848-850 (1988).
Quantized conduction R K = h/e 2 = 25812.807557(18) Ω Formation and Manipulation of a Metallic Wire of Single Gold Atoms, A. I. Yanson, G. Rubio Bollinger, H.E. van den Brom, N. Agraït, J.M. van Ruitenbeek, Nature Oct. 1998.
Quantum Hall Effect Bz ρxy = = ne v = 1, 2, 3 h ve 2 Shubnikov-De Haas oscillations Resistance standard 25812.807557(18) Ω
Technische Universität Graz Institute of Solid State Physics MOSFETs functions as a switch ~ 1 billion /chip n - channel p - channel
Self-aligned fabrication p-si 100 wafer
Dry oxidation SiO 2 gate oxide p-si
gate oxide HfO 2 SiO 2 p-si
photoresist polysilicon CVD: SiH 4 @ 580 to 650 C TiN (CVD) 30 70 μω cm Conductive diffusion barrier SiO 2 /HfO 2 p-si
Implant polysilicon gate Expose resist Develop Etch poly and TiN Strip resist Implant source and drain TiN p-si SiO 2 /HfO 2
Self-aligned fabrication polysilicon gate n+ n+ p-si
Spacer PECVD SiN x SiN x polysilicon gate n+ n+ p-si
Spacer Etch back to leave only sidewalls SiN x polysilicon gate n+ n+ p-si
Implant polysilicon gate n+ n+ p-si
Salicide (Self-aligned silicide) Transition metal (Ti, Co,W) is deposited (CVD). During a high temperature step is reacts to a silicide (TiSi 2 ). No silicide is formed on nitride or oxide. polysilicon gate TiSi 2 (metal) n+ n+ p-si
CMOS Fransila
MOS capacitor
Accumulation no depletion layer metal oxide semiconductor -t ox 0 ev N A n i2 /N A
Accumulation E
Depletion
Flat band voltage no depletion layer ev fb N A x n i2 /N A If φ s = φ m, the flatband voltage is the zero bias voltage
Zero bias metal oxide semiconductor -t ox 0 eφ m Al 4.1 ev p+ poly 4.05 ev n+ poly 5.05 ev Can be in accumulation or depletion depending on workfunctions
Weak Inversion Majority carriers at x = 0 change from p to n n > p at the interface
Threshold voltage n = N A Strong inversion: n = N A at x = 0, the semiconductor-oxide interface
Inversion n > N A at x = 0, the semiconductor-oxide interface
MOS capacitor In inversion, the charge in the inversion layer is: mobile charge Q = -C ox (V G -V B -V T ) fixed charge Mobile charge per unit area Specific capacitance F/m 2
MOS capacitor n
http://pages.physics.cornell.edu/sss/ Poisson equation 2 V = ρ ε
charge density (depletion) x p e t < x< 0 ρ( x) = 0 ox 0 < x < x ρ( x) = en p x < x ρ( x) = 0 p A
electric field (depletion) E E is decreased by a factor of the dielectric constant ε = r E E vacuum dielectric ε ox = 4 ε s = 12
electric field x p -e x< t Ex ( ) = 0 ox ε S + tox < x< 0 Ex ( ) = Ex ( = 0 ) = ε en A 0 < x< xp Ex ( ) = x x ε x < x Ex ( ) = 0 p ox s ( p) en x ε A ox p x p
electrostatic potential x< t φ( x) = φ ox x p x p IB 2 en Axp en Axp tox < x< 0 φ( x) = φp + + x 2ε ε en A 0 < x< x φ( x) = φ + x x 2ε x < x φ( x) = φ p gate s ( ) p p p s (We still don't know x p ) p ox 2 ( )
Band bending at inversion Far on the p side n = N A at threshold n 2 n i EF E c = = Nc exp NA kt B 2 n i EF Ec = kt B ln NANc At the interface, n = N A EF E c = Ncexp kt B N N A A EF Ec = kt B ln Nc The voltage between the semiconductor-oxide interface and the body ev kt N kt n V kt N V 2 2 A i A IB = B ln B ln + FB = B ln 2 + FB Nc NANc ni V IB is the voltage between the interface and the body ev IB ln ( a) ln ( b) ln a = b
Strong inversion n s = N A at the semiconductor-oxide interface ev kt N V kt N V 2 A A IB = B ln 2 ln 2 + FB = B + FB ni ni The depletion width remains constant in inversion. ln 2 ( a ) = 2ln ( a)
Depletion width in strong inversion V IB = en x A 2ε 2 p ev IB N A = 2kBT ln ni x 2 V N = ε = 2 ε ktln IB A p(max) 2 B en A e N A ni The depletion width remains constant in inversion.
Depletion width
Electric field at semi-oxide interface at strong inversion ev IB N A (strong inversion) = 2kBT ln ni E s VIB 2VIB N A N A = 2 = = 2 kt B ln xp(max) 2εV ε n IB i en A V IB = E s x p /2 = area of the triangle ε 2ε N 2 A N ln A Eox = Es = kt B εox εox ε ni p
Threshold voltage ( strong inversion) ( strong inversion) V = E t + V + V T ox ox IB FB V T N A NkT A B ln 2εt n ox i kt B N A = + 2 ln + V εox ε e ni FB εt ε ox ox E inversion V IB Small V T requires a small t ox and a large ε ox.
MOS capacitance C ox = ε t ox ox C j = ε x p C 1 1 = + Cox C j 1 Accumulation Inversion V FB
CCD devices