2N72DW OptiMOS Small-Signal-Transistor Features Dual N-channel Enhancement mode Logic level Avalanche rated Fast switching Product Summary V DS 6 V R DS(on),max V GS =1 V 3 W V GS =4.5 V 4 I D.3 A Qualified according to AEC Q11 1% lead-free; RoHS compliant Halogen-free according to IEC61249-2-21 PG-SOT363 6 5 4 1 2 3 Type Package Tape and Reel Information Marking HalogenFree Packing 2N72DW PG-SOT363 H6327: 3 pcs/reel X8s Yes Non Dry Parameter 1) Symbol Conditions Value Unit Continuous drain current I D T A =25 C.3 A T A =7 C.24 Pulsed drain current I D,pulse T A =25 C 1.2 Avalanche energy, single pulse E AS I D =.3 A, R GS =25 W 1.3 mj Reverse diode dv /dt dv /dt I D =.3 A, V DS =48 V, di /dt =2 A/µs, T j,max =15 C 6 kv/µs Gate source voltage V GS ±2 V ESD class JESD22-A114 (HBM) class (<25V) Power dissipation P tot T A =25 C.5 W Operating and storage temperature T j, T stg -55... 15 C IEC climatic category; DIN IEC 68-1 55/15/56 1) Remark: one of both transistors in operation. Rev.2.3 page 1 214-9-19
2N72DW Parameter Symbol Conditions Values Unit min. typ. max. Thermal characteristics Thermal resistance, junction - minimal footprint 2) R thja - - 25 K/W Electrical characteristics, at T j =25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS = V, I D =25 µa 6 - - V Gate threshold voltage V GS(th) V DS =V GS, I D =25 µa 1.5 2.1 2.5 Drain-source leakage current I D (off) V DS =6 V, V GS =-1 V, T j =25 C - -.1 µa V DS =6 V, V GS = V, T j =15 C - - 5 Gate-source leakage current I GSS V GS =2 V, V DS = V - 1 1 na Drain-source on-state resistance R DS(on) V GS =4.5 V, I D =.25 A - 2. 4 W V GS =1 V, I D =.5 A - 1.6 3 Transconductance g fs V DS >2 I D R DS(on)max, I D =.24 A.2.36 - S 2) Perfomed on a 4x4mm 2 FR4 PCB with both sided Cu sense-force traces, each 1mm wide, 7μm thick and 2mm long. Rev.2.3 page 2 214-9-19
2N72DW Parameter Symbol Conditions Values Unit min. typ. max. Dynamic characteristics Input capacitance C iss - 13 2 pf Output capacitance C oss V GS = V, V DS =25 V, f =1 MHz - 4.1 6 Reverse transfer capacitance C rss - 2. 3 Turn-on delay time t d(on) - 3. 4.5 ns Rise time t r V DD =3 V, V GS =1 V, - 3.3 5 Turn-off delay time t d(off) I D =.5 A, R G,ext =6 W - 5.5 9 Fall time t f - 3.1 5 Gate Charge Characteristics Gate to source charge Q gs -.5.1 nc Gate to drain charge Q gd V DD =48 V, I D =.5 A, -.2.4 Gate charge total Q g V GS = to 1 V -.4.6 Gate plateau voltage V plateau - 4. - V Reverse Diode Diode continous forward current I S T A =25 C - -.3 A Diode pulse current I S,pulse - - 1.2 Diode forward voltage V SD V GS = V, I F =.5 A, T j =25 C -.96 1.2 V Reverse recovery time t rr V R =3 V, I F =.5 A, - 8.5 13 ns Reverse recovery charge Q rr di F /dt =1 A/µs - 2.4 4 nc Rev.2.3 page 3 214-9-19
I D [A] Z thja [K/W] P tot [W] I D [A] 2N72DW 1 Power dissipation 2 Drain current P tot =f(t A ) I D =f(t A ); V GS 1 V.35.5.3.4.25.3.2.15.2.1.1.5 4 8 12 16 4 8 12 16 T A [ C] T A [ C] 3 Safe operating area 4 Max. transient thermal impedance I D =f(v DS ); T A =25 C; D = Z thja =f(t p ) parameter: t p parameter: D =t p /T 1 1 1 3 limited by on-state resistance 1 1 µs.5 1 µs 1 µs 1 2.2 1-1 1 ms 1 ms.1.2.1.5 single pulse 1 1 1-2 DC 1-3 1 1 1 V DS [V] 1 1-5 1-4 1-3 1-2 1-1 1 1 1 1 2 1 3 t p [s] Rev.2.3 page 4 214-9-19
I D [A] g fs [S] I D [A] R DS(on) [W] 2N72DW 5 Typ. output characteristics 6 Typ. drain-source on resistance I D =f(v DS ); T j =25 C R DS(on) =f(i D ); T j =25 C parameter: V GS.6 5 V parameter: V GS 6.5 1 V 7 V 4.5 V 4 V 5 2.9 V 3.2 V 3.5 V 4 V.4 4.3 3 3.5 V 4.5 V.2 2 5 V 7 V 3.2 V 1 V.1 1 2.9 V 1 2 3 4 5.1.2.3.4.5 V DS [V] I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D =f(v GS ); V DS >2 I D R DS(on)max g fs =f(i D ); T j =25 C.6.5.5.4.45.4.35.3.3.25.2.2.15.1.1.5 1 2 3 4 5 V GS [V]..1.2.3.4 I D [A] Rev.2.3 page 5 214-9-19
C [pf] I F [A] R DS(on) [W] V GS(th) [V] 2N72DW 9 Drain-source on-state resistance 1 Typ. gate threshold voltage R DS(on) =f(t j ); I D =.3 A; V GS =1 V V GS(th) =f(t j ); V DS =V GS ; I D =25 µa parameter: I D 6. 3.2 5. 2.8 2.4 98 % 4. 98 % 2 typ 3. 1.6 2. 1.2 2 % typ.8 1..4. -6-2 2 6 1 14 T j [ C] -6-2 2 6 1 14 T j [ C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(v DS ); V GS = V; f =1 MHz; T j =25 C I F =f(v SD ) parameter: T j 1 2 1 15 C, 98% 15 C 25 C 1 1 Ciss 1-1 25 C, 98% Coss 1-2 Crss 1 1 2 3 1-3.4.8 1.2 1.6 V DS [V] V SD [V] Rev.2.3 page 6 214-9-19
V BR(DSS) [V] I AV [A] V GS [V] 2N72DW 13Avalanche characteristics I AS =f(t AV ); R GS =25 Ω parameter: T J(start) 1 14 Typ. gate charge V GS =f(q gate ); I D =.5 A pulsed parameter: V DD 1 9 1-1 1 C 25 C 8 7 3 V 125 C 6 12 V 48 V 1-2 5 4 1-3 1 1 1 1 2 1 3 3 2 1 t AV [µs].1.2.3.4.5 Q gate [nc] 15 Drain-source breakdown voltage V BR(DSS) =f(t j ); I D =25 µa 7 65 6 55 5-4 4 8 12 16 T j [ C] Rev.2.3 page 7 214-9-19
2N72DW SOT363 Package Outline: Footprint: Packing: Note: For symmetric types there is no defined Pin 1 orientation in the reel. Dimensions in mm Rev.2.3 page 8 214-9-19
2N72DW Published by Infineon Technologies AG 81726 Munich, Germany 28 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev.2.3 page 9 214-9-19