Departement Elektriese, Elektroniese en Rekenaar-Ingenieurswese Department of Electrical, Electronic and Computer Engineering Eksamen Invulvraestel Kopiereg voorbehou Vakkursus ERS220 22 November 2008 Examination Fill in paper Copyright reserved Course ERS220 22 November 2008 Student se besonderhede: Student's details: Van (opsioneel): Surname (optional): Voorname (opsioneel): First name (optional): Tel. nr. gedurende toetsreeks: Tel no. during test series: Studentenommer: Student number: Tel. nr. na toetsreeks: Tel. no. after test series: Toetsinligting: Test information: Maksimum punte: Maximum marks: 175 Duur van vraestel: Duration of paper: 3 Hours 3 Ure Totale aantal bladsye (hierdie blad ingesluit): Total numer of pages (including this page): 20 Punt: Mark: Volpunte: Full marks: 170 Open / closed book: Oopboek / toeboek: Closed Toe BELANGRIK- IMPORTANT 1. The examination regulations of the University of Pretoria apply. Die eksamenregulasies van die Universiteit van Pretoria geld. 2. No programmable calculators are allowed. Geen programmeerbaar sakrekenaars word toegelaat nie. 3. No notes are allowed. Geen notas word toegelaat nie. 4. Show all calculations. Toon all berekeninge. 5. Complete all the sections. Voltooi al die afdelings. Internal Examiner(s): Interne Eksaminator(e): S. Reddy External Examiner: Eksterne Eksaminator: D. V. Bhatt 1
Section A: Multiple Choice And Short Questions [18] 1. Tick the correct box / Tick die korrekte boks: (12) 1.1. Which statement best describes the behaviour of a Dynamic RAM / Watter verklaring beskryf die gedrag van 'n Dynamic RAM die beste a) Once a word is written at a location, it remains stored as long as power is applied to the baan, unless the same location is written again. / Sodra n woord geskrywe word by n plek, bly dit gestoor so lank as wat krag aangewend wordtot die baan tensy dieselfde opstelling is weer geskryf word. b) Once a word is written at a location, it remains stored as long as power is applied to the baan and even if the same location is written again. / Sodra 'n woord geskrf word by n plek bly dit gestoor so lank as wat krag aangewend word tot die baan selfs indien dieselfde opstellling weer geskrywe word. c) Once a word is written at a location, it remains stored, even after power is removed. / Sodra 'n woord is geskrywe word by 'n opstelling, bly dit gestoor, selfs nadat krag verwyder is. d) The data stored at each location must be refreshed periodically by reading it and then writing it back again, or else it disappears. / Die data gestoor by elke opstelling moet van tyd tot tyd verfris word deur dit te lees en dan terug te skryf, anders verdwyn dit. a b c d 1.2. Which of the following descriptions is not true? A combinational logic function can be represented by a / Watter van die volgende beskrywings is nie waar nie? 'n kombinatoriese logiese funksie kan verteenwoordig word deur 'n a) maxterm list using the Π notation. / maksterme lys deur gebruik te maak van die Π notasie. b) minterm list using the Π notation. / minterme lys deur gebruik te maak van die Π notasie. c) truth table. / waarheidstabel d) Karnaugh map(s). / Karnaugh kaart(e) a b c d 1.3. A sequential device that normally samples its inputs continuously and changes its output anytime is called a / 'n Sekwensiële baan wat normaalweg sy insette versamel aanhoudelik en sy uitsette verander enigetyd is genoem 'n a) flip-flop. / wipbaan. b) latch. / grendel c) latch with enable. / grendel met ontsper d) Either b) or c) / Een van beide b) of c) a b c d ERS 220 Examination 2008 2
1.4. (DDR) SDRAM can double the data rate of SDRAM by / (DDR) SDRAM kan die data tempo van SDRAM verdubbel deur a) transferring data on the rising edge of the clock only. / verplaas data na die stygende rand van die klok alleen. b) transferring data on both edges of the clock, rising and falling. / verplaas data na beide kante van die klok, opstygend en vallend. c) transferring data anytime the clock is positive. / verplaas data enige tyd wat die klok positief is. d) doubling the clock of a standard DRAM and transferring data on the rising edge of the clock only. / verdubbel die horlosie van 'n standaard DRAM en verplaas die data na die stygende rand van die klok alleen. a b c d 1.5. A LSI / IC can contain / n LSI / IC kan bevat a) between 1 and 20 gates. / tussen 1 en 20 hekke. b) between 20 and 100 gates. / tussen 20 en 100 hekke. c) between 100 and 200 gates. / tussen 100 en 200 hekke. d) more than 200 gates. / meer as 200 hekke. a b c d 1.6. Which of the following commercial ROM types can be written to only one time? / Watter van die volgende kommersieël "ROM" tipe kan kan net eenkeer geskryf word? a) PROM b) Mask ROM c) Mask EEPROM d) Both a) and b) / beide a) en b) a b c d 1.7. If a devices input code has fewer bits than the output code, the device is usually called / As n digitale baan se insetkode minder bisse het as die uitsetkode, dan is die baan n a) a decoder. / n dekodeerder. b) an encoder. / n enkodeerder. c) Neither a) nor b) / Ook nie a) nie nog minder b) a b c ERS 220 Examination 2008 3
1.8. Which statement best describes the behaviour of a Static RAM / Watter verklaring beskryf die gedrag van 'n Static RAM die beste a) Once a word is written at a location, it remains stored as long as power is applied to the circuit, unless the same location is written again. / Sodra n woord geskrywe word by n plek, bly dit gestoor so lank as wat krag aangewend wordtot die baan tensy dieselfde opstelling is weer geskryf word. b) Once a word is written at a location, it remains stored, even after power is removed. / Sodra 'n woord is geskrywe word by 'n opstelling, bly dit gestoor, selfs nadat krag verwyder is. c) Once a word is written at a location, it remains stored as long as power is applied to the circuit and even if the same location is written again. / Sodra 'n woord geskrf word by n plek bly dit gestoor so lank as wat krag aangewend word tot die baan selfs indien dieselfde opstellling weer geskrywe word. d) The data stored at each location must be refreshed periodically by reading it and then writing it back again, or else it disappears. / Die data gestoor by elke opstelling moet van tyd tot tyd verfris word deur dit te lees en dan terug te skryf, anders verdwyn dit. a b c d 2. Draw the general structure of a clocked synchronous Mealy state machine with pipelined outputs. / Skets die algemene struktuur van n geklokte sinkrone Mealy toestandsmasjien met pipelined afvoere. (6) ERS 220 Examination 2008 4
Section B: Number Systems And Codes [23] 1. Use 2 s-complement partial product multiplication to multiply the following 6-bit 2 s- Complement numbers. Verify that your answer is correct. / Vermenigvuldig die volgende 6-bis 2 s- Complement getalle deur gebruik te maak van 2 s-complement partial product vermenigvuldig. Verifeer die korrektheid van jou antwoord. (8) 0 0 1 1 0 1 1 0 1 1 1 0 ERS 220 Examination 2008 5
2. Add the following numbers using Hexidecimal arithmetic. Show all calculations. / Voeg die volgende nommers gebruik Hexidecimal rekenkunde. Toon almal berekenings. (6) C X 16 C 3 9 B E Y 16 D A 1 F 7 X 16 + Y 16 3. Convert the following base 8 number to base 16. / Skakel die volgende basis 8 nommer oor na basis 16. (3) 543210.765 8 ERS 220 Examination 2008 6
4. In a system employing a 7-bit Hamming Code the codeword, 1011101, is received. The codeword is arranged in the same sequence as the parity-check matrix below. / In n stelsel wat gebruik maak van n 7-bis Hamming Kode word die volgende kodewoord ontavang, 1011101. Die kodewoord is in die selfde volgorde as die parity-check matrix hieronder georganiseer. 4.1. Determine the syndrome (position of the error bit) of the codeword. / Bepaal die sindroom (posisie van die vout-bis) van die kodewoord. (4) 4.2. Determine the correct transmitted codeword arranged in same sequence as the parity check matrix above. / Bepaal die korrekte kodewoord wat oorspronklik versend is in die selfde volgorde as die parity-check matrix bo georganiseer. (2) ERS 220 Examination 2008 7
Section C: Digital Circuits [20] 1. The following figure shows a CMOS circuit. / Die volgende figuur toon n CMOS stroombaan. 1.1. Construct a Truth Table (Q = ON or OFF, Z = H or L). / Stel n waarheidstabel saam (Q = ON or OFF, Z = H of L). (8) A B C Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Z 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 ERS 220 Examination 2008 8
2. The following diagram shows the equivalent circuit for analysing transition times of a CMOS output. The typical on resistances of the PMOS transistor is R p = 225 Ω and for the NMOS R n = 115 Ω. The load capacitance of AC load can be modelled as C L = 120pF, the load voltage as V L = 1.7 V, and the load resistance as R L = 650 Ω. Assume GND = 0 V and VDD = 4.7 V. / Die volgende diagram wys die ekwivalente stroombaan om die transisie tye van 'n CMOS uitset te analiseer. Die tipiese aan weerstand van die PMOS transistor is R p = 225Ω en vir die NMOS R n = 115Ω. Die las kapasitansie van die AC las kan beskou word as C L = 120pF, die las spanning as V L = 1.7 V, en die las weerstand as R L = 650 Ω. Aanvaar GND = 0 V en VDD = 4.7 V. 2.1. Determine the Thevenin equivalent of the Voltage (V Thev ), Current (I Thev ) and Resistance (R Thev ) in the LOW state. N.B. R L 0 Ω and V L 0 V. / Bepaal diethevenin ekwivalente van die Spanning (V Thev ), Huidige (I Thev ) en Weerstand (R Thev ) in die LAAG toestand. (6) V Thev I Thev R Thev V ma Ω ERS 220 Examination 2008 9
2.2. Determine the Thevenin equivalent of the Voltage (V Thev ), Current (I Thev ) and Resistance (R Thev ) in the HIGH state. N.B. R L 0 Ω and V L 0 V. / Bepaal diethevenin ekwivalente van die Spanning (V Thev ), Huidige (I Thev ) en Weerstand (R Thev ) in die HOOG toestand. (6) V Thev I Thev R Thev V ma Ω ERS 220 Examination 2008 10
Section D: Combinational Logic Design Principles [15] 1. For the sum-of-products function H below, use the Karnaugh maps to derive the minimum sumof-products expression. / Vir die som-van-produkte funksie H hieronder, gebruik die Karnaugh diagram om af te lei die minimum som-van-produkte uitdrukking aft te lei. (15) H = ΣABCD ABCDEF EF(9, 12, 14, 15, 28, 29, 31, 37, 39, 44, 46, 47, 53, 55, 56, 57, 58, 60, 61, 62) + d (1, 3, 6, 7, 8, 13, 17, 19, 24, 25, 30, 33, 35, 42, 45, 59, 63) H = ERS 220 Examination 2008 11
Section E: Combinational Logic Design Practices [20] 1. Given the following Boolean function / Gegee die volgende Boolse funksie F = ΠABCDE ABCDE (0, 3, 5, 6, 8, 9, 14, 15, 16, 19, 21, 22, 24, 27, 29, 30) Implement function F using one 74x151 MUX, one 74x138 decoder, one inverting gate and one multiple input NAND gate. / Implementeer die funksie F deur gebruik te maak van n enkele 74x151 MUX, enkele 74x138 dekodeerder, een omkerende hek en een meervoudige inset NEN hekke. (20) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 A B C D E F ERS 220 Examination 2008 12
ERS 220 Examination 2008 13
Section F: Sequential Logic Design Principles [44] 1. The following figure shows a clocked synchronous state machine. / Die volgende figuur toon n geklode sinkrone toestandsmasjien. 1.1. Determine the transition and output equations. / Bepaal die oordrag en uitset vergelykings. (10) Q1* = Q2* = Q3* = MAX = ERS 220 Examination 2008 14
1.2. Compile the transition/ output table. / Stel die oordrag/ uitset tabel op. (8) Q1 Q2 Q3 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 EN 0 1 Q1* Q2* Q3*, MAX Useful Expressions / Nuttige Uitdrukkings Flip-Flop Characteristic Equations / Wipbaan Karaktertrek Vergelyking Edge Triggered D Flip-Flop Q* = D Edge Triggered D Flip-Flop with Enable Q* = EN. D + EN. Q Edge Triggered T Flip-Flop Q* = Q Edge Triggered T Flip-Flop with Enable Q* = EN. Q + EN. Q ERS 220 Examination 2008 15
2. The following figure shows a state diagram of a clocked synchronous state machine. / Die volgende figuur toon n toestandsdiagram van n geklokde sinkrone toestandsmasjien. Y A Z1Z2 = 00 Y B Z1Z2 = 10 Y X.Y.Y Y Y D Z1Z2 = 01 X Y E X.Y C X Z1Z2 = 10 Z1Z2 = 01 X 2.1. What type of machine is represented by the above state diagram? / Watter soort masjien is verteenwoordig by die boonste toestandsdiagram? (2) ERS 220 Examination 2008 16
2.2. Compile the state/ output table. / Stel die toestand/ uitset tabel saam. (8) S A B C D E XY 00 01 10 11 S* Z1Z2 2.3. Compile the transition/ output table. / Stel die oordrag/ uitset tabel saam. (6) A = 000, B = 100, C = 101, D = 110, E = 111 Q1 Q2 Q3 0 0 0 1 0 0 1 0 1 1 1 0 1 1 1 XY 00 01 10 11 Q1* Q2* Q3* Z1Z2 ERS 220 Examination 2008 17
2.4. Determine the simplified transition equations, Q2* and Q3*, and the simplified output equation for Z1. / Bepaal die vereenvoudigde oordrag vergelykings, Q2* en Q3*, en die vereenvoudigde uitset vergelyking vir Z1. Q2* = (4) Q3* = (4) Z1 = (2) ERS 220 Examination 2008 18
Section G: Sequential Logic Design Practices [35] 1. Design a circuit with output (QA, QB, QC and QD) sequence 0, 8, 4, 10, 5, 14, 7, 15, 0, 8,... using a 74x194 shift register, two 2 Input NAND gates, a 2 input AND gate, and a 2 Input NOR gate. No other gates may be used. Assume the CLR input is recognised only on the CLK pulse. / Ontwerp 'n stroombaan met die volgorde 0, 8, 4, 10, 5, 14, 7, 15, 0, 8,... gebruik n 74x193 skuifregister, twee 2 inset NAND hekke, n 2 inset AND hek, en n 2 inset NOR hek. Geen addisionele hekke mag gebruik word nie. Neem aan die CLR inset is herken alleen op die CLK pols. (20) Function Inputs Next State S1 S0 QA* QB* QC* QD* Hold 0 0 QA QB QC QD Shift right 0 1 RIN QA QB QC Shift left 1 0 QB QC QD LIN Load 1 1 A B C D ERS 220 Examination 2008 19
2. Design a modulo-9 counter circuit with the counting sequence 0, 1, 2, 3, 9, 10, 11, 13, 14, 0, 1,... using a 74x163 4-bit binary counter and two 2-input NAND gates. No additional gates or components may be used. / Ontwerp 'n modulo-9 teller stroombaan met die tel volgorde 0, 1, 2, 3, 9, 10, 11, 13, 14, 0, 1,... gebruik n 74x163 4-bit binere teller en twee 2-inset NEN hekke. Geen addisioneel hekke of komponente mag gebruik word nie. (15) ******************* END / EINDE ******************* ERS 220 Examination 2008 20