ESE 570 MOS TRANSISTOR THEORY Part 2

ESE 570 MOS TRANSISTOR THEORY Part 2 GCA (gradual channel approximation) MOS Transistor Model Strong Inversion Operation

CMOS = NMOS + PMOS 2

TwoTerminal MOS Capacitor > nmos Transistor VGS << VT0 NMOS TRANSISTOR IN CUTOFF REGION VG VD VS Substrate or Bulk B Depletion region p Immobile acceptor ions 3

TwoTerminal MOS Capacitor > nmos Transistor VGS = VT0n + δ Onset of INVERSION VG QI VD QB0 4

MOS Transistor Regions of Operation + n + n 5

MOS Transistor Regions of Operation + n + n 6

MOS Transistor Regions of Operation VDS = VD VDSAT = VGS VT0 VDS VDSAT VGD = VGS VDS < VT0 z n+ VCS(y) = VDSAT n+ 7

MOSFET CURRENT VOLTAGE CHARACTERISTICS VG = VGS > VT0 and VGD > VT0 VD = small n+ z z n+ yy x 2 dy V sec cm dr= 0.= 2 W 7n Q I 0 y cm C µn = U0 = electron mobility = cm2/{v sec} 8

VG = VGS > VT0 VD = VDS n+ n+ z VCS(y) VCS(y = 0) = VS = 0 VCS(y = L) = VDS Ey >> Ex, Ez Mobile charge in inverted channel: QI(y) = Cox [VGS VCS(y) VT0] I = V R 9

QI(y) = Cox [VGS VCS(y) VT0] VCS(y = 0) = VS = 0 VCS(y = L) = VD dvcs ID dv CS = I D dr= dy W 7n Q I 0 y 0 VCS(y) VDS dvcs VGS VCS VT0 dv CS 2 CS (VGS VT0)VCS V /2 VCS = VDS VCS = 0 0

KP > Transconductance Parameter 2 cm C C /s A KP=7n C ox =0 0 = 2 = 2 2 Vs V cm V V

ID(VDS = VDSAT) and VDSAT = VGS VT0 Assumptions: 2

@VDS = VDSAT = VGS VT0 7n C ox W 2 I D 0 sat = 0V GS V T0 2 L ID(VDS = VDSAT) = ID(sat) LINEAR SAT IN GENERAL ID(sat) 3

VDSAT + n 2L n+ V DS V DSAT,6V DS 2 L 6V DS for 6V DS L 4

Compatible Eqs.? ID = f(vgs, VDS) 6 0 6 0 6 0 5

DISCONTINUOUS! @ VDS = VDSAT 6

6V DS 7

/ / V T =V T0,30 2 8 F V SB 2 8 F 6V DS 8

(VT = VTn > 0) V GD.V T VGS > VT, VDS < VGS VT VGS > VT, VDS VGS VT (VT = VTp < 0) V GD V T V GD V T VGS < VT, VDS > VGS VT VGS < VT, VDS VGS VT V GD.V T 9

D G B => SAT S 20

=> SAT 2

n+ n+ 22

V GS E ox = volts /cm t ox E= q N A x volts /cm 4si 23

V GS E ox = volts/cm t ox Year E= q N A x volts/cm 4 si 993 995 997 999 200 Feature Size (µm) 0.80 0.60 0.35 0.25 0.8 2003 2005 2007 0.3 0.09 0.045 Historical reduction in min feature size for typical CMOS process 24

Load Capacitance (Ccap) WL (/tox) Gate Delay (T) V Ccap/I 25

+ n LD n+ LD + n n+ 26

(nmos, pmos) Model Depletion Region Capacitances 27

MOSFET CAPACITANCES Recall Cox = COX and tox = TOX in SPICE CGS0(overlap) = CoxWLD CGD0(overlap) = CoxWLD CGB0(overlap) = CoxWovLM SPICE: CoxLD = CGS0 = CGD0 in F/m; CoxWov = CGB0 in F/m Wov n+ LD W n+ Wov 28

CBG0 GatetoBulk Overlap Capacitance CBG0 Gate Extension Design Rule Weff SiO2 = Wov poly n+ p CGB0 = CoxWovLM C4 = 2λ = Wov = SiO2 Wov (conservative estimate) 29

Cgb, Cgs and Cgd n+ n+ Leff Leff n+ n+ MOSFET Saturation Region n+ n+ Leff 30

GatetoBulk, Drain & Source Oxide Capacitances Summary + 2CGB0 0 + 2CGB0 0 + 2CGB0 Application of Oxide Capacitance Model:. Approximate: For hand calculations, assume that C gb, Cgd and Cgs are connected in parallel for each region of operation, i.e. Cg(tot) = CoxWLeff + 2CGB0 + CGD0 + CGS0 Cutoff Region; Cg(tot) = CoxWLeff + 2CGB0 + CGD0 + CGS0 Linear Region; Cg(tot) = 2/3 CoxWLeff + 2CGB0 + CGD0 + CGS0 Saturation Region. and use the maximum value Cg(tot) = CoxWLeff + 2CGB0 + CGD0 + CGS0 3

Depletion Region Capacitances > Cdb, Csb n+ n+ 32

Depletion Region Capacitances > Cdb, Csb n+ + n V = Ext Bias > VSB, VDB + Qj = depletionregion charge A = junction area dq j A C j0 0 AS, AD CJ (F) C j 0V = = = m MJ dv V V 0, 0, PB 80 where 4 Si q 4 Si N A N D 2 (F/cm ) CJ =C j0 = = 0 xd 2 N A,N D 8 0 / ND m = MJ = grading coefficient m = ½ for abrupt junction [AS, AD > Source, Drain Areas in SPICE] [CJ > Cj0 in SPICE] [PB > O0 in SPICE] [MJ > m in SPICE] 33

Depletion Region Capacitances > Cdb, Csb Assume Weff = W 34

SUMMARY n+, p Junctions C j 0V = where / A C j0 0 AS, AD CJ (F) = m MJ V V 0, 0, PB 80 q 4 Si N A N D CJ =C j0 = 0 2 N A,N D 80 SPICE Parameters (F/cm2) Cj(0) = A Cj0 when V = 0 [AS, AD > Source, Drain Areas in SPICE] [CJ > Cj0 in SPICE] [PB > O0 in SPICE] [MJ > m in SPICE] 35

n+, p Junctions C j 0V = A C j0 0 AS, AD CJ = m MJ V V 0, 0, PB 80 voltage dependent EQUIVALENT LINEAR LARGE SIGNAL CAPACITANCE V 2Q Q j 0V 2 Q j 0V C eq = = = C 0V dv V 2 V V 2 V V j 2V 2 A C j0 80 V 2 m V m C j 0V C eq= [0, 0, ] V 2 V m 80 80 NOTE voltage independent approximation 0 < Keq < > Voltage Equivalence Factor where V V V2 V = Ext Bias > VSB, VDB for nmos VBS, VBD for pmos C j 0V = A C j0 K eq =0 AS, AD CJ K eq 36

[PS, PD > Source, Drain Perimeters in SPICE] (F/cm2) [CJSW > C in SPICE] jsw [PBSW > O0SW in SPICE] [MJSW > m(sw) in SPICE] (F/cm) dq jsw C jsw 0V = = dv [XJ > xj in SPICE] P C jsw 0 PS, PD CJSW = m0sw MJSW V V 0, 0, PBSW 80sw m0 sw (F) m0 sw V2 V Recall for n+, p8junctions 0sw K eq 0 sw= [0, 0, 0V 2 V 0 m0 sw dq j A C j0 80 0sw AS, AD CJ 80sw C j 0V = = = (F) m MJ V junction V m(sw) = ½ dv for an abrupt 0, 0, PB 80 ] 37

dq jsw C jsw 0V = = dv P C jsw 0 PS, PD CJSW = MJSW V m0sw V 0, 0, PBSW 80sw voltage dependent voltage independent approximation where V V V2 V = Ext Bias > VSB, VDB for nmos VBS, VBD for pmos 38

4 CJ =.35 x 08 F/cm2 CJSW = 5.83 x 02 F/cm PB = 0.896 V PBSW = 0.975 V XJ = x 04 cm MJ = MJSW = ½ D n+ n+ S 39

C j 0V = A C j0 K eq = AD CJ K eq MJ V2 PB K eq = [0, 0V 2 V 0 MJ PB MJ V 0, PB ] CJ =.35 x 08 F/cm2 CJSW = 5.83 x 02 F/cm PB = 0.896 V PBSW = 0.975 V XJ = x 04 cm MJ = MJSW = /2 /2 2 0.896 V 5V 0.5 V /2 = [0, 0, ]=0.52 05V 0.5 V 0.896 V 0.896 v C jsw 0V =P C jsw K eq 0sw =PD CJSW K eq 0sw MJSW V2 PBSW K eq 0 sw= [0, 0V 2 V 0 MJSW PBSW /2 MJSW V 0, PBSW ] / 2 = 2 0.975 V [0, 5 V 0, 0.5 V ]=0.53 K eq 05V 0.5 V 0.975V 0.975 v 40

CJ =.35 x 08 F/cm2 CJSW = 5.83 x 02 F/cm PB = 0.896 V PBSW = 0.975 V XJ = x 04 cm MJ = MJSW = /2 8 2 8 2 C j 0V = A C j0 K eq = AD CJ K eq =055 x 0 cm 0.35 x 0 F / cm 0.52=3.86 ff C jsw 0V =P C jsw K eq 0 sw =PD CJSW K eq 0 sw = 02.5 x 0 3 cm 05.83 x 0 2 F / cm 0.53=7.72 ff C db = AD CJ K eq,pd CJSW K eq 0sw =.58 ff 4

MOSFET CAPACITANCE SUMMARY OXIDE CAPACITANCES Cgb = COX WLeff + CGB0 Cgd = (/2) COX WLeff + CGD0 Cgs = (2/3) COX WLeff + CGS0 Leff = LM 2LD DEPLETION CAPACITANCES Csb = Cj(VSB) + Cjsw(VSB) Cdb = Cj(VDB) + Cjsw(VDB) C j 0V = 0 AS, AD CJ 0 AS, AD CJ K eq Assume: AS = AD MJ V 0, MJ MJ V V PB PB K eq = [0, 2 0, ] 0V 2 V 0 MJ PB PB C jsw 0V = 0 PS, PD CJSW 0 PS, PD CJSW K eq 0 sw Assume: PS = PD MJSW V 0, PBSW V 2 MJSW V MJSW PBSW K eq 0 sw= [0, 0, ] 0V 2 V 0 MJSW PBSW PBSW 42

Short Channel Effects Leff xj Velocity saturation limit Reduced electron, hole mobility Reduced threshold voltage V T0 Narrow Channel Effects W xdm Increased threshold voltage V T0 Subthreshold Current VGS < VT0 Nonzero drain current when V < VT0 GS 43

SHORT CHANNEL ISSUES v sat cm V cm2 70 =0 /0 = sec cm V sec I D 0sat =W v sat C ox 0V GS V T 7n0 7n 0eff,50V GS V T (Lvl 3) 44

SHORT CHANNEL ISSUES CONT. Short Channel Effect Leff xj (source, drain diffusion depth) G S n+ pn+ depletion region G D n+ QB0 Leff xj pn+ depletion region VGS induced depletion region Q ox Q B0 V T0 0long channel =V FB 28 F C ox C ox S D n+ n+ Leff QB0(sc) QB0(sc) << QB0 VT0 (short channel) = VT0 (long channel) ΔVT0 22 45

NARROW CHANNEL ISSUES Narrow Channel Effect W xdm (depletion region depth) fieldoxide W gateoxide Gate Extension design rule fieldoxide QB0(nc) QB0(nc) > QB0 Q ox Q B0 V T0 0long channel =V FB 28 F C ox C ox 46

I D 0 subthreshold =I S e V GS n kt / q V DS 0 e kt /q 0,6V DS + 4Si t ox subthreshold swing coefficient: n, 4ox t Si 7 C ox W kt 2 I S 0 L q [SPICE Parameter: N0 > n subthreshold swing coefficient NOTE: ID (subthreshold) is leakage current for stronginversion operation ID (subthreshold) is primary current for weakinversion operation + J. Rabaey, A. Chandrakasan and B. Nikolic; Digital Integrated Circuits 2nd Edition, Prentice Hall, 2003, pp99. 47

(MOSIS: Level 3 model used for min feature size µm) (MOSIS: BISIM3 model used for min feature size < µm) 48

Complexity of SPICE Models vs. Time BSIM4v6.5 (2009) EKV = EnzKrummenacherVittoz (EKV) model is for lowpower analog circuit simulation. SPICE Parameter Calculator Rochester Institute of Technology http://people.rit.edu/lffeee/spice_parameter_calculator.xls 49

MOS SPICE MODEL PARAMETERS Name Model Parameters LEVEL Model type (, 2, or 3) L W LD WD Channel Channel Lateral Lateral VTO U0 KP GAMMA PHI LAMBDA Zerobias threshold voltage Mobility Transconductance Bulk threshold parameter Surface potential Channellength modulation (LEVEL = and 2) RD RS RG RB RDS RSH NRS IS JS PB length (designer input) width (designer input) diffusion length diffusion width Drain ohmic resistance Source ohmic resistance Gate ohmic resistance Bulk ohmic resistance Drainsource shunt resistance Drainsource diffusion sheet Resistance Number of squares of RD, RS Bulk pn saturation current Bulk pn saturation/current area Bulk pn potential Units m m m m V cm**2/vs A/V**2 V**/2 V /V Ohms Ohms Ohms Ohms Ohms Ohms/sq. A A/m**2 V 50

MOS SPICE MODEL PARAMETERS CONT. Name Model Parameters Units LEVEL Model type (, 2, or 3) CBD CBS CJ CJSW MJ MJSW FC CGSO CGDO CGBO Bulkdrain zerobias pn cap (not used) F Bulksource zerobias pn cap (not used) F Bulk pn zerobias bottom cap/area F/m**2 Bulk pn zerobias perimeter cap/length F/m Bulk pn bottom grading coefficient Bulk pn sidewall grading coefficient Empirical bulk pn forwardbias cap coefficient Gatesource overlap cap/channel width F/m Gatedrain overlap cap/channel width F/m Gatebulk overlap cap/channel width F/m NSUB NSS NFS TOX TPG XJ Substate doping density Surfacestate density Fast surfacestate density Oxide thickness Gate material type: + = opposite of substrate, = same as substrate, 0 = aluminum Metallurgical junction depth /cm**3 /cm**2 /cm**2 m m 5

MOS SPICE MODEL PARAMETERS CONT. Name Model Parameters Units LEVEL Model type (, 2, or 3) UCRIT DELTA THETA ETA KAPPA Mobility degradation critical field V/cm (LEVEL=2) Empirical mobility degradation exponent (LEVEL=2) Maximum carrier drift velocity (Level=2) m/s Empirical channel charge coefficient (LEVEL=2) Empirical Fraction of channel charge attributed to drain (Level=2) Empirical channel width effect on VT Empirical mobility modulation (LEVEL=3) /V Empirical static feedback on VT (LEVEL=3) Empirical saturation field factor (LEVEL=3) KF AF Flicker noise coefficient Flicker noise exponent UEXP VMAX NEFF XQC 52

Level 3 SPICE Parameters KP (in A/V2) = k'n (k'p) VT0 (in volts) = VTn (VTp) U0 (in cm2/{vs}) = µn (µp) 53