Effects of Antimony Near SiO 2 /SiC Interfaces

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Effects of Antimony Near SiO 2 /SiC Interfaces P.M. Mooney, A.F. Basile, and Zenan Jiang Simon Fraser University, Burnaby, BC, V5A1S6, Canada and Yongju Zheng, Tamara Isaacs-Smith Smith, Aaron Modic, and Sarit Dhar Auburn University, Auburn, AL, 12345, USA 1th Annual SiC MOS Workshop University of Maryland, August 13-14, 215

Outline Introduction - Capacitance Methods: C-V and DLTS - Effects of post-oxidation NO annealing SiO 2 /SiC interfaces - Effects of pre-oxidation Sb implantation + NO annealing Summary and Conclusions Research support Simon Fraser University: Natural Sciences and Engineering Council of Canada Auburn University: Army Research Lab and National Science Foundation 2

High Frequency (1MHz) Capacitance Measurements: Schottky Diode 15 Obtain net shallow donor (or acceptor) concentration when N T << N D (or N A ) 1MHz test signal Cpacita ance (pf) 1 5 Schottky diode on epitaxial 4H-SiC Depletion width: -6-4 -2 2 Applied voltage (V) 1.2 1 2 1..8.6 2 EF ET 2.4 e N d 1/C 2 (1 21 F).2 N d = 1.1x1 16 cm -3 V bi = 1.5 V (intercept) When N t <<N d, C is essentially independent of temperature to donor freeze-out (in SiC down to T~4K). -6. -4. -2.. 2. Applied Voltage (V) (Schottky diode fabricated at Auburn University on Si-face of Cree n-type SiC epilayer) 3

Sample Structure: 4H-SiC MOS Capacitor Fabricated on nitrogen-doped (1x1 16 cm -3 ) epitaxial 4H-SiC (wafers from Cree, Inc) interface Al gate contact 2nm 14 SiO 2 thickness 6nm n- 4H-SiC epilayer thickness 1µm n+ SiC substrate n- 4H-SiC substrate thickness 3µm Au back-contact (~1nm) Oxidation: 115 o C, 8 hours + 3 min in Ar at 115 o C Nitridation: post oxidation annealing in NO -- 1175 o C ce (pf) Capacitan 12 1 8 6 4 2 NO-12 T = 295K depletion 1MHz C-V curve Cox accumulation V FB = 5V.5-8 -6-4 -2 2 4 6 Applied Voltage (V) 1/C = 1/Cox + 1/Cd C=(CoxCd)/(1/Cox+ 1/Cd) 4

4H-SiC MOS Capacitors: 1MHz C-V Curves Shift of C-V curves with decreasing temperature due to trapping by interface states C (pf) 14 12 1 8 6 4 2 T=3K 28K 26K 24K 22K 2K 18K 8K 1K 12K 14K 16K 4H- -4-2 2 4 6 8 V(V) NO-anneal time (min) T = 3K 18K 16K 14K 8K 1K 12K -3-2 -1 1 2 V(V) Interface state density, N IT (1 11 cm -2 ) 26 15 8 5 NO - 26 NO - 12 NO - 3 NO - 12 4H-12 Flatband voltage shift from 3K to 8K is due to shift in surface Fermi level when E F in SiC moves from E C -.2 ev to E C -.5 as electrons freeze out at N donors V FB from 3 to 8K: 4H- 8V 4H-12 1.6 V factor of 5 reduction! P. V. Gray and D. M. Brown, Appl. Phys. Lett. 8, 31 (1966). S. Dhar, et al., Appl. Phys. Lett. 92, 12112 (28). 5

Deep-Level-Transient Spectroscopy (DLTS) Filling voltage: depletion Filling voltage: accumulation SiO 2 SiC SiO 2 SiC E C EDonor F P N N IT N T E C E Donor E F E Trap F P E F E Trap interface and SiC traps filled SiO 2, interface and SiC traps filled Constant capacitance SiO 2 e N e n SiC SiO 2 e N SiC F P E C EDonor E F E Trap F P E C EDonor EF ETrap Monitor emission of electrons trapped at various filling voltages: Emission rate of trap is determined by A the activation energy, E A = E C -E T, and en T n vn NC exp g1 kt temperature, T g E 6

Constant Capacitance DLTS (CCDLTS) MOS Capacitors Ca apacitance (pf) 16 14 12 1 8 6 4 2 NO-12 T = 295K 1MHz C-V curve depletion Const. C accumulation V FB =.5 V -8-6 -4-2 2 4 6 Applied Voltage (V) N. M. Johnson, J. Vac. Sci. Technol. 21, 33 (1982). e n of spectrometer set by t 1 and t 2 Constant capacitance => depletion width during emission of trapped carriers is independent of temperature! After the filling pulse, the capacitance is held constant by dynamically varying the gate voltage => voltage transient t measures emitted charge The difference of the gate voltage measured at times t 1 and t 2 after the filling pulse => CCDLTS spectrum Signal is a maximum when the emission rate of the trap equals the emission rate of the spectrometer MOS capacitor: trap filling pulse (Vp): depletion bias detects mostly SiC defects, accumulation bias detects mostly interface traps 7

Effects of NO Annealing: Near-Interface Oxide Traps CCDLTS (mv) Trap Density (1 12 cm -2 ) 8 7 O2 6 5 4 3 2 1 O1 4H- 4H-12 1 15 2 25 3 T (K) 5 7 4 3 2 1 O2 O1 N 2 4 6 8 1 12 Oxidation Time (min.) No annealing time (min) 6 5 4 3 2 1 N Density (1 1 14 cm -2 ) Saturated CCDLTS spectra from 8-3K with trap filling pulse in strong accumulation Two broad Peaks in CCDLTS spectrum: O1 at E C -.15 ev and O2 at E C -.39 ev Near-interface oxide trap density reduced by a factor of 1 with NO annealing A.F. Basile, et al., JAP 19, 64514 (211). Comparison with ab initio calculations of defects in SiO 2 suggests: O1 is substitional carbon dimers in SiO 2 O2 is Si interstitials in SiO 2 SIMS shows N accumulates at SiO 2/SiC interface J. Rozen, et al. J. Appl. Phys.15, 12456 (29). Decrease in trap density is about 1% of the increase in interfacial N 8

Mechanisms for Improved MOSFET Channel Mobility NO-annealing, N accumulates at interface: FE ~ 35 cm 2 /Vs FE - CCDLTS shows near-interface oxide traps are passivated by N A.F. Basile, et al., JAP 19, 64514 (211). Na + in SiO 2 drifted towards SiO 2 /SiC interface: peak FE = 17 cm 2 /Vs - CCDLTS shows oxide trap density is unchanged by presence of Na + A.F. Basile, et al., Materials Science Forum 717-72, 757 (212). N implanted prior to oxidation, no activation anneal: FE = 8 cm 2 /Vs - N atoms partially activated as donors during oxidation: large negative V FB shift - CCDLTS shows oxide trap density is greater than with NO annealing and ion implantation defects are present in SiC => buried channel device A.F. Basile, et al, J. Appl. Phys. 19, 11455 (211). => Adding impurities increases channel mobility -- mechanisms include passivation of near-interface defects and counter doping near the SiO 2 /SiC interface Combination of implanted donor atoms with NO-annealing Sb implanted and activated prior to oxidation: peak FE = 8 cm 2 /Vs with Sb alone and 11 cm 2 /Vs with Sb + NO annealing for 3 min. - SIMS shows accumulation of Sb at interface (6x1 12 cm -2 => ~25% of implanted Sb) - increase in mobility freezes-out at 7K it looks like an NO-annealed device A. Modic, et al., Electron Device Lett. 35, 894 (214). 9

Sb-implanted 4H-SiC MOS Capacitors The idea is to end up with both N and Sb donors at the SiO 2 /SiC interface: N to passivate interface states and Sb to provide surface counter doping of SiC Sb at interface Al gate contact 2nm SiO 2 thickness 6nm n- 4H-SiC epilayer thickness 1µm n+ SiC substrate n- 4H-SiC substrate t thickness 3µm Au back-contact (~1nm) Sb + implantation:, 2.5, and 5e13 cm -2, 8 kev Activation anneal in Ar ambient at 165 ⁰C Oxidation: 115 o C for 11 hours want to consume implanted layer with Sb accumulating at interface Nitridation: annealing in NO at 1175 o C for 3 or 12 min 1

Nd at 3K and Cox vs. Sb-dose 2.6 NO-12 NO-3 2.4.7e16 cm -3 / 5 e13 cm -2 15 14 N-12 N-3-12 pf/2.5e13 cm -2 ) Nd (1 16 cm -3 2.2 2. 1.8 1.6 1.4 Sb-implanted Series 1 2 3 4 5 Cox (pf) 13 12 11 1 1 2 3 4 5 Sb Dose (1 13 cm -2 ) Sb Dose (1 13 cm -1 ) Measured Nd-Na at ~4 nm from the SiO2/SiC interface increases with Sb dose and does not depend on the NO-annealing time. Oxidation rate is increased when Sb is present 11

Representative 1MHz C-V Curves at 295K and 8K NO-annealing 12 min, and 2.5x1 13 cm 2 Sb doses 14 12 SiCx-4 14 NO-12 12 SiC4x-74 Sb + NO-12 ) Capa acitance (pf 1 8 6 Avg V FB = 1.13V 4 295K 2 8K V FB Capa acitance (pf F) 1 8 6 Avg V FB =.48V 4 295K 2 8K V FB -8-6 -4-2 2 4 6 Voltage (V) -8-6 -4-2 2 4 6 Voltage (V) Description Avg. Cox Avg Vfb (V) N IT (pf) 295-8K (1 11 cm-2) N IT = (Cox/A)(ΔV FB /q) NO-12 141 3 1.13.3 4.8.6 N IT reduced by factor of 3 with Sb Sb + NO-12 121 4.48.3 1.8.1 12

Representative 1MHz C-V Curves at 295K and 8K NO-annealing 3 min, 2.5 and 5x1 13 cm 2 Sb doses 14 12 SiC3x-6 Sb + NO-3 14 12 SiCFu3x-22 2Sb + NO-3 Cap pacitance (pf F) 1 8 6 Avg. V FB =.98V 4 295K 2 8K B Cap pacitance (pf F) 1 8 6 Avg. VV FB = 83V.83 4 295K 8K V FB 2-8 -6-4 -2 2 4 6 Voltage (V) -8-6 -4-2 2 4 6 Voltage (V) Description Avg. Cox Avg Vfb (V) N IT (pf) 295-8K (1 11 cm-2) Sb + NO-3 125 5.98.14 3.8.6 2Sb + NO-3 113 3.84.6 2.8.2 N IT = (Cox/A)(ΔV FB /q) N IT reduced by factor of ~1.4 with Sb 13

CCDLTS Spectrum: 4H-SiC MOS Capacitor CC CDLTS Signal (m mv) 7 6 5 4 3 2 1 N2? O1 45-15K Sb + NO-12 C = 37 pf Vp = 3 V (accumulation) e n = 465 s -1 O2 8-3K 5 1 15 2 25 3 Main Features: Near-interface oxide defects O1 (.15 ev) and O2 (.39 ev) Nitrogen donor level on k site in SiC acts as an electron trap at low temperature, N2 (.1 ev) Temperature re (K) Spectra taken over two different temperature ranges to investigate oxide traps (high T range) and SiC traps (low T range) 14

CCDLTS Spectra 8-3K: Oxide Traps NO-annealing 12 min, and 2.5x1 13 cm 2 Sb doses CCDLTS Signal (m mv) 8 6 4 2 O1 NO-12 C = 37 pf e n = 465 s -1 n O2 #2 #18 Vfb + 5V Vfb 5 1 15 2 25 3 B1 Temperature (K) CCDLTS Signal (m mv) 8 6 4 2 Sb + NO-12 C = 37 pf e n = 465 s -1 n O1 O2 #25 #7 Vfb + 5V Vfb 5 1 15 2 25 3 Temperature (K) Sample Description Avg. Cox (pf) Nit (O1) (cm-2) Nit (O2) (cm-2) NO-12 141 3 2.4x1 1 1.x1 11 Sb + NO-12 121 4.8x1 1.8x1 11 C dimer Si i O1 density reduced by factor of 3 with Sb! 15

CCDLTS Spectra 8-3K: Oxide Traps NO-annealing 3 min, 2.5x1 13 and 5x1 13 Sb implant doses CCDLTS Signal (mv V) 1 8 6 4 2 SiC3x Sb + NO-3 C=37 pf ID =.5ms O1 O2 +4V +3V +2V +1V Vfb Vfb+5V #18 #6 5 1 15 2 25 3 Temperature (K) CCDLTS Signal (mv V) 1 8 6 4 2 SiCFu3x 2Sb + NO-3 C = 37 pf ID =.5 ms O2 #17 #22 Vfb + 5V Vfb 5 1 15 2 25 3 Temperature (K) Sample Description Avg. Cox (pf) Nit (O1) (cm-2) Nit (O2) (cm-2) Sb + NO-3 125 5 1.3e1 1.5e11 2Sb + NO-3 113 2.5e1 1.3e11 C dimer Si i O1 density reduced by factor of ~3 with 2Sb! 16

LowT CCDLTS Spectra from an Sb-implanted Sample CCDLTS Signal (mv v) 1 8 6 2 N2 Sb + NO-3 C=37 pf ID=5 ms O1 Vp (V) 5 4 3 2 1.5 4 Sb 4 6 8 1 12 14 -.5-1. -2. Temperature (K) V FB =.7V N2(deeper N donor) and two new peaks in SiC These new peaks traps were not seen in any other samples (including the N pre-implanted samples) => Sb-related The evolution of the spectra with increasing filling voltage show that the Sb-related traps are located close to the SiO 2 /SiC interface

CDLTS Spectra 45-15K: SiC Defects NO-annealing 12 min, and 2.5x1 13 cm 2 Sb doses (mv) CCD DLTS Signal CCDLTS Sig gnal (mv) 6 4 2 6 4 2 N2 NO-12 C=37 pf e n = 46.5 s -1 B1 (O1) Vp (V) 1. = V FB -.5-1. 1 4 6 8 1 12 N2 Sb + NO-12 C=37 pf e n = 46.5 s -1 Sb (O1) Vp (V) = V FB -1. -2. -3. 4 6 8 1 12 Temperature (K) ln (T 2 /e n ) 1 8 6 4 2-2 Ea =.128 ev = 4x1-14 cm 2 Sb Sb Ea=? =? Sb + NO-12 N2 Ea =.13 ev = 1x1-12 cm 2 1 15 2 25 3 1 / T(K) N2 deeper N donor level in SiC (k site) B1 near-interface SiC trap -- (C 2 ) i - seen in NO-annealed 4H- and 6H-SiC New peaks in SiC: - located close to the SiO 2 /SiC interface - seen only in Sb-implanted samples => Sb donor levels 18

Summary and Conclusions Temperature dependent C-V and CCDLTS measurements have been employed to investigate defects near SiO 2 /SiC interfaces Showed that in Sb-implanted MOS capacitors the O2 (Si interstitial in SiO 2 ) density is unchanged but O1 (substitutional C dimer in SiO 2 ) density is reduced by a factor of ~3 compared to NO-annealing alone Measured activation energy of deeper N donor level to be E C - (.1.1) 1) ev, consistent with previous measurements by other electrical methods: W. Gotz, et al., J. Appl. Phys. 73, 3332 (1993) Hall effect T. Kimoto, et al., Appl. Phys. Lett. 67, 2833 (1995) admittance spectroscopy Observed two new near-interface defects in Sb-implanted SiC -- deeper Sb level is at E C (.13.1) ev, could not obtain the energy for the shallower Sb level. The concentration cannot account for the larger Nd-Na observed deeper than the implanted Sb atoms. The observation of these new energy levels is consistent with calculations showing that Sb has two shallow levels in SiC (M. Miyata, et al., J. Appl. Phys 14, 12372 (28)) and with the freeze-out of the enhanced channel mobility in Sb implanted MOSFETs (A. Modic, et al., Electron Device Lett. 35, 894 (214)). 19

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