VERIFUL : VERItion using FUntionl Lerning Rjrshi Mukherjee y Dept. of Eletril nd Computer Engineering University of Texs t Austin Austin TX 7872 Astrt It is well known tht lerning (i.e., indiret implitions) sed tehniques perform very well in mny instnes of omintionl iruit verition when the two iruits eing veried hve mny orresponding internl equivlent points. We present some results on omintionl iruit design verition using powerful, nd highly generl lerning tehnique lled funtionl lerning. Funtionl lerning is sed on OBDDs nd hene n eiently lern novel implitions sed on funtionl mnipultion. Introdution Anlysis of logi design, onstituting of prolems suh s, representtion, verition, ATP, et., poses one of the most fundmentl hllenges in the eld of omputer-ided design. For exmple, logi verition of two dierent reliztions of the sme Boolen funtion during the proess of iruit synthesis is of utmost importne to gurntee orretness of the iruit eing implemented. As disussed in [6], digitl iruit synthesis typilly onsists of sequene of tomi opertions through whih the iruit is ltered lolly to suit spei needs, keeping the funtionlity sme. ene, it n e rgued tht fter eh suh tomi hnge the two versions of the iruit efore nd fter the hnge remin very similr. This ft immeditely lures one to try nd extrt these internl equivlenes nd use them eetively in order to simplify the prolem of logi verition. Bermn et. l. [5] proposed the rst method of using these internl equivlent points to estlish the equivlene of two iruits. In [5] deomposition is found using the min/ut lgorithm tht filittes deomposing the prolem of verition of the whole iruit into muh smller nd simpler prolems. Cerny nd Murs presented in [8] further oservtions to estlish ross-reltions etween two pproprite uts in the two iruits. Lerning tehniques [8, 2] n often e eiently used to extrt the internl equivlent points whih re used susequently to speed up the proess of design veri- tion. owever, s shown in [5], diret use of these equivlent points to prove the outputs of two iruits equivlent n use the prolem of flse negtives. This The rst uthor ws supported in prt during the erly prt of this work y the ONR under grnt N4-92-J-366 nd the Ntionl Siene Foundtion under grnt MIP-928238 y Currently lso with Fujitsu Lortories of Ameri, 77 Rio Roles, Sn Jose CA 9534-87 Jwhr Jin Mshiro Fujit Fujitsu Lortories of Ameri 77 Rio Roles, Sn Jose CA 9534-87 hppens when one ttempts to ompre the funtionlity of the two iruits using these equivlent points s pseudo primry inputs. It is esy to see tht this kind of omprison n erroneously prove the two iruits to e funtionlly inequivlent even though they my tully e equivlent. This is euse the interdependene of the pseudo primry inputs in terms of the true primry inputs is negleted. A tehnique for extrting nd utilizing internl equivlent points for logi verition without hving to fe the prolem of flse negtives ws presented in [4]. Another interesting tehnique to rry out design verition using internl equivlenes nd oservility don't res hs een presented in [7]. owever, tehniques suh s [7] my not disover even ll neessry ssignments. Tehniques of [4] n sle poorly with inresing iruit sizes s ws found in some industril iruits [3]. Most suh tehniques nd it very diult to detet reltionships etween points not in struturl proximity. Importntly, the types of reltionships tht these tehniques n disover re limited. For exmple, these methods n lern Constnt-Vlue Reltionships: if onstnt Boolen vlue v 2f;gt given gte implies nother onstnt Boolen vlue t nother gte. owever, they nnot detet more involved reltionships etween set of funtions with nother set of funtions. For exmple, gte f = my simply imply tht disjuntion tken over some given set of funtions must e. Or, under f =, set of gtes must ssume identil vlue. Clerly, these tehniques nnot esily lern onditions implied y more omplex Boolen reltions mong two or more gtes in the iruit. We suggest one possile solution to the omintionl verition prolem through lerning tehnique sed on OBDDs. We will show tht this tehnique n work s eiently or even etter thn typil lerning tehniques. The pility of OBDDs to model vrious funtions nd lso symolilly mnipulte them is well epted. ene it is not surprising tht OBDDs n e lso esily used to derive more involved internl reltionships implitions s well. Our results show tht the sizes of the OBDDs tht re required to e uilt re extremely smll. ene, there is no memory explosion. Although not used in the present work, use of dynmi reordering [] n mkeiteven further eient for most omintionl iruits enountered in rel life. In this pper we will hiey fous on demonstrting tht funtionl lerning is n eient tool for deteting internl orrespondenes. Sine onstnt-vlue reltionships re the only kind whih existing lerning tehniques n detet, our hief tsk in this pper is to show tht funtionl lerning n e s eient s exist-
ing lerning tehniques in the determintion of onstntvlue reltionships. 2 On Funtionl Lerning The lerning tehniques involve the temporry injetion of logi vlues t ritrry signls in digitl iruit nd the susequent exmintion of its logil onsequenes. Sortes [8] rried out stti lerning nd the method of lerning ws further improved in [2]. Funtionl lerning, introdued in [] is esily seen s the superset of ll the previous lerning methods [8, 2]. Funtionl lerning is omplete method, i.e. given suient time, it n identify ll neessry ssignments from given sitution of vlue ssignments in iruit. The onept of funtionl lerning is explined elow with the help of n exmple. We will illustrte the dded pility of funtionl lerning using n exmple in Figure 3. 2 8 2 24 Theorem 2.. If =)=then V =. Conversely, if V =, then =)=. By the Lw of Contrpositum =)=.. If =)=then V =. The onverse is lso true. Tht is if V =, then =) =. By the Lw of Contrpositum =)=. As shown in [], the ove two opertions sue in heking ny simple onstnt-vlue reltionship etween two points nd. As shown in the Figures 4, if Boolen is injeted t the gte in the iruit shown in the Figure 3, then the gte eomes unjustied. The OBDD for this wire in terms of (,,) is shown in the Figures 4(), nd the OBDDs for oth the wires, nd I, in terms of (,,,d) re shown in the Figure 4(). The result of the AND opertion etween the OBDD nd the OBDD is OBDD R nd is shown in Figure 4(). It n e seen tht there is no unique lerning ut we lern tht under the ondition =,oth Y nd Y2 must rry identil Boolen vlues. Note tht heking for the equivlene of two OBDDs is onstnt time opertion. 3 CUT () 4 () 6 Ciruit A 6 7 9 5 () () 9 2 23 (unjust.) d Ciruit B I m Y = = BDD opertion used : = Figure : Funtionl lerning Ciruit C n Y2 Consider the wire 23 in the iruit shown in Figure to e unjustied to. nd re the OBDDs for the wires 23 nd 6 respetively, uilt in terms of the pseudo inputs, nd. The two OBDDs re shown in Figure 2 []. The result of the AND opertion etween nd is. This implies tht when is Boolen, is Boolen. ene, it is lerned tht Boolen on the wire 23 implies Boolen on the wire 6. By forwrd implition, it is lerned tht the wire 24 must rry Boolen. A Boolen on the wire 6 nd Boolen on the wire 24 re the neessry onditions for Boolen on the wire 23. () Figure 2: OBDDs for wire 23 nd wire 6 The theorem tht governs the lerning opertions in funtionl lerning is presented elow []. () Figure 3: Funtionl lerning d R d () () () Figure 4: BDDs in Ciruit of Figure 3. () BDD ; () BDD ; () BDD ^ 2. Preise mrking of potentil lerning re iven n unjustied wire, funtionl lerning rst hooses n pproprite ut. The present tehnique for hoosing ut is sed on simple redth-rst trversl of the trnsitive fn-in one of the unjustied wire, strting t the unjustied wire. Next, the OBDD for the unjustied wire is uilt in terms of the ut vriles. One the OBDD is uilt, pproprite AND opertions,
s explined in the previous setion, must e performed in order to lern indiret implitions. But, the wires where lerning will e possile under the given sitution of vlue ssignments in the iruit re not known efore hnd. In order to preisely demrte the potentil lerning res in the iruit preproessing of the OBDD is rried out. Denition 2. A justition vetor in n OBDD is pth from the root vrile in the OBDD to tht terminl node whose vlue is equl to the vlue of the unjustied wire. During the preproessing of the OBDD for the unjustied wire, onstnt k numer of justition vetors re extrted. These vetors re pplied to the iruit nd omplete implition is rried out. After the pplition of ll the k justition vetors, the wires tht rry ommon Boolen vlues for ll the onsistent justition vetors re mrked s the potentil lerning res. Only these wires re sujeted to the lerning opertions using the proedure explined erlier. The numer of justition vetors tht need to e pplied in order to demrte the potentil lerning res with high mount of preision is mtter of heuristi. The proess of justition vetor evlution is stopped if either no new wires re eliminted from the list of potentil lerning res fter two suessive evlutions or if user-dened upper limit on the numer of justition vetors to e extrted is rehed or if evlution of ll the justition vetors in the OBDD is ompleted. In the se of lrger OBDD for whih omplete enumertion of ll the justition vetors is not fesile, the proedure outlined ove gives the wires whih omprise the potentil lerning re. One the potentil lerning re hs een mrked, lerning opertions sed on the theorem stted ove re rried out t these wires. 3 Algorithm for Verition As is ustomry in suh pprohes, the prolem of design verition hs een onverted to the prolem of heking for stisility. The two iruits to e veried re joined t their primry inputs. Their orresponding primry outputs re fed in pirs to 2-input XOR gtes. This new iruit will e heneforth referred to s the omposite iruit. Thus, if the two iruits re to e proven inequivlent, ll tht needs to e done is to prove the stisility of the output of ny of the ove XOR gtes. In this work it is ssumed tht there re no externl don't res in the iruits. owever, this work n e extended to inorporte externl don't res s well. In this ontext, results presented in [9] n e esily inorported. The omplete ow digrm for the logi verition lgorithm is shown in Figure 5. In the lerning phse, indiret implitions from one iruit to the other iruit re lerned y injeting Boolen vlues t dierent wires in the iruit. At eh gte Boolen vlue is injeted suh tht the gte eomes unjustied. For exmple Boolen is injeted t the output of n AND gte nd Boolen t the output of n OR gte. Similrly, oth Boolen nd Boolen re injeted t the output of n XOR/XR gte. This phse is rried out using YES START Lerning phse : injeting Boolen vlues nd storing indiret implitions Cheking phse : hek if ll pirs of POs of the two iruits re equivlent Is the verifition of ll the POs over? Is L > L C Cmx? STOP L = L + C C L = L + L L Is L > L L Lmx? ATP YES Figure 5: Flow Digrm for Verition ertin initil level of lerning L L. In our implementtion, we strt with n initil lerning level of. All the indiret implitions lerned during this phse re stored long with the dt struture of the wire from whih itws lerned. In this phse it is importnt to hve nished proessing ll the wires in the trnsitive fn-in of the present wire. This is needed to ensure tht during the proessing of the present wire we n mke use of the pre-stored implitions of the wires in its trnsitive fn-in to speed up the proess of lerning indiret implitions. In the heking phse, we hek for the equivlene of the orresponding primry outputs of the two iruits. In this phse Boolen is injeted t the output of the pproprite XOR gte nd prestored implitions re used to try nd prove onit of this sitution of vlue ssignment. An OBDD for the output of the XOR gte is uilt in terms of n pproprite ut t level L C in the two iruits. Next, the indiret implitions mong the ut vriles re utilized in order to try nd prove tht ll the pths in the OBDD strting from the topmost vrile nd terminting t the node re inonsistent. If onit is proved, then the two orresponding primry outputs re equivlent. This phse is initited with n initil level L C =. If the two outputs nnot e proved to e equivlent, then L C is inremented nd the proess is repeted till L C exeeds preset L Cmx. If fter this phse, we still hve primry outputs remining tht hve not een shown to e equivlent, the lerning level for the lerning phse is inremented nd lerning for indiret implitions is rried out with higher preision. If the lerning level L L for lerning phse exeeds preset L Lmx, then for the remining primry outputs we use n ATP tool tht tries to generte test for the fult s-- t the
output of the pproprite XOR gte t the output of the omposite iruit. The ATP tool mkes use of ll the pre-stored indiret implitions, thus eetively reduing the serh spe for test. The two orresponding primry outputs re equivlent if the fult is proved to e redundnt. Otherwise, test vetor is generted whih is the distinguishing vetor for the two iruits. If the ATP tool fils to prove the fult to e redundnt nd lso fils to nd test vetor for the fult, then VERIFUL orts. It should e noted tht the lerning phse is y itself omplete lgorithm for logi verition. iven enough time, the lerning phse itself n prove the iruits to e equivlent or inequivlent s the se my e. Now, we riey disuss some other interesting hrteristis of funtionl lerning. owever, detiled proofs of the theorems hve een omitted due to spe onstrint. Assume tht S f (L) nd S r (L) re the set of onditions lerned respetively y the funtionl lerning (FL) tehnique when operting t distne L from n initil vlue ssignment (or \operting t level L" s we will use in the following), nd reursive lerning (RL) tehnique t reursion level L. It n e proved tht Theorem 3. S f (L) S f (L ) [ :::[S f (L 2) [ S f () An importnt dierene etween FL nd RL tehniques n e notied in following. Assume t f (L), t r (L) re the time required to lern operting t level L in FL, nd reursion level L in RL. ene T f (L) = P i=l i= t f (i) is the time required if the method egins y lerning t eh level eginning from level. owever, in FL one n hoose to egin t level L nd ypss the eorts required t erlier levels. Theorem 3.2 In Reursive lerning, to lern onditions in S r (L) -treursion level L, one needs to spend t lest T r (L) = P i=l i= t r(i) units of time. owever, in funtionl lerning, only t f (L) units of time n sue in providing the lower ound on disovering S f (L). Ignoring the rguments out BDD vrile ordering, n RL method pprently hs higher omputtionl omplexity. As shown in [], for some funtions, FL tkes time polynomil in numer of gtes nlyzed ut RL requires exponentil time resoures. The reverse is not true. It does not pper possile one n require polynomil time for n RL method ut exponentil time for the FL method. Interestingly, our experiments show tht FL performs eqully well s RL sed verition even on 6288, multiplier, hving n exponentil representtion using OBDDs. Note, typilly BDD hs exponentilly mny pth in it. ene it is wiser to write the onjuntion of ll lerned onditions themselves s BDD. ene lerning =)= n e written s ( ^ ). Let eh of the lerning ondition i e expressed s BDD, nd LC represent the set of suh BDDs. Let e some utset suh tht it seprtes the output F of iruit C nd output F2 of iruit C2 from the primry inputs. Consider F() nd F2() to e the orresponding output OBDDs when expressed in terms of gtes t the ut. In other words, the gtes on ut re now the (pseudo) inputs through whih outputs F nd F2 re expressed. Let LC() e the set of lerning ondition BDDs, gin expressed in terms of ut-points (gtes) on. Theorem 3.3 F nd F2, orresponding output funtions of the iruits C nd C2 re equivlent if (F() F2()) ^ i, i 2 LC() is not stisle. For pth enumertion mehnism, following simple oservtion is quite useful. Oservtion: A sheme working y pth extrtion n esily exhustively nlyze funtion without extrting ll pths sine we wish to test for stisility only y determining whether onit exists on ll stisle pths. Let! e some utset seprting the root nd the terminls in BDD F() F2(). Theorem 3.4 If we (redth-rst) enumerte ll pths from root leding up to utset! within BDD F() F2() then F nd F 2 re not equivlent if there is onit on eh suh pth. 4 Results In this setion the results on ISCAS 85 enhmrk iruits re presented. These results re extremely enourging nd prove tht funtionl lerning sed verition n e very powerful tool tht designers n use to verify their designs during the synthesis proedure. We present here the results where the redundnt omintionl iruits re veried ginst their nonredundnt versions. To otin orret perspetive of our results, note tht the orresponding spe s well s times required for veritions using OBDDs is out three orders of mgnitude higher for iruits suh s 6288! The experiments hve een rried out on Sun Spr Sttion. The times reported re in seonds. The results show tht funtionl lerning is n extremely fst nd eient method to extrt internl equivlenes nd indiret implitions in digitl logi. Note, Theorems 3.3 nd 3.4 were not employed for the results otined in this pper; only simple pth enumertion ws used in the heking phse. An dded dvntge of funtionl lerning tht we intend to utilize in our future work is its ility to work on iruits where prts of the logi re not represented s logi gtes ut simply s Boolen funtions. This is euse of its pility to mnipulte informtion on Boolen funtions y using BDDs. Note tht the other existing lerning tehniques [8, 2] do not hve this pility. We lso intend to use dditionl reltionships (indiret implitions whih re not onstnt-vlue reltions) tht re esily desried in our pproh. 5 Conlusion In this pper we hve presented the preliminry results on VERIFUL, design verition tool sed on funtionl lerning, n extremely powerful lerning tehnique for digitl logi, whih ws rst introdued in []. We hve onduted experiments on the ISCAS 85 enhmrk iruits. These experiments indite tht Note, the numer of prestored implitions re indiret implitions exept smll numer of dispensle, diret implitions tht our preliminry version of progrm stores.
Tle : Verition of some enhmrk iruits Ciruits eing veried L L L C # prestored implitions CPU time (min:se) 432 vs. 432nr 2 976 :.49 499 vs. 499nr 56 :.4 355 vs. 355nr 499 vs. 355 266 3834 :3.5 :.94 98 vs. 98nr 267 vs. 267nr 2 5336 7498 :5.76 :48 354 vs. 354nr 535 vs. 535nr 2854 726 6:5 6:57 6288 vs. 6288nr 7552 vs. 7552nr 994 69379 :24.5 3:5 funtionl lerning sed verition n eome very powerful nd verstile tool for use during iruit synthesis. Further, in this pper we hve lso riey pointed out theoretilly the superiority nd greter power of funtionl lerning over the other existing lerning tehniques [8, 2]. Mny other interesting properties of funtionl lerning n lso e shown s well s the ft tht these tehniques n esily e integrted with onventionl OBDD sed verition methods to yield very powerful verition methodologies [2]. After further improved integrtion of urrent progrms with sophistited ATP tool, our susequent reserh will e direted towrds the pplition of funtionl lerning to the elds of OBDD sed sequentil iruit testing [3] nd verition, nd optimiztion of oth omintionl nd sequentil logi iruits. We lso intend to use vrious new kinds of lernings suh s indiret implitions etween sets of funtions nd generlized reltionships in iruit tht n e esily extrted y our method. Referenes [] Mukherjee R., Jin J., Prdhn D. K., \Funtionl Lerning: A new pproh to lerning in digitl iruits", Pro. IEEE VLSI Test Symp., pp. 22-27, April 994 [2] Jin J., Mukherjee R., Fujit M., \Advned Verition Tehniques Bsed on Lerning" Sumitted for Pulition. [3] Entren L., Cheng K-T., \Sequentil Logi Optimiztion By Redundny Addition And Removl", ICCAD, 993, pp. 3-35. [4] oel P., \An Impliit Enumertion Algorithm to enerte Tests for Comintionl Logi Ciruits", IEEE Trnstions on Computers, vol. C-3, pp. 25-222, Mr. 98. [5] Mlik S. et l., \Logi Verition using Binry Deision Digrms in Logi Synthesis Environment", ICCAD, 988, pp. 6-9. [6] Fujit M., Fujisw., Kwto N., \Evlution nd Improvements of Boolen Comprison Method Bsed on Binry Deision Digrms", ICCAD, 988, pp. 2-5. [7] Fujiwr., Shimono T., \On the Aelertion of Test enertion Algorithms", Pro. 3th Int. Symp. Fult Tolernt Computing, pp. 98-5, 983. [8] Shulz M., Trishler E., Sfert T., \SOCRATES: A highly eient utomti test pttern genertion system", Int. Test Conf., 987. [9] Brynt R. E., \rph-bsed Algorithms for Boolen Funtion Mnipultion", IEEE Trnstions on Computers, vol. C-35, no. 8, Aug. 986. [] Bre K. S., Rudell R. L., Brynt R. E., \Eient Implementtion of BDD Pkge", Pro. 27th Design Automtion Conf., pp. 4-45. [] Rudell R. L., \Dynmi Vrile Ordering for Ordered Binry Deision Digrms", Pro. ICCAD, 993, pp. 42-47. [2] Kunz W., Prdhn D. K., \Reursive Lerning: An Attrtive Alterntive to the Deision Tree for Test enertion in Digitl Ciruits", Pro. Int. Test Conf., pp. 86-825, 992. [3] Moondnos, J. nd Arhm, J. A., \Sequentil Redundny Identition Using Verition Tehniques", Pro. Int. Test Conf., pp. 97-25, 992. [4] Kunz W., \ANNIBAL: An Eient Tool for Logi Verition Bsed on Reursive Lerning", Pro. Int. Conf. Computer Aided Design, 993. [5] Bermn C. L., Trevyllin L.., \Funtionl Comprison of Logi Designs for VLSI Ciruits", ICCAD, 989, pp. 456-459. [6] As E. J., Klingsheim K., Steen T., \Quntifying Design Qulity: A Model nd Design Experiments", Pro. of EURO ASIC 992, pp. 72-77. [7] Brnd D., \Verition of Lrge Synthesized Designs", ICCAD, 993, pp. 534-537. [8] Cerny E., Murs C., \Tutology Cheking Using Cross- Controllility nd Cross- Oservility Reltions", IC- CAD, 99, pp. 34-38. [9] Shiple T. R., ojti R., Bryton R. K., \euristi minimiztion of BDDs using don't res", DAC, 994, pp. 225-23.