INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC06 74C/CT/CU/CMOS ogic Family Specifications The IC06 74C/CT/CU/CMOS ogic Package Information The IC06 74C/CT/CU/CMOS ogic Package Outlines 74C/CT238 File under Integrated Circuits, IC06 December 1990
74C/CT238 FEATURES Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active IG mutually exclusive outputs Output capability: standard I CC category: MSI GENERA DESCRIPTION The 74C/CT238 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TT (STT). They are specified in compliance with JEDEC standard no. 7A. The 74C/CT238 decoders accept three binary weighted address inputs (A 0, A 1, A 2 ) and when enabled, provide 8 mutually exclusive active IG outputs (Y 0 to Y 7 ). The 238 features three enable inputs: two active OW (E 1 and E 2 ) and one active IG (E 3 ). Every output will be OW unless E 1 and E 2 are OW and E 3 is IG. This multiple enable function allows easy parallel expansion of the 238 to a 1-of-32 (5 lines to 32 lines) decoder with just four 238 ICs and one inverter. The 238 can be used as an eight output demultiplexer by using one of the active OW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active IG or OW state. The 238 is identical to the 138 but has non-inverting outputs. QUICK REFERENCE DATA GND = 0 V; T amb =25 C; t r =t f = 6 ns TYPICA SYMBO PARAMETER CONDITIONS C CT UNIT t P/ t P propagation delay C = 15 pf; V CC =5 V A n to Y n 14 18 ns E 3 to Y n 16 20 ns E n to Y n 17 21 ns C I input capacitance 3.5 3.5 pf C PD power dissipation capacitance per package notes 1 and 2 72 76 pf Notes 1. C PD is used to determine the dynamic power dissipation (P D in µw): P D =C PD V 2 CC f i + (C V 2 CC f o ) where: f i = input frequency in Mz f o = output frequency in Mz (C V 2 CC f o ) = sum of outputs C = output load capacitance in pf V CC = supply voltage in V 2. For C the condition is V I = GND to V CC For CT the condition is V I = GND to V CC 1.5 V ORDERING INFORMATION See 74C/CT/CU/CMOS ogic Package Information. December 1990 2
74C/CT238 PIN DESCRIPTION PIN NO. SYMBO NAME AND FUNCTION 1, 2, 3 A 0 to A 2 address inputs 4, 5 E 1, E 2 enable inputs (active OW) 6 E 3 enable input (active IG) 8 GND ground (0 V) 15, 14, 13, 12, 11, 10, 9, 7 Y 0 to Y 7 outputs (active IG) 16 V CC positive supply voltage Fig.1 Pin configuration. Fig.2 ogic symbol. (a) Fig.3 IEC logic symbol. (b) December 1990 3
December 1990 4 Philips Semiconductors 74C/CT238 Fig.4 Functional diagram. Fig.5 ogic diagram. FUNCTION TABE Note 1. = IG voltage level = OW voltage level = don t care INPUTS OUTPUTS E 1 E 2 E 3 A 0 A 1 A 2 Y 0 Y 1 Y 2 Y 3 Y 4 Y 5 Y 6 Y 7
74C/CT238 DC CARACTERISTICS FOR 74C For the DC characteristics see 74C/CT/CU/CMOS ogic Family Specifications. Output capability: standard I CC category: MSI AC CARACTERISTICS FOR 74C GND = 0 V; t r =t f = 6 ns; C = 50 pf SYMBO t P / t P t P / t P t P / t P PARAMETER propagation delay 47 A n to Y n 17 14 propagation delay 52 E 3 to Y n 19 15 propagation delay 50 E n to Y n 18 14 t T / t T output transition time 19 7 6 T amb ( C) 74C +25 40 to +85 40 to +125 min. typ. max. min. max. min. max. 150 30 26 160 32 27 155 31 26 75 15 13 190 38 33 200 40 34 195 39 33 95 19 16 225 45 38 240 48 41 235 47 40 110 22 19 UNIT TEST CONDITIONS V CC (V) WAVEFORMS Fig.6 Fig.6 Fig.7 Figs 6 and 7 December 1990 5
74C/CT238 DC CARACTERISTICS FOR 74CT For the DC characteristics see 74C/CT/CU/CMOS ogic Family Specifications. Output capability: standard I CC category: MSI Note to CT types The value of additional quiescent supply current ( I CC ) for a unit load of 1 is given in the family specifications. To determine I CC per input, multiply this value by the unit load coefficient shown in the table below. INPUT A n E n E 3 UNIT OAD COEFFICIENT 0.70 0.40 1.45 AC CARACTERISTICS FOR 74CT GND = 0 V; t r =t f = 6 ns; C = 50 pf T amb ( C) TEST CONDITIONS 21 35 44 53 ns Fig.6 17 35 44 53 ns Fig.6 22 37 46 56 ns Fig.6 18 37 46 56 ns Fig.6 21 35 44 53 ns Fig.7 18 35 44 53 ns Fig.7 74CT SYMBO PARAMETER UNIT V WAVEFORMS +25 40 to +85 40 to +125 CC (V) min. typ. max. min. max. min. max. t P propagation delay A n to Y n t P propagation delay A n to Y n t P propagation delay E 3 to Y n t P propagation delay E 3 to Y n t P propagation delay E n to Y n t P propagation delay E n to Y n t T / t T output transition time 7 15 19 22 ns Figs 6 and 7 December 1990 6
74C/CT238 AC WAVEFORMS (1) C : V M = 50%; V I = GND to V CC. CT: V M = 1.3 V; V I = GND to 3 V. Fig.6 Waveforms showing the address input (A n ) and enable input (E 3 ) to output (Y n ) propagation delays and the output transition times. (1) C : V M = 50%; V I = GND to V CC. CT: V M = 1.3 V; V I = GND to 3 V. Fig.7 Waveforms showing the enable input (E n ) to output (Y n ) propagation delays and the output transition times. PACKAGE OUTINES See 74C/CT/CU/CMOS ogic Package Outlines. December 1990 7