Important notice Dear ustomer, On 7 February 07 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - NXP N.V. (year). ll rights reserved or Koninklijke Philips Electronics N.V. (year). ll rights reserved Should be replaced with: - Nexperia.V. (year). ll rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia
Rev. 4 august 0 Product data sheet. General description The provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of -bit input. The user can choose the logic functions MUX, ND, OR, NND, NOR, inverter and buffer. ll inputs can be connected to V or GND. This device ensures a very low static and dynamic power consumption across the entire V range from. V to. V. The is designed for logic-level translation applications with input switching levels that accept.8 V low-voltage MOS signals, while operating from either a single. V or. V supply voltage. The wide supply voltage range ensures normal operation as battery voltage drops from. V to. V. This device is fully specified for partial power-down applications using I OFF. The I OFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire V range.. Features and benefits Wide supply voltage range from. V to. V High noise immunity ESD protection: HM JESD-4F lass exceeds 000 V MM JESD-- exceeds 00 V DM JESD-0E exceeds 000 V Low static power consumption; I =. (maximum) Latch-up performance exceeds 00 m per JESD 78 lass II Inputs accept voltages up to. V Low noise overshoot and undershoot < 0 % of V I OFF circuitry provides partial power-down mode operation Multiple package options Specified from 40 to+8 and 40 to+
. Ordering information Table. Type number 4. Marking Ordering information Package Temperature range Name Description Version GW 40 to + S-88 plastic surface-mounted package; leads SOT GM 40 to + XSON plastic extremely thin small outline package; no leads; terminals; body.4 0. mm GF 40 to + XSON plastic extremely thin small outline package; no leads; terminals; body 0. mm GN 40 to + XSON extremely thin small outline package; no leads; terminals; body 0.9.0 0. mm GS 40 to + XSON extremely thin small outline package; no leads; terminals; body.0.0 0. mm SOT88 SOT89 SOT SOT0 Table. Marking Type number GW GM GF GN GS Marking code ar ar ar ar ar. Functional diagram 4 00aad987 Fig. Logic symbol ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 of 0
. Pinning information. Pinning GND V GND 4 V 4 00aah840 GND V 4 00aah84 00aah89 Transparent top view Transparent top view Fig. Pin configuration SOT Fig. Pin configuration SOT88 Fig 4. Pin configuration SOT89, SOT and SOT0. Pin description Table. Pin description Symbol Pin Description data input GND ground (0 V) data input 4 data output V supply voltage data input 7. Functional description Table 4. Function table [] Input Output L L L H L L H H L H L L L H H L H L L H H L H L H H L H H H H L [] H = HIGH voltage level; L = LOW voltage level. ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 of 0
7. Logic configurations Table. Function selection table Logic function Figure -input MUX (inverting) see Figure -input NND see Figure -input NOR with one input inverted see Figure 7 -input ND with one input inverted see Figure 7 -input NND with one input inverted see Figure 8 -input OR with one input inverted see Figure 8 -input NOR see Figure 9 uffer see Figure 0 Inverter see Figure V V 4 4 00aad99 00aad99 Fig. -input MUX (inverting) Fig. -input NND gate V V 4 4 00aad99 00aad994 Fig 7. -input ND gate with input inverted or -input NOR gate with input inverted Fig 8. -input OR gate with input inverted or -input NND gate with input inverted V V 4 4 00aad99 00aad99 Fig 9. -input NOR gate Fig 0. uffer ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 4 of 0
V 4 00aad997 Fig. Inverter 8. Limiting values Table. Limiting values In accordance with the bsolute Maximum Rating System (IE 04). Voltages are referenced to GND (ground = 0 V). Symbol Parameter onditions Min Max Unit V supply voltage 0. +4. V I IK input clamping current V I <0V 0 - m V I input voltage [] 0. +4. V I OK output clamping current V O <0V 0 - m V O output voltage ctive mode and Power-down mode [] 0. +4. V I O output current V O =0 VtoV - 0 m I supply current - +0 m I GND ground current 0 - m T stg storage temperature +0 P tot total power dissipation T amb = 40 to + [] - 0 mw [] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [] For S-88 package: above 87. the value of P tot derates linearly with 4.0 mw/k. For XSON packages: above 8 the value of P tot derates linearly with 7.8 mw/k. 9. Recommended operating conditions Table 7. Recommended operating conditions Symbol Parameter onditions Min Max Unit V supply voltage.. V V I input voltage 0. V V O output voltage ctive mode 0 V V Power-down mode; V =0V 0. V T amb ambient temperature 40 + ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 of 0
0. Static characteristics Table 8. Static characteristics t recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter onditions Min Typ Max Unit T amb = V T+ positive-going threshold V =. V to.7 V 0.0 -.0 V voltage V =.0 V to. V 0.7 -. V V T negative-going threshold V =. V to.7 V 0. - 0.0 V voltage V =.0 V to. V 0.0-0.8 V V H hysteresis voltage (V H = V T+ V T ) V =. V to.7 V 0. - 0.0 V V =.0 V to. V 0. - 0. V V OH HIGH-level output voltage V I = V T+ or V T I O = 0 ; V =. V to. V V 0. - - V I O =. m; V =. V.0 - - V I O =. m; V =. V.9 - - V I O =.7 m; V =.0 V.7 - - V I O = 4.0 m; V =.0 V. - - V V OL LOW-level output voltage V I = V T+ or V T I O = 0 ; V =. V to. V - - 0.0 V I O =. m; V =. V - - 0. V I O =. m; V =. V - - 0.44 V I O =.7 m; V =.0 V - - 0. V I O = 4.0 m; V =.0 V - - 0.44 V I I input leakage current V I = GND to. V; V = 0 V to. V - - 0. I OFF power-off leakage current V I or V O = 0 V to. V; V = 0 V - - 0. I OFF additional power-off V I or V O = 0 V to. V; - - 0. leakage current V =0Vto0.V I supply current V I = GND or V ; I O = 0 ; - -. V =. V to. V I input capacitance V = 0 V to. V; V I = GND or V - 0.8 - pf O output capacitance V O = GND; V = 0 V -.7 - pf T amb = 40 to +8 V T+ positive-going threshold V =. V to.7 V 0.0 -.0 V voltage V =.0 V to. V 0.7 -.9 V V T negative-going threshold V =. V to.7 V 0. - 0.0 V voltage V =.0 V to. V 0.0-0.8 V V H hysteresis voltage (V H = V T+ V T ) V =. V to.7 V 0.0-0.0 V V =.0 V to. V 0. - 0. V ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 of 0
Table 8. Static characteristics continued t recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter onditions Min Typ Max Unit V OH HIGH-level output voltage V I = V T+ or V T V OL LOW-level output voltage V I = V T+ or V T I O = 0 ; V =. V to. V V 0. - - V I O =. m; V =. V.97 - - V I O =. m; V =. V.8 - - V I O =.7 m; V =.0 V.7 - - V I O = 4.0 m; V =.0 V. - - V I O = 0 ; V =. V to. V - - 0. V I O =. m; V =. V - - 0. V I O =. m; V =. V - - 0.4 V I O =.7 m; V =.0 V - - 0. V I O = 4.0 m; V =.0 V - - 0.4 V I I input leakage current V I = GND to. V; V = 0 V to. V - - 0. I OFF power-off leakage current V I or V O = 0 V to. V; V = 0 V - - 0. I OFF additional power-off V I or V O = 0 V to. V; - - 0. leakage current V =0Vto0.V I supply current V I = GND or V ; I O = 0 ; - -. V =. V to. V I additional supply current V =. V to.7 V; I O = 0 [] - - 4 V =.0 V to. V; I O = 0 [] - - T amb = 40 to + V T+ positive-going threshold V =. V to.7 V 0.0 -.0 V voltage V =.0 V to. V 0.7 -.9 V V T negative-going threshold V =. V to.7 V 0. - 0.4 V voltage V =.0 V to. V 0.4-0.8 V V H hysteresis voltage (V H = V T+ V T ) V =. V to.7 V 0.0-0.0 V V =.0 V to. V 0. - 0. V V OH HIGH-level output voltage V I = V T+ or V T I O = 0 ; V =. V to. V V 0. - - V I O =. m; V =. V.77 - - V I O =. m; V =. V.7 - - V I O =.7 m; V =.0 V.40 - - V I O = 4.0 m; V =.0 V.0 - - V V OL LOW-level output voltage V I = V T+ or V T I O = 0 ; V =. V to. V - - 0. V I O =. m; V =. V - - 0. V I O =. m; V =. V - - 0.0 V I O =.7 m; V =.0 V - - 0. V I O = 4.0 m; V =.0 V - - 0.0 V I I input leakage current V I = GND to. V; V = 0 V to. V - - 0.7 ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 7 of 0
Table 8. Static characteristics continued t recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter onditions Min Typ Max Unit I OFF power-off leakage current V I or V O = 0 V to. V; V = 0 V - - 0.7 I OFF additional power-off V I or V O = 0 V to. V; - - 0.7 leakage current V =0Vto0.V I supply current V I = GND or V ; I O = 0 ; - -. V =. V to. V I additional supply current V =. V to.7 V; I O = 0 [] - - 7 V =.0 V to. V; I O = 0 [] - - [] One input at 0. V or. V, other input at V or GND. [] One input at 0.4 V or. V, other input at V or GND.. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure. Symbol Parameter onditions 40 to + Unit Min Typ [] Max Min Max (8 ) Max ( ) V =. V to.7 V; V I =. V to.9 V t pd propagation delay,, to ; see Figure [] L = pf.0..7 0..8 7. ns L = 0 pf. 4...0 7.9 8.7 ns L = pf.9 4..9.0 8.7 9. ns L = 0 pf.9.8 8.. 0.8.9 ns V =. V to.7 V; V I =. V to.7 V t pd propagation delay,, to ; see Figure [] L = pf.7.4. 0..0. ns L = 0 pf. 4.0..0 7. 7.9 ns L = pf. 4..9.0 7.9 8.7 ns L = 0 pf.4. 8.4. 0.0.0 ns V =. V to.7 V; V I =.0 V to. V t pd propagation delay,, to ; see Figure [] L = pf... 0... ns L = 0 pf.8.7.9.0. 7. ns L = pf. 4...0 7.4 8. ns L = 0 pf..4 7.9. 9. 0. ns V =.0 V to. V; V I =. V to.9 V t pd propagation delay,, to ; see Figure [] L = pf.0.9 4. 0. 8.0 8.8 ns L = 0 pf.4. 4.8.0 8. 9.4 ns L = pf.8.9.4.0 9. 0. ns L = 0 pf...9. 9.8 0.8 ns ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 8 of 0
Table 9. Dynamic characteristics continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure. Symbol Parameter onditions 40 to + Unit V =.0 V to. V; V I =. V to.7 V t pd propagation delay,, to ; see Figure [] L = pf..8 4.4 0...9 ns L = 0 pf.0.4..0..8 ns L = pf.4.9.7.0.8 7. ns L = 0 pf.4.0 7.. 8. 9.4 ns V =.0 V to. V; V I =.0 V to. V t pd propagation delay,, to ; see Figure [] L = pf..8 4.4 0. 4.7. ns L = 0 pf.7...0.7. ns L = pf..8.8.0..9 ns L = 0 pf..0 7.. 7.8 8. ns T amb = PD power dissipation f i = MHz; V I = GND to V [] capacitance V =. V to.7 V -. - - - - pf V =.0 V to. V - 4. - - - - pf [] ll typical values are measured at nominal V. [] t pd is the same as t PLH and t PHL [] PD is used to determine the dynamic power dissipation (P D in W). P D = PD V f i N+ ( L V f o ) where: f i = input frequency in MHz; f o = output frequency in MHz; L = output load capacitance in pf; V = supply voltage in V; N = number of inputs switching; ( L V f o ) = sum of the outputs. Min Typ [] Max Min Max (8 ) Max ( ) ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 9 of 0
. Waveforms V I,, input V M V M GND t PHL t PLH V OH output V M V M V OL t PLH t PHL V OH output V M V M V OL 00aab9 Fig. Measurement points are given in Table 0. V OL and V OH are typical output voltage levels that occur with the output load. Input, and to output propagation delay times Table 0. Measurement points Supply voltage Output Input V V M V M V I t r = t f. V to. V 0. V 0. V I. V to. V.0 ns ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 0 of 0
V V EXT G VI DUT VO kω RT L RL 00aac Fig. Test data is given in Table. Definitions for test circuit: R L = Load resistance. L = Load capacitance including jig and probe capacitance. R T = Termination resistance should be equal to the output impedance Z o of the pulse generator. V EXT = External voltage for measuring switching times. Test circuit for measuring switching times Table. Test data Supply voltage Load V EXT V L R [] L t PLH, t PHL t PZH, t PHZ t PZL, t PLZ. V to. V pf, 0 pf, pf and 0 pf k or M open GND V [] For measuring enable and disable times R L = k, for measuring propagation delays, setup and hold times and pulse width R L = M. ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 of 0
. Package outline Plastic surface-mounted package; leads SOT D E X y H E v M 4 Q pin index c e b p w M L p e detail X 0 mm scale DIMENSIONS (mm are the original dimensions) UNIT bp c D E e e max H E Lp Q v w y mm. 0. 0.8 0.0 0.0 0. 0.0..8... 0...0 0.4 0. 0. 0. 0. 0. 0. OUTLINE VERSION REFERENES IE JEDE JEIT EUROPEN PROJETION ISSUE DTE SOT S-88 04--08 0-0- Fig 4. Package outline SOT (S-88) ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 of 0
XSON: plastic extremely thin small outline package; no leads; terminals; body x.4 x 0. mm SOT88 b L L 4x () e 4 e e x () D E terminal index area Dimensions (mm are the original dimensions) 0 mm scale Unit () b D E e e L L mm max nom min Outline version SOT88 0. 0.04 0..0 0.0.4 0.7.40.0.00 0.9 0. Notes. Including plating thickness.. an be visible in some manufacturing processes. 0. References IE JEDE JEIT MO- 0. 0.0 0.7 0.40 0. 0. European projection Issue date 04-07- -0-0 sot88_po Fig. Package outline SOT88 (XSON) ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 of 0
XSON: plastic extremely thin small outline package; no leads; terminals; body x x 0. mm SOT89 b L L 4 () e 4 e e () D E terminal index area DIMENSIONS (mm are the original dimensions) 0 mm scale UNIT mm max max 0. 0.04 b 0.0 0. D E e e L.0 0.9.0 0.9 0. Note. an be visible in some manufacturing processes. 0. 0. 0.7 L 0.40 0. OUTLINE VERSION REFERENES IE JEDE JEIT EUROPEN PROJETION ISSUE DTE SOT89 0-04-0 07-0- Fig. Package outline SOT89 (XSON) ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 4 of 0
XSON: extremely thin small outline package; no leads; terminals; body 0.9 x.0 x 0. mm SOT b (4 ) () L L e 4 e e ( ) () D E terminal index area Dimensions 0 0. mm scale Unit () b D E e e L L mm max nom min Outline version SOT 0. 0.04 0.0 0.9 0. 0.90 0. 0.8.0.00 0.9 0. 0. Note. Including plating thickness.. Visible depending upon used manufacturing technology. 0. 0.0 0.7 References 0.40 0. 0. IE JEDE JEIT European projection Issue date 0-04-0 0-04-07 sot_po Fig 7. Package outline SOT (XSON) ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 of 0
XSON: extremely thin small outline package; no leads; terminals; body.0 x.0 x 0. mm SOT0 b (4 ) () L L e 4 e e ( ) () D terminal index area E Dimensions 0 0. mm scale Unit () b D E e e L L mm max nom min Outline version SOT0 0. 0.04 0.0.0 0..00 0. 0.9.0.00 0.9 0. 0. Note. Including plating thickness.. Visible depending upon used manufacturing technology. 0. 0.0 0.7 References 0.40 0. 0. IE JEDE JEIT European projection Issue date 0-04-0 0-04-0 sot0_po Fig 8. Package outline SOT0 (XSON) ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 of 0
4. bbreviations Table. cronym DM MOS DUT ESD HM MM bbreviations Description harged Device Model omplementary Metal-Oxide Semiconductor Device Under Test ElectroStatic Discharge Human ody Model Machine Model. Revision history Table. Revision history Document ID Release date Data sheet status hange notice Supersedes v.4 008 Product data sheet - v. Modifications: Package outline drawing of SOT88 (Figure ) modified. v. 00 Product data sheet - v. v. 0009 Product data sheet - v. v. 00800 Product data sheet - - ll information provided in this document is subject to legal disclaimers. NXP.V. 0. ll rights reserved. Product data sheet Rev. 4 august 0 7 of 0
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8. ontents General description...................... Features and benefits.................... Ordering information..................... 4 Marking................................ Functional diagram...................... Pinning information....................... Pinning................................ Pin description......................... 7 Functional description................... 7. Logic configurations..................... 4 8 Limiting values.......................... 9 Recommended operating conditions........ 0 Static characteristics..................... Dynamic characteristics.................. 8 Waveforms............................ 0 Package outline........................ 4 bbreviations.......................... 7 Revision history........................ 7 Legal information....................... 8. Data sheet status...................... 8. Definitions............................ 8. Disclaimers........................... 8.4 Trademarks........................... 9 7 ontact information..................... 9 8 ontents.............................. 0 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. NXP.V. 0. ll rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: august 0 Document identifier: