6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 1 Lecture 8 PN Junction and MOS Electrostatics (V) Electrostatics of Metal Oide Semiconductor Structure (cont.) Contents: October 4, 25 1. Overview of MOS electrostatics under bias 2. Depletion regime 3. Flatband 4. Accumulation regime 5. Threshold 6. Inversion regime Reading assignment: Howe and Sodini, Ch. 3, 3.8 3.9 Announcements: Quiz 1: 1/13, 7:3 9:3 PM, (lectures #19); open book; must have calculator.
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 2 Key questions Is there more than one regime of operation of the MOS structure under bias? What does carrier inversion mean and what is the big deal about it? How does the carrier inversion charge depend on the gate voltage?
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 3 1. Overview of MOS electrostatics under bias VGB "metal" (n polysi) contact oide semiconductor (p type) contact to Application of bias: built in potential across MOS structure increases from φ B to φ B V GB oide forbids current flow J = everywhere in semiconductor need drift= diffusion in SCR must maintain boundary condition at Si/SiO 2 interface: E o /E s 3 How can this be accommo dated simultaneously? quasi equilibrium situation with potential build up across MOS equal to φ B V GB
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 4 Important consequence of quasi equilibrium: Boltzmann relations apply in semiconductor [they were derived starting from J e = J h =] and n() = n i e qφ()/kt p() = n i e qφ()/kt np = 2 n i at every [not the case in p n junction or BJT under bias]
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 5 2. Depletion regime For V GB > gate attracts electrons, repels holes depletion region widens For V GB < gate repels electrons, attracts holes depletion region shrinks ρ to d(vgb) q E Eo Es to d(vgb) φ VGB< VGB= VGB> φ BVGB φ B to d(vgb) log p, n p to n d(vgb) ni 2
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 6 In depletion regime, all results obtained for zero bias apply if φ B φ B V GB. For eample: depletion region thickness: ɛ s d (V GB )= [ C o 4(φ B V GB ) 1 1] γ 2 potential drop across semiconductor SCR: V B (V GB )= 2 qn a d (V GB ) 2ɛ s potential drop across oide: V o (V GB )= qn a d (V GB )t o ɛ o
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 7 3. Flatband At a certain negative V GB, depletion region is wiped out Flatband ρ ρ= to E Eo= Es= to φ VGB= VGB=VFB VGB=φ B to log p, n p to n ni 2 Flatband voltage: V FB = φ B
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 8 4. Accumulation regime If V GB <V FB accumulation of holes at Si/SiO 2 interface ρ to E to Es Eo φ to VGBVFB log p, n p n ni 2 to
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 9 5. Threshold Back to V GB >. For sufficiently large V GB >, electrostatics change when n() = N a threshold. Beyond threshold, cannot neglect contributions of electrons towards electrostatics. log p, n n()= p n ni 2 to dma Let s compute the voltage (threshold voltage) that leads to n() = N a. Key assumption: use electrostatics of depletion (neglect electron concentration at threshold).
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 1 Computation of threshold voltage. Three step process: First, compute potential drop in semiconductor at threshold. Start from: Solve for φ() at V GB = V T : n() = n i e qφ()/kt kt n() kt N a φ() VT = ln V T = ln = φ p q ni q φ n i VTφ B φ p t o dma VB=2φ p φ p Hence: V B (V T )= 2φ p
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 11 Second, compute potential drop in oide at threshold. Obtain d (V T ) using relationship between V B and d in depletion: Solve for d (V T ): V B (V T )= 2 qn a d (V T ) 2ɛ s = 2φ p d (V T )= dma = 2ɛ s ( 2φ p ) qn a Then: V o (V T )= E o (V T )t o = qn a d (V T ) t o = γ 2φ p ɛ o φ Vo VTφ B φ p t o dma VB=2φ p φ p
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 12 Finally, sum potential drops across structure. φ Vo VTφ B φ p t o dma VB=2φ p φ p V T φ B = V B (V T ) V o (V T )= 2φ p γ 2φ p Solve for V T : V T = V FB 2φ p γ 2φ p Key dependencies: If N a V T. The higher the doping level, the more voltage required to produce n() = N a. If C o (t o ) V T. The thinner the oide, the less voltage dropped across it.
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 13 6. Inversion What happens for V GB >V T? More electrons at Si/SiO 2 interface than acceptors inversion. log p, n inversion layer n p ni 2 to dma Electron concentration at Si/SiO 2 interface modulated by V GB V GB n() Q n field effect control of mobile charge! [essence of MOSFET] Want to compute Q n vs. V GB [charge control relation] Make sheet charge approimation: electron layer at semiconductor surface is much thinner than any other dimension in problem (t o, d ).
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 14 Charge control relation Let us look at overall electrostatics: ρ to dma q Qn E Eo Es to dma φ VGBφ B t o dma log p, n n to dma p ni 2
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 15 Key realization: Q n n() e qφ()/kt Q B φ() Hence, as V GB and φ(), Q B will change very little. Q n will change a lot, but Several consequences: little change in φ() beyond threshold V B does not increase much beyond V B (V T )= 2φ p (a thin sheet of electrons does not contribute much to V B ): V B (inv.) V B (V T )= 2φ p little change in Q B beyond threshold d does not increase much beyond threshold: d (inv.) d (V T )= 2ɛ s ( 2φ p ) qn a = dma
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 16 All etra voltage beyond V T used to increase inversion charge Q n. Think of it as capacitor: top plate: metal gate bottom plate: inversion layer Q = CV Q n = C o (V GB V T ) for V GB >V T Eistence of Q n and control over Q n by V GB key to MOS electronics Qn C o VT VGB
6.12 Microelectronic Devices and Circuits Fall 25 Lecture 8 17 Key conclusions V GB <V FB M O S (ptype) accumulation V GB =V FB flatband V FB <V GB < depletion V GB = zero bias <V GB <VT V GB =VT V GB >VT depletion threshold inversion In inversion: Q n = C o (V GB V T ) for V GB >V T