AZ DISPLAYS,INC. COMPLETE LCD SOLUTIONS SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY PART NUMBER: ATM028AD-DLQ-TFP DATE: SEPT 17, 2008
1 Features This single-display module is suitable for cell phone application. The Main-LCD adopts one backlight with High brightness 4-lamps white LED. (1) Construction: 2.8 a-si color TFT-LCD, White LED Backlight, and FPCB. (2) Main LCD: 2.1 Amorphous-TFT 2.8 inch display, transmissive, Normally white type, 12 o clock. 2.2 240(RGB) 320 dots Matrix,1/320 Duty. 2.3 Main LCD Driver IC: ILI9320. 2.4 Real 262K colors display (18bit Interface mode). (3) Low cross talk by frame rate modulation. (4) Direct data display with display RAM. (5) Partial display function: You can save power by limiting the display space. (6) MPU interface: 8/9/16/18-bit 80-Series, parallel interface and SPI interface. (7) Digital RGB interface: 18bit and 6bit Digital RGB interface. (8) Abundant command functions: Area scroll function Display direction switching function Power saving function Electric volume control function: you are able to program the temperature compensation function. AZ DISPLAYS, INC. PAGE 02 OF 30
2 Mechanical specifications Dimensions and weight Item Specifications Unit External shape dimensions *1 50.2 (W) x 69.2 (H). mm Pixel size 0.18 (W) x 0.18 (H) mm Main LCD Active area 43.2 (W) x 57.6 (H) mm Number of Pixels 240(H)x320(V) pixels mm Weight TBD g *1. This specification is about External shape 3 Absolute max. ratings and environment 3-1 Absolute max. ratings Ta=25 o C GND=0V Item Symbol Min. Max. Unit Remarks Power voltage VCC GND -0.3 +4.6 V Power voltage VCI GND -0.3 +4.6 V Power voltage LED A LED K -0.5 +4.0 V Input voltage VIN -0.5 VDD V 3-2 Environment Item Specifications Remarks Storage temperature Max. +70 Min. -20 Note 1: Non-condensing Operating temperature Max. +60 Min. -10 Note 1: Non-condensing Note 1 Ta +40 Max.85%RH Ta +40 The max. humidity should not exceed the humidity with 40 85%RH. AZ DISPLAYS, INC. PAGE 03 OF 30
4 Electrical specifications 4-1 Electrical characteristics of LCM (V DD =3.0V, Ta=25 o C) Item Symbol Conditions MIN. TYP. MAX. Unit IC power voltage IC power voltage High-level input voltage Low-level input voltage Consumption current of VDD Consumption current of LED 1. 1/320 duty. V cc 2.6 2.8 3.3 V V ci 2.6 2.8 3.3 V IHC 0.8V DD V DD V V ILC 0 0.2V DD V I DD LED OFF - 8 - ma I LED_ON V LED_ON =3.6V - 80 - ma AZ DISPLAYS, INC. PAGE 04 OF 30
4-2 LED back light specification Item Symbol Conditions MIN. TYP. MAX. Unit Forward voltage V f I f =80mA 2.9 3.3 3.6 V Reverse voltage V r - - 12 V Forward current I f 4-chip Parallel 75 80 85 ma Power Consumption P BL I f =80mA - 288 - mw Uniformity (with L/G) - I f =80mA 80%*1 - - Bare LED Luminous intensity Luminous color Chip connection V f I f 3.6V 80mA 3000 - - cd/m 2 White 4 chip parallel connection Bare LED measure position: A 5/6 A 1/6 B 1/2 A 1/6 A B 5/6 B 1/2 B Light source (MAIN LCD) Min( P1 ~ P9) *1 Uniformity (LT): 100 80% Max( P1 ~ P9) AZ DISPLAYS, INC. PAGE 05 OF 30
5 Optical characteristics Main LCD 5.1 Optical characteristics (1/320 Duty in case except as specified elsewhere Ta = 25 C) LED backlight transmissive module: Item Symbol Temp. Min. Std. Max. Unit Conditions Response Tr 25 o C -- 15 25 =0 o, =0 o time Tf 25 o ms C -- 20 30 (Note 2) Contrast ratio CR 25 o =0 o, =0 o LED:ON, LIGHT:OFF C 200 300 - - (Note 4) Transmittance T 25 o C 5.7 6.0 - % NTSC % 25 o C 50 55 Visual angle range front and rear 25 o C ( f) 60 ( b) 60 Degree = 0 o, CR 10 LED:ON LIGHT:OFF (Note 3) Visual angle range left and right 25 o C ( l) 70 ( r) 70 Degree =90 o, CR 10 LED:ON LIGHT:OFF (Note 3) Visual angle direction priority Brightness 225 250 -- 12:00 (Note 5) Cd/ m2 V LED=3.6V, 80mA Full White pattern 5.2 CIE (x, y) chromaticity (1/320 Duty Ta = 25 C) Item Symbol Transmissive Min. Typ. Max. Red X (0.590) (0.620) (0.650) Y (0.310) (0.340) (0.370) Green X (0.303) (0.333) (0.363) Y (0.564) (0.594) (0.624) Blue X (0.132) (0.152) (0.182) Y (0.196) (0.116) (0.146) White X (0.275) (0.305) (0.335) Y (0.294) (0.324) (0.354) ( ) is a default Conditions =0, =0 =0, =0 =0, =0 =0, =0 AZ DISPLAYS, INC. PAGE 06 OF 30
NOTE 1: Optical characteristic measurement system Ring light LCD module Brightness gauge BM-7 (Topcon) Glass fiber LED:OFF, LIGHT:ON Metal halide lamp LCD Optical Detector Brightness gauge BM-7 (Topcon) LED LED:ON, LIGHT:OFF NOTE 2: Response tome definition AZ DISPLAYS, INC. PAGE 07 OF 30
NOTE 3: definition NOTE 4: Contrast definition NOTE 5: Visual angle direction priority 12 : 00 9 : 00 8 8 8 8 3 : 00 6 : 00 AZ DISPLAYS, INC. PAGE 08 OF 30
6 Block Diagram Block diagram (Main LCD) Display format: A-Si TFT transmissive, Normally white type, 12 o clock. Display composition: 240 RGB 320 dots LCD Driver: ILI9320 Back light: White LED 4 (I LED =80mA) AZ DISPLAYS, INC. PAGE 09 OF 30
7 Interface specifications Pin No. Terminal Functions 1 2 3 NC No Connection. 4 5 GND GND-terminal. 6 /CS Chip select signal. Fix to GND level when not in use. 7 RS A register select signal. Low: select an index or status register. High: select a control register. Fix to GND level when not in use. 8 WR/SCL A write strobe signal and enables an operation to write data when the signal is low. Fix to VCC level when not in use. SPI Mode: Synchronizing clock signal in SPI mode. 9 RD A read strobe signal and enables an operation to read out data when the signal is low. Fix to VCC level when not in use. 10 SDI Serial bus interface data input pin. Fix to GND level when not in use. 11 SDO Serial bus interface data output pin. Let SDO as open when not in use. 12 DB0/PD0 13 DB1/PD1 14 DB2/PD2 15 DB3/PD3 16 DB4/PD4 17 DB5/PD5 18 DB6/PD6 19 DB7/PD7 20 DB8/PD8 21 DB9/PD9 22 DB10/PD10 23 DB11/PD11 24 DB12/PD12 25 DB13/PD13 26 DB14/PD14 27 DB15/PD15 28 DB16/PD16 29 DB17/PD17 Mode DB Pin in use MCU 18-bit DB [17:0] MCU 16-bit DB [17:10], DB[8:1] MCU 9-bit DB [17:9] MCU 8-bit DB [17:10] SDI, SDO/ PD [17:0] Serial Mode/Digital RGB Interface R[5:0]=PD[5:0] Mode G[5:0]=PD[11:6] B[5:0]=PD[17:12] AZ DISPLAYS, INC. PAGE 10 OF 30
30 /RESET A Reset pin. 31 ENABLE A data ENABLE signal in RGB I/F mode. Fix to GND level when not in use. 32 DOTCLK Dot clock signal in RGB I/F mode. Fix to GND level when not in use. 33 HSYNC Frame synchronizing signal in RGB I/F mode. Fix to GND level when not in use. 34 VSYNC Frame synchronizing signal in RGB I/F mode. Fix to GND level when not in use. 35 VCC 36 VCC A supply voltage to the internal logic: VCC = 2.4~3.3V. 37 VCI A supply voltage to the analog circuit. Connect to an external power supply of 2.5 ~ 3.3V. 38 GND GND-terminal. 39 LED_A LED Anode. 40 LED_K1 41 LED_K2 42 LED_K3 LED Cathode. 43 LED_K4 44 GND GND-terminal Selection the System Interface mode Mode IM3 IM2 IM1 IM0 (JP3 (JP2 (JP1 (JP0 MCU-18Bit H L H L MCU-16 Bit L L H L MCU-9 Bit H L H H MCU-8 Bit L L H H *Serial Mode/Digital RGB Interface Mode L H L L *Jumper Default: JP1= L JP2= L JP3= H JP4= L AZ DISPLAYS, INC. PAGE 11 OF 30
8 System interface and RGB interface 8.1 80-system 18-bit interface AZ DISPLAYS, INC. PAGE 12 OF 30
8.2 80-system 16-bit interface AZ DISPLAYS, INC. PAGE 13 OF 30
8.3 80-system 9-bit interface AZ DISPLAYS, INC. PAGE 14 OF 30
8.4 80-system 8-bit interface AZ DISPLAYS, INC. PAGE 15 OF 30
8.5 RGB interface AZ DISPLAYS, INC. PAGE 16 OF 30
8.6 Serial Peripheral Interface (SPI) The Serial Peripheral Interface (SPI) is selected by setting the IM[3:0] pins (in FPC side) as 010x level. The chip select pin (ncs), the serial transfer clock pin (SCL), the serial data input pin (SDI) and the serial data output pin (SDO)are used in SPI mode. The ID pin sets the least significant bit of the identification code. The DB[17:0] pins, which are not used, must be tied to DGND. The SPI interface operation enables from the falling edge of ncs and ends of data transfer on the rising edgeof ncs. The start byte is transferred to start the SPI interface and the read/write operation and RS information are also included in the start byte. When the start byte is matched, the subsequent data is received by ILI9320. The seventh bit of start byte is RS bit. When RS = 0, either index write operation or status read operation is executed. When RS = 1, either register write operation or RAM read/write operation is executed. The eighth bit of the start byte is used to select either read or write operation (R/W bit). Data is written when the R/W bit is 0 and read back when the R/W bit is 1. After receiving the start byte, ILI9320 starts to transfer or receive the data in unit of byte and the data transfer starts from the MSB bit. All the registers of the ILI9320 are 16-bit format and receive the first and the second byte data as the upper and the lower eight bits of the 16-bit register respectively. In SPI mode, 5 bytes dummy read is necessary and the valid data starts from 6th byte of read back data. AZ DISPLAYS, INC. PAGE 17 OF 30
AZ DISPLAYS, INC. PAGE 17 OF 30
8.7 Timing of System Interface and RGB Interface a. System Interface AZ DISPLAYS, INC. PAGE 19 OF 30
b. RGB Interface AZ DISPLAYS, INC. PAGE 20 OF 30
9 INSTRUCTION DESCRIPTIONS 9.1 Instruction List No. IR Main LCD Driver IC: ILI9320 Registers Name Index Register R/W RS D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 W 0 - - - - - - - - ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0 SR Status Read R 0 L7 L6 L5 L4 L3 L2 L1 L0 0 0 0 0 0 0 0 0 00h 00h 01h 02h Driver Code Read Start Oscillation Driver Output Control 1 LCD Driving Control R 1 1 0 0 1 0 0 1 0 0 0 1 0 0 0 1 0 W 1 - - - - - - - - - - - - - OSC W 1 0 0 0 0 0 SM 0 SS 0 0 0 0 0 0 0 0 W 1 0 0 0 0 0 1 B/C EOR 0 0 0 0 0 0 0 0 03h Entry Mode W 1 TRI DFM 0 BGR 0 0 HWM 0 ORG 0 I/D1 I/D0 AM 0 0 0 04h 07h 08h 09h 0Ah 0Ch 0Dh 0Fh 10h 11h 12h 13h 20h 21h 22h 29h 2Bh 30h 31h 32h 35h Resize Control W 1 0 0 0 0 0 0 RCV 1 RCV 0 0 0 RCH 1 RCH 0 0 0 RSZ1 RSZ0 Display PTD PTD BAS Control 1 W 1 0 0 E1 E0 0 0 0 EE 0 0 GON DTE CL 0 D1 D0 Display Control 2 W 1 0 0 0 0 FP3 FP2 FP1 FP0 0 0 0 0 BP3 BP2 BP1 BP0 Display Control 3 W 1 0 0 0 0 0 PTS2 PTS1 PTS0 0 0 PTG1 PTG0 ISC3 ISC2 ISC1 ISC0 Display FMA Control 4 W 1 0 0 0 0 0 0 0 0 0 0 0 0 RKO FMI2 FMI1 FMI0 E RGB Display Interface W 1 ENC ENC ENC 0 0 0 0 RM 0 0 DM1 DM0 0 0 RIM1 RIM0 Control 1 2 1 0 Frame Maker FMP FMP FMP FMP Position W 1 0 0 0 0 0 0 0 8 7 6 5 RGB Display Interface W 1 0 0 0 0 0 0 0 0 0 0 0 VSPL Control 2 FMP FMP FMP FMP FMP 4 3 2 1 0 HSP 0 DPL EPL L Power Control 1 W 1 0 0 0 SAP BT3 BT2 BT1 BT0 APE AP2 AP1 AP0 0 DST B SLP 0 Power Control 2 W 1 0 0 0 0 0 DC12 DC11 DC10 0 DC02 DC01 DC00 0 VC2 VC1 VC0 Power VCM VRH VRH VRH VRH Control 3 W 1 0 0 0 0 0 0 0 R 0 0 0 PON 3 2 1 0 Power Control 4 W 1 0 0 0 VDV4 VDV3 VDV2 VDV1 VDV0 0 0 0 0 0 0 0 0 Horizontal GRAM W 1 0 0 0 0 0 0 0 0 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 Address Set Vertical GRAM Address Set W 1 0 0 0 0 0 0 0 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 Write Data to GRAM W 1 RAM write data (WD17-0) / read data (RD17-0) bits are transferred via different data bus lines according to the selected interfaces. Power VCM VCM VCM VCM VCM Control 7 W 1 0 0 0 0 0 0 0 0 0 0 0 4 3 2 1 0 Frame Rate and Color W 1 0 0 0 0 0 0 0 0 EXT_ 0 FR_S FR_S 0 0 0 0 Control R EL1 EL0 Gamma KP1[ KP1[ KP1[ KP0[ KP0[ KP0[ Control 1 W 1 0 0 0 0 0 2] 1] 0] 0 0 0 0 0 2] 1] 0] Gamma Control 2 W 1 0 0 0 0 0 KP3[ 2] KP3[ 1] KP3[ 0] 0 0 0 0 0 KP2[ 2] KP2[ 1] KP2[ 0] Gamma KP5[ KP5[ KP5[ KP4[ KP4[ KP4[ Control 3 W 1 0 0 0 0 0 2] 1] 0] 0 0 0 0 0 2] 1] 0] Gamma RP1[ RP1[ RP1[ RP0[ RP0[ RP0[ Control 4 W 1 0 0 0 0 0 2] 1] 0] 0 0 0 0 0 2] 1] 0] AZ DISPLAYS, INC. PAGE 21 OF 30
36h Gamma Control 5 W 1 0 0 0 VRP1 [4] VRP1 [3] VRP1 [2] VRP1 [1] VRP1 [0] 0 0 0 VRP0 [4] VRP0 [3] VRP0 [2] VRP0 [1] VRP0 [0] 37h Gamma Control 6 W 1 0 0 0 0 0 KN1[ 2] KN1[ 1] KN1[ 0] 0 0 0 0 0 KN0[ 2] KN0[ 1] KN0[ 0] No. Registers R/W RS D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 38h 39h 3Ch 3Dh 50h 51h 52h 53h 60h 61h 6Ah 80h 81h 82h 83h 84h 85h 90h 92h 93h 95h 97h 98h Gamma Control 7 Gamma Control 8 Gamma Control 9 Gamma Control 10 Horizontal Address Start Position Horizontal Address End Position Vertical Address Start Position Vertical Address End Position Driver Output Control 2 Base Image Display Control Vertical Scroll Control Partial Image 1 Display Position Partial Image 1 Area (Start Line) Partial Image 1 Area (End Line) Partial Image 2 Display Position Partial Image 2 Area (Start Line) Partial Image 2 Area (End Line) Panel Interface Control 1 Panel Interface Control 2 Panel Interface Control 3 Panel Interface Control 4 Panel Interface Control 5 Panel Interface Control 6 KN3[ KN3[ W 1 0 0 0 0 0 2] 1] KN5[ KN5[ W 1 0 0 0 0 0 2] 1] RN1[ RN1[ W 1 0 0 0 0 0 2] 1] VRN VRN VRN VRN VRN W 1 0 0 0 0 0 0 1[4] 1[3] 1[2] 1[1] 1[0] KN3[ KN2[ KN2[ KN2[ 0 0 0 0 0 0] 2] 1] 0] KN5[ KN4[ KN4[ KN4[ 0 0 0 0 0 0] 2] 1] 0] RN1[ RN0[ RN0[ RN0[ 0 0 0 0 0 0] 2] 1] 0] VRN VRN VRN VRN VRN 0[4] 0[3] 0[2] 0[1] 0[0] W 1 0 0 0 0 0 0 0 0 HSA7 HSA6 HSA5 HSA4 HSA3 HSA2 HSA1 HSA0 W 1 0 0 0 0 0 0 0 0 HEA7 HEA6 HEA5 HEA4 HEA3 HEA2 HEA1 HEA0 W 1 0 0 0 0 0 0 0 VSA8 VSA7 VSA6 VSA5 VSA4 VSA3 VSA2 VSA1 VSA0 W 1 0 0 0 0 0 0 0 VEA8 VEA7 VEA6 VEA5 VEA4 VEA3 VEA2 VEA1 VEA0 SCN SCN SCN SCN SCN W 1 GS 0 NL5 NL4 NL3 NL2 NL1 NL0 0 0 5 4 3 2 1 W 1 0 0 0 0 0 0 0 0 0 0 0 0 0 NDL VLE REV W 1 0 0 0 0 0 0 0 VL8 VL7 VL6 VL5 VL4 VL3 VL2 VL1 VL0 PTD W 1 0 0 0 0 0 0 0 P08 PTSA W 1 0 0 0 0 0 0 0 08 PTEA W 1 0 0 0 0 0 0 0 08 PTD W 1 0 0 0 0 0 0 0 P18 PTSA W 1 0 0 0 0 0 0 0 18 PTEA W 1 0 0 0 0 0 0 0 18 DIVI0 W 1 0 0 0 0 0 0 DIVI1 0 PTD P07 PTD P06 PTD P05 PTSA PTSA PTSA 07 06 05 PTEA PTEA PTEA 07 06 05 PTD PTD PTD P17 P16 P15 PTSA PTSA PTSA 17 16 15 PTEA PTEA PTEA 17 16 15 PTD P04 PTD P03 PTD P02 PTSA PTSA PTSA 04 03 02 PTEA PTEA PTEA 04 03 02 PTD PTD PTD P14 P13 P12 PTSA PTSA PTSA 14 13 12 PTEA PTEA PTEA 14 13 12 RTNI RTNI 0 0 0 0 3 2 SCN 0 PTD P01 PTD P00 PTSA PTSA 01 00 PTEA PTEA 01 00 PTD PTD P11 P10 PTSA PTSA 11 10 PTEA PTEA 11 10 RTNI RTNI 1 0 NOW NOW NOW W 1 0 0 0 0 0 0 0 0 0 0 0 0 0 I2 I1 I0 MCPI MCPI MCPI W 1 0 0 0 0 0 0 0 0 0 0 0 0 0 2 1 0 DIVE DIVE RTN RTN RTN W 1 0 0 0 0 0 0 0 0 1 0 E5 E4 E3 RTN RTN RTN E2 E1 E0 NOW NOW NOW NOW W 1 0 0 0 0 0 0 0 0 0 0 0 0 E3 E2 E1 E0 MCP MCP W 1 0 0 0 0 0 0 0 0 0 0 0 0 0 E2 E1 AZ DISPLAYS, INC. PAGE 22 OF 30
10 Application 10.1 Display ON / OFF AZ DISPLAYS, INC. PAGE 23 OF 30
10.2 Deep Standby and Sleep Mode AZ DISPLAYS, INC. PAGE 24 OF 30
10.3 Power Supply Configuration AZ DISPLAYS, INC. PAGE 25 OF 30
11 Timing Characteristics 11.1 Clock Characteristics 11.2 AC Characteristics ( i80 system Interface Timing Characteristics ) AZ DISPLAYS, INC. PAGE 26 OF 30
11.3 AC Characteristics ( RGB Interface Timing Characteristics ) AZ DISPLAYS, INC. PAGE 27 OF 30
11.4 AC Characteristics (SPI Interface Timing Characteristics ) AZ DISPLAYS, INC. PAGE 28 OF 30
12.6 RELIABILITY Test Item Test Conditions Note High Temperature Operation 70 3 C, t=96 hrs Low Temperature Operation -20 3 C, t=96 hrs High Temperature Storage 80 3 C, t=96 hrs 1,2 Low Temperature Storage -30 3 C, t=96 hrs 1,2 Humidity Test 40 C, Humidity 90%, 96 hrs 1,2 Thermal Shock Test Vibration Test (Packing) Static Electricity -30 C ~ 25 C ~ 70 C 30 min. 5 min. 30 min. ( 1 cycle ) Total 5 cycle Sweep frequency 10~55~10 Hz/1min Amplitude : 0.75mm Test direction : X.Y.Z/3 axis Duration : 30min/each axis 150pF 330 ohm +8kV, 10times air discharge Note 1 : Condensation of water is not permitted on the module. Note 2 : The module should be inspected after 1 hour storage in normal conditions (15-35 C, 45-65%RH). Definitions of life end point : Current drain should be smaller than the specific value. Function of the module should be maintained. Appearance and display quality should not have degraded noticeably. Contrast ratio should be greater than 50% of the initial value. 1,2 2 AZ DISPLAYS, INC. PAGE 29 OF 30
12. MECHANIC DRAWING AZ DISPLAYS, INC. ATM028AD-DLQ-TFP AZ DISPLAYS, INC. PAGE 30 OF 30