OptiMOS -P2 Power-Transistor

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BSS84P. SIPMOS Small-Signal-Transistor Feature P-Channel Enhancement mode Logic Level Avalanche rated dv/dt rated. Class 0

not recommended for new designs

CoolMOS TM Power Transistor

CoolMOS TM Power Transistor

SPP08P06P H. SIPMOS Power-Transistor V DS -60 V I D T C = 25 C T C = 100 C. I D puls E AS I D = -8.8 A, V DD = -25 V, R GS = 25 W

BSS 223PW. ESD Class; JESD22-A114-HBM Class 0. Product Summary V DS -20 V R DS(on) 1.2 Ω I D A. Qualified according to AEC Q101

Transcription:

Type IPD5P4P4-13 OptiMOS -P2 Power-Transistor Package Marking Features P-channel - Normal Level - Enhancement mode AEC qualified MSL1 up to 26 C peak reflow Product Summary V DS -4 V R DS(on) 12.6 mw I D -5 A PG-TO252-3-313 175 C operating temperature Green package (RoHS compliant) 1% Avalanche tested Type Package Marking IPD5P4P4-13 PG-TO252-3-313 4P413 Maximum ratings, at T j =25 C, unless otherwise specified Parameter Symbol Conditions Value Unit Continuous drain current 1) I D T C =25 C, V GS =-1V -5 A T C =1 C, V GS =-1V 2) -45 Pulsed drain current 2) I D,pulse T C =25 C -2 Avalanche energy, single pulse 2) E AS I D =-25A 18 mj Avalanche current, single pulse I AS - -5 A Gate source voltage V GS - ±2 V Power dissipation P tot T C =25 C 58 W Operating and storage temperature T j, T stg - -55... +175 C IEC climatic category; DIN IEC 68-1 - - 55/175/56 Rev. 1. page 1 211-3-14

Parameter Symbol Conditions Values Unit min. typ. max. Thermal characteristics 2) Thermal resistance, junction - case R thjc - - - 2.6 K/W SMD version, device on PCB R thja minimal footprint - - 62 6 cm 2 cooling area 3) - - 4 Electrical characteristics, at T j =25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS =V, I D = -1mA -4 - - V Gate threshold voltage V GS(th) V DS =V GS, I D =-85µA -2. -3. -4. Zero gate voltage drain current I DSS V DS =-32V, V GS =V, T j =25 C - -.5-1 µa V DS =-32V, V GS =V, T j =125 C 2) - -2-2 Gate-source leakage current I GSS V GS =-2V, V DS =V - - -1 na Drain-source on-state resistance R DS(on) V GS =-1V, I D =-5A - 9.2 12.6 mw Rev. 1. page 2 211-3-14

Parameter Symbol Conditions Values Unit min. typ. max. Dynamic characteristics 2) Input capacitance C iss - 282 367 pf Output capacitance C oss V GS =V, V DS =-25V, f =1MHz - 1 15 Reverse transfer capacitance C rss - 3 6 Turn-on delay time t d(on) - 17 - ns Rise time t r V DD =-2V, V GS =-1V, I D =-5A, - 1 - Turn-off delay time t d(off) R G =3.5W - 22 - Fall time t f - 28 - Gate Charge Characteristics 2) Gate to source charge Q gs - 14 19 nc Gate to drain charge Q gd V DD =-32V, I D =-5A, - 7 14 Gate charge total Q g V GS = to -1V - 39 51 Gate plateau voltage V plateau - 5.4 - V Reverse Diode Diode continous forward current 2) I S T C =25 C - - -5 A Diode pulse current 2) I S,pulse - - -2 Diode forward voltage V SD V GS =V, I F =-5A, T j =25 C - -1-1.3 V Reverse recovery time 2) t rr V R =-2V, I F =-5A, - 39 - ns Reverse recovery charge 2) Q rr di F /dt =-1A/µs - 32 - nc 1) Current is limited by bondwire; with an R thjc = 2.6K/W the chip is able to carry -55A at 25 C. 2) Defined by design. Not subject to production test. 3) Device on 4 mm x 4 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 7 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1. page 3 211-3-14

1 Power dissipation 2 Drain current P tot = f(t C ); V GS -6V I D = f(t C ); V GS = -1V 8 6 6 4 P tot [W] 4 2 2 5 1 15 2 5 1 15 2 T C [ C] T C [ C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(v DS ); T C = 25 C; D = Z thjc = f(t p ) parameter: t p parameter: D =t p /T 1 1 1 1 µs 1 ms 1 µs.5 1 1 Z thjc [K/W] 1-1.1.1.5 1-2 single pulse 1.1 1 1 1 -V DS [V] 1-3 1-6 1-5 1-4 1-3 t p [s] 1-2 1-1 1 Rev. 1. page 4 211-3-14

5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(v DS ); T j = 25 C R DS(on) = (I D ); T j = 25 C parameter: -V GS parameter: -V GS 28 1V 8V 4 5V 5V 6V 35 21 7V 3 14 R DS(on) [mw] 25 2 6V 6V 7 15 7V 5V 1 8V 1V 1 2 3 4 5 6 -V DS [V] 5 25 5 7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance I D = f(v GS ); V DS = -6V R DS(on) = f(t j ); I D = -5 A; V GS = -1 V parameter: T j 28 2 19 21 18 17 14 R DS(on) [mw] 16 15 14 13 7 12 175 C 25 C -55 C 2 3 4 5 6 7 8 -V GS [V] 11 1-6 -2 2 6 1 14 18 T j [ C] Rev. 1. page 5 211-3-14

9 Typ. gate threshold voltage 1 Typ. capacitances V GS(th) = f(t j ); V GS = V DS C = f(v DS ); V GS = V; f = 1 MHz parameter: -I D 4 1 5 3.5 1 4 3 85µA Ciss -V GS(th) [V] 2.5 85µA C [pf] 1 3 Coss 2 1 2 1.5 Crss 1-6 -2 2 6 1 14 18 T j [ C] 1 1 5 1 15 2 25 3 -V DS [V] 11 Typical forward diode characteristicis 12 Drain-source breakdown voltage IF = f(v SD ) V BR(DSS) = f(t j ); I D = -1 ma parameter: T j 1 3 45 44 43 1 2 42 -I F [A] 1 1 175 C25 C -V BR(DSS) [V] 41 4 39 38 37 36 1.4.8 1.2 1.6 35-6 -2 2 6 1 14 18 -V SD [V] T j [ C] Rev. 1. page 6 211-3-14

13 Typ. gate charge 14 Gate charge waveforms V GS = f(q gate ); I D = -5 A pulsed parameter: V DD 12 1-8V -32V V GS Q g 8 -V GS [V] 6 4 2 Q gate Q gs Q gd 1 2 3 4 5 6 Q gate [nc] Rev. 1. page 7 211-3-14

Published by Infineon Technologies AG 81726 Munich, Germany Infineon Technologies AG 211 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1. page 8 211-3-14

Revision History Version Date Changes.1.2 29.1.21 Initial Target Data Sheet 1.12.21 Preliminary Data Sheet 1. 14.3.211 Final Data Sheet Rev. 1. page 9 211-3-14