FEATURES SYMBOL QUICK REFERENCE DATA

FEATURES SYMBOL QUICK REFERENCE DATA Trench technology Low on-state resistance Fast switching d g s V DSS = 2 V I D = 7.6 A R DS(ON) 23 mω GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic full pack envelope using trench technology. The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications. The PHX4NQ2T is supplied in the SOT86A (FPAK) conventional leaded package. PINNING SOT86A (FPAK) SOT86 (FPAK) PIN gate DESCRIPTION case case 2 drain 3 source case isolated 2 3 2 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 34) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V DSS Drain-source voltage T j = 25 C to 5 C - 2 V V DGR Drain-gate voltage T j = 25 C to 5 C; R GS = 2 kω - 2 V V GS Gate-source voltage - ± 2 V I D Continuous drain current T hs = 25 C; V GS = V - 7.6 A T hs = C; V GS = V - 4.8 A I DM Pulsed drain current T hs = 25 C - 3 A P D Total power dissipation T hs = 25 C - 3 W T j, T stg Operating junction and - 55 5 C storage temperature November 2 Rev.

AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 34) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT E AS Non-repetitive avalanche Unclamped inductive load, I AS = 4 A; - 7 mj energy t p = 38 µs; T j prior to avalanche = 25 C; V DD 25 V; R GS = 5 Ω; V GS = V; refer to fig 5 I AS Peak non-repetitive - 4 A avalanche current THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT R th j-hs Thermal resistance junction - - 4.7 K/W to mounting base R th j-a Thermal resistance junction SOT86A package, in free air - 55 - K/W to ambient ELECTRICAL CHARACTERISTICS T j = 25 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V (BR)DSS Drain-source breakdown V GS = V; I D =.25 ma; 2 - - V voltage T j = -55 C 78 - - V V GS(TO) Gate threshold voltage V DS = V GS ; I D = ma 2 3 4 V T j = 5 C - - V T j = -55 C - - 6 V R DS(ON) Drain-source on-state V GS = V; I D = 7 A - 5 23 mω resistance V GS = V; I D = 7 A; T j = 5 C - - 54 mω g fs Forward transconductance V DS = 25 V; I D = 7 A 6 2. - S I GSS Gate source leakage current V GS = ± V; V DS = V - na I DSS Zero gate voltage drain V DS = 2 V; V GS = V -.5 µa current T j = 5 C - - 5 µa Q g(tot) Total gate charge I D = 4 A; V DD = 6 V; V GS = V - 38 - nc Q gs Gate-source charge - 4 - nc Q gd Gate-drain (Miller) charge - 3.3 - nc t d on Turn-on delay time V DD = V; R D = Ω; - 25 - ns t r Turn-on rise time V GS = V; R G = 5.6 Ω - 4 - ns t d off Turn-off delay time Resistive load - 83 - ns t f Turn-off fall time - 3 - ns L d Internal drain inductance Measured from drain lead to centre of die - 4.5 - nh L s Internal source inductance Measured from source lead to source - 7.5 - nh bond pad C iss Input capacitance V GS = V; V DS = 25 V; f = MHz - 5 - pf C oss Output capacitance - 28 - pf C rss Feedback capacitance - 6 - pf November 2 2 Rev.

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS T j = 25 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT I S Continuous source current - - 4 A (body diode) I SM Pulsed source current (body - - 56 A diode) V SD Diode forward voltage I F = 4 A; V GS = V -..5 V t rr Reverse recovery time I F = 4 A; -di F /dt = A/µs; - 35 - ns Q rr Reverse recovery charge V GS = V; V R = 3 V - 69 - nc ISOLATION LIMITING VALUE & CHARACTERISTIC T hs = 25 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V isol R.M.S. isolation voltage from all SOT86A package; f = 5-6 Hz; - 25 V three terminals to external sinusoidal waveform; R.H. 65%; heatsink clean and dustfree V isol Repetitive peak voltage from all SOT86 package; R.H. 65%; - 5 V three terminals to external clean and dustfree heatsink C isol Capacitance from pin 2 to f = MHz - - pf external heatsink November 2 3 Rev.

2 9 8 7 6 5 4 3 2 PD% Normalised Power Derating with heatsink compound 2 4 6 8 2 4 Ths / C Fig.. Normalised power dissipation. PD% = P D /P D 25 C = f(t mb ). Transient thermal impedance, Zth j-a (K/W) D =.5.2..5.2 single pulse. E-6 E-5 E-4 E-3 E-2 Pulse width, tp (s) E- E+ E+ Fig.4. Transient thermal impedance. Z th j-mb = f(t); parameter D = t p /T 2 9 8 7 6 5 4 3 2 ID% Normalised Current Derating with heatsink compound 2 4 6 8 2 4 Ths / C Fig.2. Normalised continuous drain current. ID% = I D /I D 25 C = f(t mb ); conditions: V GS V 3 25 2 5 5 Drain Current, ID (A) 5V V 6.5V VGS=4.5 2 3 4 5 6 7 8 9 Drain-Source Voltage, VDS (V) Fig.5. Typical output characteristics, T j = 25 C. I D = f(v DS ); parameter V GS 6 V 5.5 5 V Peak Pulsed Drain Current, IDM (A).8 Drain-Source On Resistance, RDS(on) (Ohms) RDS(on) = VDS/ ID D.C. tp = us us ms ms.7.6.5.4.3.2 4.5V 5V 5.5V 6V V 6.5V VGS =2 V ms.. Drain-Source Voltage, VDS (V) 2 Drain Current, ID (A) Fig.3. Safe operating area. T mb = 25 C I D & I DM = f(v DS ); I DM single pulse; parameter t p Fig.6. Typical on-state resistance, T j = 25 C. R DS(ON) = f(i D ); parameter V GS November 2 4 Rev.

28 24 2 6 2 8 4 Drain current, ID (A) 5 C Tj = 25 C 2 4 6 8 Gate-source voltage, VGS (V) Fig.7. Typical transfer characteristics. I D = f(v GS ) ; conditions: V DS = 25 V; parameter T j 5 4.5 4 3.5 3 2.5 2.5.5 VGS(TO) / V max typ min - -5 Tj / C 5 5 Fig.. Gate threshold voltage. V GS(TO) = f(t j ); conditions: I D = ma; V DS = V GS 2 Transconductance, gfs (S) E- Sub-Threshold Conduction 5 E-2 E-3 2% typ 98% E-4 5 E-5 4 8 2 6 2 24 28 ID / (A) Fig.8. Typical transconductance, T j = 25 C. g fs = f(i D ); conditions: V DS = 25 V E-6 2 3 4 5 Fig.. Sub-threshold drain current. I D = f(v GS) ; conditions: T j = 25 C; V DS = V GS 2.5 a Rds(on) normalised to 25 deg C Capacitances, Ciss, Coss, Crss (pf) Ciss 2.5 Coss Crss.5-7 -2 3 8 3 Ths / deg C Fig.9. Normalised drain-source on-state resistance. a = R DS(ON) /R DS(ON)25 C = f(t j ); I D = 7 A; V GS = V 2 3 4 Drain-Source Voltage, VDS (V) Fig.2. Typical capacitances, C iss, C oss, C rss. C = f(v DS ); conditions: V GS = V; f = MHz November 2 5 Rev.

4 Gate-source voltage, VGS (V) Maximum Avalanche Current, I AS (A) 2 VDD = 4 V 25 C 8 6 4 VDD = 6 V Tj prior to avalanche = 5 C 2 2 3 4 Gate charge, QG (nc) Fig.3. Typical turn-on gate-charge characteristics. V GS = f(q G ); conditions: I D = 4 A; parameter V DS.... Avalanche time, t AV (ms) Fig.5. Maximum permissible non-repetitive avalanche current (I AS ) versus avalanche time (t AV ); unclamped inductive load 3 Source-Drain Diode Current, IF (A) VGS = V 2 5 C Tj = 25 C..2.4.6.8..2.4 Source-Drain Voltage, VSDS (V) Fig.4. Typical reverse diode current. I F = f(v SDS ); conditions: V GS = V; parameter T j November 2 6 Rev.

MECHANICAL DATA Dimensions in mm Net Mass: 2 g Plastic single-ended package; isolated heatsink mounted; mounting hole; 3 lead TO-22 SOT86A E P A A q D T D j L 2 b L K Q L b 2 2 3 b w M c e e 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A mm 4.6 4. A 2.9 2.5 b.9.7 () b b c D D e L L 2 E e j K L 2 P Q q max...4.7 5.8 6.5.3 2.7.6 4.4 3.3 3.2 2.6 3. 5.8 3.9.2 2.54.4 5.2 6.3 9.7 2.3.4 3.5 2.79 3. 2.3 2.6 Notes. Terminal dimensions within this zone are uncontrolled. Terminals in this zone are not tinned. 2. Both recesses are 2.5.8 max. depth T (2) w 2.5.4 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE SOT86A TO-22 97-6- Fig.6. SOT86A; The seating plane is electrically isolated from all terminals. Notes. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for F-pack envelopes. 3. Epoxy meets UL94 V at /8". November 2 7 Rev.

MECHANICAL DATA Dimensions in mm Net Mass: 2 g Plastic single-ended package; isolated heatsink mounted; mounting hole; 3 lead TO-22 exposed tabs SOT86 E E P m A A q D D L L b Q L 2 2 3 b w M c e e 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A b b c D D E E e e L L () L 2 m P Q q w mm 4.4 4. 2.9 2.5.9.7.5.3.55.38 7. 6.4 Note. Terminal dimensions within this zone are uncontrolled. Terminals in this zone are not tinned. 7.9 7.5.2 9.6 5.7 5.3 2.54 5.8 4.3 3.5 4.8 4..9 3.2.4 4.4.2.4.5 3. 4. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE SOT86 TO-22 97-6- Fig.7. SOT86; The seating plane is electrically isolated from all terminals. Notes. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for F-pack envelopes. 3. Epoxy meets UL94 V at /8". November 2 8 Rev.

DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 34). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 2 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. November 2 9 Rev.