CD74HCT4543 BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER

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4.-V to.-v V CC Opration s for BCD Cod Storag Blanking Capability Phas for Complmnting s Fanout (Ovr Tmpratur Rang) Standard s 0 LSTTL Loads Baland Propagation Dlay and Transition Tims Signifiant Powr Rdution, Compard to LSTTL Logi ICs Dirt LSTTL Logi Compatibility, V IL = 0.8 V Maximum, V IH = 2 V Minimum CMOS Compatibility, I I µa at V OL, V OH BCD s D2 D D D0 E PACKAGE (TOP VIEW) 2 4 6 8 6 4 2 0 9 DISPLAY V CC f g d b a -Sgmnt s 0 2 4 6 8 9 a f g b d dsription/ordring information Th CD4HCT44 high-spd silion-gat is a BCD-to- sgmnt lath/dodr/drivr dsignd primarily for dirtly driving liquid-rystal displays. Whil th lath nabl () is low, th laths ar nabld to stor th BCD inputs. Whn th lath nabl is high, th laths ar disabld, making th outputs transparnt to th BCD inputs. Th dvi has an ativ-high blanking input () and a phas input () to whih a squar wav is applid for liquid-rystal appliations. This squar wav also is applid to th bakplan of th liquid-rystal display. TA ORDERING INFORMATION PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING C to 2 C PDIP E Tub CD4HCT44E CD4HCT44E Pakag drawings, standard paking quantitis, thrmal data, symbolization, and PCB dsign guidlins ar availabl at www.ti.om/s/pakag. Plas b awar that an important noti onrning availability, standard warranty, and us in ritial appliations of Txas Instrumnts smiondutor produts and dislaimrs thrto appars at th nd of this data sht. PRODUCTION DATA information is urrnt as of publiation dat. Produts onform to spifiations pr th trms of Txas Instrumnts standard warranty. Prodution prossing dos not nssarily inlud tsting of all paramtrs. Copyright 200, Txas Instrumnts Inorporatd POST OFFICE BOX 60 DALLAS, TEXAS 26

funtional diagram FUNCTION TABLE D D2 D D0 a b d f g Display X H L X X X X L L L L L L L Blank H L L L L L L H H H H H H L 0 H L L L L L H L H H L L L L H L L L L H L H H L H H L H 2 H L L L L H H H H H H L L H H L L L H L L L H H L L H H 4 H L L L H L H H L H H L H H H L L L H H L H L H H H H H 6 H L L L H H H H H H L L L L H L L H L L L H H H H H H H 8 H L L H L L H H H L H L H H 9 H L L H L H L L L L L L L L Blank H L L H L H H L L L L L L L Blank H L L H H L L L L L L L L L Blank H L L H H L H L L L L L L L Blank H L L H H H L L L L L L L L Blank H L L H H H H L L L L L L L Blank L L L X X X X As abov H As abov Invrs of abov As abov Dpnds on BCD od prviously applid whn = high. BCD s D0 D D2 D 2 4 = 8 = 6 Dodr 6 Drivr 9 0 2 4 a b d f g -Sgmnt s 2 POST OFFICE BOX 60 DALLAS, TEXAS 26

logi diagram 9 a D0 D0 Q0 0 b Q0 D D Q 2 D2 Q D2 Q2 Q2 Dn Dn 2 d P n P n 4 D D Q Q f 6 4 g POST OFFICE BOX 60 DALLAS, TEXAS 26

absolut maximum ratings ovr oprating fr-air tmpratur (unlss othrwis notd) Supply voltag rang, V CC.......................................................... 0. V to V diod urrnt, I IK (V I < 0. V or V I > V CC + 0. V) ) (s Not )........................ ±20 ma diod urrnt, I OK (V O < 0. V or V O > V CC + 0.V) (s Not )...................... ±20 ma Continuous output sour or sink urrnt pr output, I O (V O = 0 to V CC )....................... ±2 ma Continuous urrnt through V CC or................................................... ±0 ma Pakag thrmal impdan, θ JA (s Not 2)............................................. 6 C/W At distan /6 ± /2 in. (.9 ± 0.9 mm) from as for 0 s maximum..................... 26 C Unit insrtd into a PC board (min. thiknss /6 in.,.9 mm) with soldr ontating lad tips only................................................... 00 C Storag tmpratur, T stg........................................................... 6 to 0 C Strsss byond thos listd undr absolut maximum ratings may aus prmannt damag to th dvi. Ths ar strss ratings only, and funtional opration of th dvi at ths or any othr onditions byond thos indiatd undr rommndd oprating onditions is not implid. Exposur to absolut-maximum-ratd onditions for xtndd priods may afft dvi rliability. NOTES:. Th input and output voltag ratings may b xdd if th input and output urrnt ratings ar obsrvd. 2. Th pakag thrmal impdan is alulatd in aordan with JESD -. rommndd oprating onditions (s Not ) TA = 2 C TA = C TO 2 C TO 8 C MIN MAX MIN MAX MIN MAX Supply voltag 4.. 4.. 4.. V VIH High-lvl input voltag 2 2 2 V VIL Low-lvl input voltag 0.8 0.8 0.8 V VI voltag V VO voltag V tt transition (ris and fall) tim 00 00 00 ns NOTE : All unusd inputs of th dvi must b hld at or to nsur propr dvi opration. Rfr to th TI appliation rport, Impliations of Slow or Floating CMOS s, litratur numbr SCBA004. ltrial haratristis ovr rommndd oprating fr-air tmpratur rang (unlss othrwis notd) PARAMETER TEST CONDITIONS VI =VIH or VIL VI =VIH or VIL IOH = 20 µa IOH = 4 ma IOL = 20 µa IOL = 4 ma 4V 4. 4V 4. TA = 2 C TA = C TO 2 C TO 8 C MIN TYP MAX MIN MAX MIN MAX 4.4 4.4 4.4.98..84 0. 0. 0. 0.26 0.4 0. II VI = to. V ±0. ± ± µa ICC VI = or 0, IO = 0. V 8 60 80 µa ICC On input at 2. V, Othr inputs at 0 or 4. V to. V 00 60 490 40 µa Ci 0 0 0 pf Additional quisnt supply urrnt pr input pin, TTL inputs high, unit load. For dual-supply systms, thortial worst-as (VI = 2.4 V, =. V) spifiation is.8 ma. V V 4 POST OFFICE BOX 60 DALLAS, TEXAS 26

HCT INPUT LOADING TABLE INPUT LOADS D0, D, D2 D, 0..2. Unit Load is ICC limit spifid in ltrial haratristis tabl,.g., 60 µa maximum at 2 C. timing rquirmnts ovr rommndd oprating fr-air tmpratur rang V CC = 4. V (unlss othrwis notd) (s Figur ) TA = 2 C TA = C TO 2 C TO 8 C MIN MAX MIN MAX MIN MAX tw Puls duration, high 0 ns tsu Stup tim, BCD inputs bfor 2 8 ns th Hold tim, BCD inputs bfor 8 2 0 ns swithing haratristis ovr rommndd oprating fr-air tmpratur rang (unlss othrwis notd) (s Figur 2) PARAMETER tpd FROM TO LOAD (INPUT) (OUTPUT) CAPACITANCE Dn TA = 2 C TA = C TO 2 C TO 8 C MIN TYP MAX MIN MAX MIN MAX CL = 0 pf 4. V 80 20 00 CL = pf V CL = 0 pf 4. V 6 96 CL = pf V 2 CL = 0 pf 4. V 66 99 8 CL = pf V 2 CL = 0 pf 4. V 66 99 8 CL = pf V 2 tt Any CL = 0 pf 4. V 0 6 ns ns oprating haratristis, V CC = V, T A = 2 C PARAMETER TYP Cpd Powr dissipation apaitan 4 pf Cpd is usd to dtrmin th dynami powr onsumption, pr pakag. PD = Cpd 2 fi + CL 2 fo whr: fi = input frquny fo = output frquny CL = output load apaitan = supply voltag POST OFFICE BOX 60 DALLAS, TEXAS 26

PARAMETER MEASUREMENT INFORMATION PARAMETER S S2 From Undr Tst CL (s Not A) Tst Point RL = kω S S2 tpzh tn tpzl tz tdis tplz tpd or tt Closd Closd Closd Closd LOAD CIRCUIT tw PULSE DURATION CLR CLK tr Rfrn Data 0% tsu th 90% 90% tr tf RECOVERY TIME SETUP AND HO AND INPUT RISE AND FALL TIMES In-Phas Out-of-Phas tplh 0% tl 90% 90% 90% tf PROPAGATION DELAY AND OUTPUT TRANSITION TIMES tr tl 0% tf tplh 90% tr Control Wavform (s Not B) Wavform 2 (s Not B) NOTES: A. CL inluds prob and tst-fixtur apaitan. B. Wavform is for an output with intrnal onditions suh that th output is low xpt whn disabld by th output ontrol. Wavform 2 is for an output with intrnal onditions suh that th output is high xpt whn disabld by th output ontrol. C. Phas rlationships btwn wavforms wr hosn arbitrarily. All input pulss ar supplid by gnrators having th following haratristis: PRR MHz, ZO = 0 Ω, tr = 6 ns, tf = 6 ns. D. For lok inputs, fmax is masurd with th input duty yl at 0%. E. Th outputs ar masurd on at a tim with on input transition pr masurmnt. F. tplz and tz ar th sam as tdis. G. tpzl and tpzh ar th sam as tn. H. tplh and tl ar th sam as tpd. tpzl tpzh Figur. Load Ciruit and Voltag Wavforms 90% OUTPUT ENABLE AND DISABLE TIMES tplz tz 6 POST OFFICE BOX 60 DALLAS, TEXAS 26

APPLICATION CIRCUITS Appropriat Voltag HCT44 ÉÉÉÉÉ On of Svn Sgmnts Common Bakplan Squar Wav: to HCT44 Figur 2. Conntion to Liquid-Crystal Display (LCD) Figur. Conntion to Inandsnt Display Appropriat Voltag HCT44 HCT44 To Filamnt Supply or Appropriat Voltag Blow Figur 4. Conntion to Gas-Disharg Display Figur. Conntion to Fluorsnt Display POST OFFICE BOX 60 DALLAS, TEXAS 26