Node-oltage method using irtual current sources technique for secial cases George E. Chatzarakis and Marina D. Tortoreli Electrical and Electronics Engineering Deartments, School of Pedagogical and Technological Education (ASPETE), Athens, Greece E-mail: gea.xatz@asete.gr, geaxatz@otenet.gr Abstract A new technique based on the use of irtual current sources makes any lanar or nonlanar electric circuit solable using the node-oltage method. The node-oltage method is systematized and it is shown how difficulties encountered until now with secial circuit categories can be oercome. Keywords conertible oltage source; node-oltage method; non-conertible oltage source; secial cases; irtual current source DC circuit analysis by the node-oltage method may be alied to circuits in which most of their sources are current sources, or to circuits for which the mesh-current method cannot be alied (i.e. nonlanar circuits). Many introductory electric circuit textbooks 1 9 utilize this method, which is based on a systematic alication of Kirchhoff s current law. The node-oltage method roides a general rocedure for analysing lanar or nonlanar circuits using node oltages as the circuit ariables; it roides a simle and systemic method for circuits that contain only indeendent current sources. Difficulties with this method (from a systematic standardization and edagogical effectieness oint of iew) occur when the circuit also contains deendent sources and when there are oltage sources (indeendent or deendent) that are not transformable to current sources (indeendent or deendent) resectiely. The roblem of non-conertible oltage sources has been tackled in the ast by using suernodes, something that students are not able to easily understand and aly; secifically, generalization and standardization of the roblem to secial cases in electric circuits has not been easy for them. These difficulties are remoed by the method resented by Gottling, 10 who shows how to write node analysis matrix equations for a linear circuit by insection and deries a general matrix solution for the node-oltage ector. This matrix solution has a form similar to Wilson s matrix solution 11 for oerational amlifier circuits, but it is more general as it includes all four tyes of deendent source, o ams, and mutually couled inductances. This aer, in addition to resenting the node-oltage method in a systematic way, soles the roblem of non-conertible oltage sources by introducing the concet of irtual current sources, 3 which, as the Gottling method, also oercomes the aboe mentioned limitations. The term irtual current source means that: a non-conertible oltage source (indeendent or deendent) is substituted by a current source (indeendent or deen-
Virtual current sources for circuit analysis 31 dent resectiely), that has a alue equal to the current through this oltage source and which is unknown. The node-oltage method Analysing lanar or nonlanar circuits in a systematic and standard way using the node-oltage method deends on the kind of sources that exist in the circuit and also on whether the existing oltage sources are conertible or non-conertible. Based on these considerations, the node-oltage method can be examined for four different cases of lanar or nonlanar circuits of n nodes. (a) Planar or nonlanar circuit with indeendent (current or/and oltage) sources but, with all ossibly existing oltage sources conertible. In such a case, the oltage sources are initially transformed to current sources and then in the resulting equialent circuit the following stes are alied: Ste 1: One node of the circuit is defined as the reference node. Desite the fact that this node can be freely chosen, the aim is to choose the node to which most branches are connected, since in this case the resulting equations are simlified. Ste : For the remaining h n - 1 nodes, after numbering them, the node oltages with resect to the reference node are defined. Ste 3: The node equations are written in matrix form as follows: ÈG11 G1 L G1 h È 1 ÈSi1 G 1 G L G h Si M M M M M M ÎGh1 Gh L Ghh Î h ÎSih where: G ii, "i 1,, 3,..., h denotes the self-conductance of the (node) i and is equal to the sum of all conductances at this node. G ij G ji, "i π j, i, j 1,, 3,..., h denotes the mutual conductance of (node) i and (node) j, and is equal to the sum of the conductances directly connecting these nodes. Its sign is always (-). Si j, " j 1,, 3,..., h is the algebraic sum of the alues of all current sources connected to (node) j. The alues of those sources whose current flows towards the node are taken ositie while, in the oosite case, they are taken as negatie. Ste 4: The resulting h h linear system is soled using the Cramer method or the matrix inersion method and the node oltages 1,, 3,..., h are thus known. Ste 5: The oltages of all branches are calculated combining the node oltages and as a consequence the currents of all circuit elements are known. In other words, the solution of the electric circuit is comlete.
3 G. E. Chatzarakis and M. D. Tortoreli Notes The conductance matrix is symmetrical since G ij G ji, "i π j. If the circuit contains a current source in series with a resistance, then this resistance is eliminated during the rocedure for finding the node oltages or a node (with the aroriate numbering) is considered between the source and the resistance. When the resistance is eliminated, one must be careful to consider this resistance in the final calculation of the dissiated ower, otherwise the ower balance will not be alid. To aoid mistakes, it is recommended considering a node between the source and the resistance. Examle a For the circuit of Fig. 1, calculate the currents i x, i y and the oltage x using the nodeoltage method. Next, show that the ower deeloed is equal to the ower dissiated. Solution: The reference node is defined and the remaining nodes are numbered (Fig. ). Then, the corresonding node oltages are also defined. The node equations in matrix form are: ÈG11 G1 G13 È1 ÈSi1 È 005. -005. 0 È1 È -75. G1 G G3 Si fi -0. 05 0. 075-0. 05 1. 5 Î G31 G3 G33 Î 3 Î Si3 Î 0-0. 05 0. 173 Î 3 Î -8. 333 1-84 V fi 13 V -10 V Hence, 3 Fig. 1 Circuit for case a.
Virtual current sources for circuit analysis 33 Fig. Equialent circuit of Fig. 1. i For the ower balance: ( 5A) -( -3) 5-710 W Thus - 40 Ê 10 A ˆ Ë 3 RESIST. - 54. A i - 71. A 0-1 84V 0 1 3 x y x 10 3-33. 333W 3 3 3 1 ( 3 - ) ( - 1) + + + + 1 5 40 0 40 ( 75. A) -( -1) 75. -160 W DELIV. ( 5A) + ( 7. 5A) + Ê 10 363. 333W Ë A 3 ˆ fi DELIV. DISSIP. DISSIP. RESIST. 363. 333W (b) Planar or nonlanar circuit, with indeendent (current or/and oltage) sources but, with at least a oltage source not transformable to current source or for which the transformation is difficult (secial case). In such a case, the following stes are executed: Ste 1: In situations where oltage sources are non-conertible, irtual current sources are considered, with alues equal to the corresonding current alues flowing through the non-conertible oltage sources of the gien circuit. Ste : One node of the circuit is defined as the reference node as in the reious case. Ste 3: The remaining h n - 1 nodes are numbered and the node oltages are defined with resect to the reference node. 363. 333 W
34 G. E. Chatzarakis and M. D. Tortoreli Ste 4: The node equations are written in matrix form as in the reious case. Howeer, in this case irtual current sources are taken together with the non-irtual sources, and included in the terms Si j. Ste 5: For each irtual current source, an equation is introduced in the matrix that describes the corresonding non-conertible oltage source with a linear combination of the unknown node oltages of the roblem, eliminating each time an equation that contains a irtual current. The remaining equations needed for the solution are taken from the initial form of the matrix, as they are (those that do not contain unknown oltages other than the node oltage) or as they result after the aroriate additions or subtractions in order to eliminate the irtual currents aearing initially. By doing so, the new matrix equation no longer reresents Ohm s law, but is simly an algebraically h h equialent system, which can lead to determinations of the node oltages. Ste 6: The resulting h h linear system is soled as in the reious case and so the node oltages are readily aailable. Ste 7: The oltages of all branches are calculated combining the node oltages and as a consequence the currents of all circuit elements are known, excet those flowing through the non-conertible oltage sources (that is the irtual currents). The calculation of these currents is done using the equations that were eliminated from the initial matrix form of the node equations, since the node oltages are already known. In other words, the solution of the electric circuit is comleted. Notes it. A non-conertible oltage source is a source that has no resistance in series with If there is a current source in series with a resistance, the roblem is treated as in the reious case. Examle b For the circuit of Fig. 3, using the node-oltage method show that the ower deeloed is equal to the ower dissiated. Solution: The oltage source of 8 V is transformed to a current source of A in arallel with a resistance of 4W. The oltage source of 10 V is non-conertible, since there is no resistance in series with it. Therefore, a irtual current source is considered at its location (relacing it) with a alue i x equal to the current flowing through the 10 V oltage source of the gien circuit (Fig. 4). Next, defining the reference node and taking into account that the current source of 4 A is in series with the resistance of 8 W (hence a node is ositioned and numbered between them), all nodes are numbered and the corresonding node oltages defined.
Based on the aboe, for the circuit of Fig. 4, the node equations in matrix form are: (1) G G G G G G G G G G G G G G G G i i i i 11 1 13 14 1 3 4 31 3 33 34 41 4 43 44 1 3 4 1 3 4 075 05 0 0 05 1 05 0 0 0 5 0 È Î È Î È Î fi - - - - S S S S......... 65 0 15 0 0 015 0 15 5 4 1 3 4 - - È Î È Î - - È Î i i x x Virtual current sources for circuit analysis 35 Fig. 3 Circuit for case b. Fig. 4 Equialent circuit of Fig. 3.
36 G. E. Chatzarakis and M. D. Tortoreli Substituting the first line of relationshi (1) by the equation 3-1 10 V, which alies to the oltage source of 10 V, leaing the second line as is, and substituting the third line by the fourth line and the fourth line by the sum of the first and third lines, the following algebraically equialent system results: È -1 0 1 0 È1 È10 1 1 V -05. 1-05. 0 5 V fi 0 0-015. 0. 15 3-4 3 V Î075. -1 065. -0. 15 Î4 Î 4-10 V In order to find the current flowing through the non-conertible oltage source, the following is considered: The third line of relationshi (1) gies: i x -0.5 + 0.65 3-0.15 4 4A Hence, ( 10 ) -10 i -40 ( 4A) 4 4-40W RESIST. Therefore, V x W ( 5A) - 5-110 W ( 1 - ) ( - 3) ( 3-4) ( 1-8) + + + 8 4 DELIV. ( 10V) + ( 5A) + ( 4A) 190 W DELIV. DISSIP. RESIST. + V W fi ( 8 ) 190 ( 8V) 1-8 8 8W 4 18 W DISSIP. (c) Planar or nonlanar circuit, with indeendent and deendent (current or/and oltage) sources but, with all oltage sources that ossibly exist in the circuit conertible. In this case, the oltage sources (indeendent, deendent) are initially transformed to current sources (indeendent, deendent resectiely), and then in the resulting equialent circuit the following stes are alied: Ste 1: Ste : Ste 3: Ste 4: Ste 5: Ste 6: One node of the circuit is defined as the reference node as in case (a). The remaining h n - 1 nodes are numbered and the node oltages are defined with resect to the reference node. The node equations are written in matrix form as in case (a). The deendent quantities aearing in the matrix are exressed with resect to the unknown node oltages. Howeer, this imlies that the unknown node oltages aear in the second art of the matrix form of the equations as well. The elements of the equation are rearranged (when needed) so that the unknown node oltages aear only on the left of the equations. The resulting h h linear system is soled as in case (a), and so the node oltages are readily aailable.
Virtual current sources for circuit analysis 37 Ste 7: The oltages of all branches are calculated combining the node oltages and as a consequence the currents of all circuit elements are known. In other words, the solution of the electric circuit is comleted. Notes A deendent oltage source is considered conertible when there is a resistance in series with it and simultaneously the deendent quantity of this or any other deendent source is not located at this series resistance. If something like this were to haen, source transformation would result in the elimination of the deendent quantity and therefore further stes for the roblem solution would be difficult or imossible. An indeendent oltage source is considered conertible when there is a resistance in series with it and simultaneously the deendent quantity of a deendent current or oltage source does not aear at this resistance or at the source (for the same reason as reiously detailed). If there is a current source in series with a resistance, the roblem is treated as in the reious cases. Examle c For the circuit of Fig. 5, using the node-oltage method show that the ower deeloed is equal to the ower dissiated. Solution: Initially, the deendent oltage source is transformed into its corresonding deendent current source. Then, after defining the reference node and after numbering the remaining nodes, the circuit takes the form of Fig. 6. The node equations in matrix form are: ÈG11 G1 G13 È1 ÈSi1 È05. -0. 0 È1 È 5i0 G1 G G3 Si fi -0. 035. -01. 0 Î G31 G3 G33 Î 3 Î Si3 Î 0-0. 1 0. 55 Î 3 Î 3. i0 + 4 È 5 È05. -035. 0 È È 40 1 0 1 156 V 0 fi - - 0. 035. 01. 0 fi 10 V 3. + 4 Î 0-0. 1575 0. 55 Î 3 Î 4 3 78V Î 40 Hence, 96 96 96 - ( V) - 4 ( 11. 5i0 ) - 11. 5i 5 3 0 3-43 W 11. 5i 300. 15 W 0 ( 5i 5i0 1 5 0 ) - - 1-340 W 40
38 G. E. Chatzarakis and M. D. Tortoreli Fig. 5 Circuit for case c. Fig. 6 Equialent circuit of Fig. 5. Thus, RESIST. DELIV. ( 96V) + ( 5i ) 77 W 0 DELIV. DISSIP. REIST. + i W fi ( 11. 5 0 ) 77 (d) Planar or nonlanar circuit with indeendent and deendent (current or/and oltage) sources but, with at least a oltage source (indeendent or deendent) not transformable to current source (indeendent or deendent resectiely) or for which the transformation is difficult (secial case). In such a case, the following stes are alied: Ste 1: For oltage sources that are non-conertible, irtual current sources are considered with alues equal to the corresonding current alues flowing through the non-conertible oltage sources of the gien circuit. Ste : Ste 3: 1 ( 1 - ) ( - 3) ( 96-3) ( 3-11. 5i0) + + + + + 0 5 40 10 4 5 471. 85 W DISSIP. One node of the circuit is defined as the reference node as in case (a). The remaining h n - 1 nodes are numbered and the node oltages are defined with resect to the reference node.
Virtual current sources for circuit analysis 39 Ste 4: The node equations are written in matrix form as in case (a). Howeer, in this case the irtual current sources together with the existing (nonirtual) sources are included in the terms Si j. Ste 5: For each irtual current source, an equation is introduced in the matrix that describes the corresonding non-conertible oltage source with a linear combination of the unknown node oltages of the roblem, eliminating each time an equation that contains a irtual current. The remaining equations needed for the solution are taken from the initial form of the matrix, as they are (those that do not contain unknown oltages other than the node oltage) or as they result after the aroriate additions or subtractions made in order to eliminate the irtual currents aearing initially. By doing so, the new matrix form of the equations no longer reresents Ohm s law, but it is simly an algebraically h h equialent system, which can lead to determination of the node oltages. Ste 6: The deendent quantities aearing in the matrix form are exressed with resect to the unknown node oltages. Howeer, this imlies that the unknown node oltages aear in the second art of the matrix form of the equations. Ste 7: The elements of the equations are rearranged (when needed) so that the unknown node oltages aear only on the left of the equations. Ste 8: The resulting h h linear system is soled as in case (a) and so the node oltages are readily aailable. Ste 9: The oltages of all branches are calculated combining the node oltages and as a consequence the currents of all circuit elements are known, excet those flowing through the non-conertible oltage sources (that is the irtual currents). The calculation of these currents is done using the equations that were eliminated from the initial matrix form of the node equations, since the node oltages are already known. In other words, the solution of the electric circuit is comleted. Notes A deendent oltage source is considered non-conertible when there is no resistance in series with it and when there is, the deendent quantity of this or any other deendent source is located at this series resistance. If source transformation were to haen, it would result in the elimination of the deendent quantity and therefore further stes for the roblem solution would be difficult or imossible. An indeendent oltage source is considered non-conertible when there is no resistance in series with it or when there is, the deendent quantity of a deendent current or oltage source does not aear at this resistance or at the source (for the same reason as reiously detailed). If there is a current source in series with a resistance, the roblem is treated as in the reious case.
40 G. E. Chatzarakis and M. D. Tortoreli Examle d For the circuit of Fig. 7, using the node-oltage method show that the ower deeloed is equal to the ower dissiated. Solution: Since the deendent oltage source of 0.5 j is non-conertible (there is no resistance in series with it), a irtual current source is considered in its osition (relacing it) with a alue i y equal to the current flowing through this oltage source of the gien circuit (Fig. 8). The indeendent oltage source of 10 V, desite the fact that there is a resistance of 0W in series with it, is considered non-conertible, since the deendent quantity of the 0.5 j oltage source is located at this resistance. Therefore, a irtual current source with a alue of i x is considered, located at the 10V source. This alue is equal to the current flowing through this source of the gien circuit. A correctly numbered node is laced between this current source and the resistance 0 W. A roerly numbered node is also laced between the indeendent current source of 1A and the resistance of 10 W. Defining the reference node and numbering the remaining nodes, the circuit takes the form of Fig. 8. The node equations in matrix form are: Fig. 7 Circuit for case d. Fig. 8 Equialent circuit of Fig. 7.
Virtual current sources for circuit analysis 41 ÈG11 G1 G13 G14 G15 È1 ÈSi1 G G G G G 1 3 4 5 Si G31 G3 G33 G34 G35 3 Si3 G41 G4 G43 G44 G45 4 Si4 Î G51 G5 G53 G54 G55 Î 5 ÎS i5 È 005. -005. 0 0 0 È1 È ix -005. 005. 0 0 0-15. fi 0 0 0. 1 0 0 3 1 0 0 0 0. 067-0. 067 4 05. + iy Î 0 0 0-0067. 0. 67 Î 5 Î 3i j Substituting the first line of relationshi () by the equation 1 10 V dealing with the indeendent 10 V source, the second line by the equation 4 0.5 j dealing with the 0.5 j deendent oltage source, the third line by the second line, the fourth line by the third line and leaing the fifth line as is, the following algebraically equialent circuit is deried: È 1 0 0 0 0 È 10 10 1 È È 0 0 0 1 0 05 05.. ( j - 1) -005. 005. 0 0 0 3-15. -15. 0 0 0. 1 0 0 4 1 1 5-4 Î 0 0 0-0. 067 0. 67 Î 5 Î 3ij 3 Î 15 È 1 0 0 0 0 È1 È 10 1 10 V 05. -05. 0 1 0 0-0 V fi -005. 005. 0 0 0 3-15. fi 3 10 V 0 0 0. 1 0 0 4 1 4-15V Î 0 0 0 0. 133 0. 067 Î 5 Î 0 5 30 V In order to find the currents flowing through the non-conertible oltage sources, the following are considered: From the first line of relationshi (): i x 0.05 1-0.05 fi i x 1.5A From the fourth line of relationshi (): 0.5 + i y 0.067 4-0.067 5 fi i y -3.5A Hence, ( ) 1 ( - )-30( 05. A) 05. ( -4)-5. W 10 10 i ( ) - -15 V x W ( 3i 3 5 3 ij ) - j - - 15 5 4-70 W 5 1A 3 ( 05. i 05. i 05 1 55.. ) - j - ( - ) - () y y W j
4 G. E. Chatzarakis and M. D. Tortoreli Thus, RESIST. ( - 1) 3 ( 5-4) 5 + + + 370 W 0 10 15 5 DELIV. (. A) + ( A) + ( V) + ( +. j) ( ij) 370 W 05 1 10 05 3 370 DISSIP. RESIST. W DELIV. fi DISSIP. Conclusions The classification of lanar or nonlanar electric circuits into four categories, as were examined in this aer, enables the student to sole any circuit following similar rocedures. With resect to the secial cases (b), (d) dealt with irtual current sources, this results in the non-differentiation of these cases regarding the oerall methodological stes to be followed. This is because the concet of a node is not modified, as done when suernodes are used, but the student sees the nodes from the beginning, without haing to search for an aroriate aroach to soling the roblem. Another equally imortant adantage of the use of irtual current sources is the immediate determination of the currents flowing through the non-conertible oltage sources, gien that the node oltages are known, since their currents are already exressed in the equations written in matrix form. So, the ower deeloed by these sources is easy to calculate and therefore the roof of the ower balance does not resent any difficulties. Secial attention must be aid to the conditions under which a oltage source is transformed to a current source; this is because whereas a oltage source is conertible when there is a resistance in series with it, for methodological uroses it should be considered non-conertible when the conditions mentioned in case (d) are not met. Also, one must be careful, when a current source is in series with a resistance, to consider a node between them, as noted earlier. Finally, the node-oltage method, as has been analysed, can obiously be used for lanar or nonlanar circuits in sinusoidal steady state (AC circuits). Howeer, a necessary condition is that all circuit sources are of the same frequency (otherwise the rincile of suerosition is used). If all sources are of the same frequency, the node-oltage method starts after the circuit transformation to the frequency domain. References 1 J. W. Nilsson and S. A. Riedel, Electric Circuits (Addison Wesley, 1996). C. K. Alexander and M. N. O. Sadiku, Fundamentals of Electric Circuit, (McGraw-Hill, 000). 3 G. E. Chatzarakis, Electric Circuits, ol. II (Tziolas Publications, Thessaloniki, 000). 4 W. H. Hayt and J. E. Kemmerly, Engineering Circuit Analysis (McGraw-Hill, New York, 1993). 5 C. A. Desoer and E. S. Kuh, Basic Circuit Theory (McGraw-Hill, 1969). 6 A. Dais, Linear Circuit Analysis (PWS, Boston, MA, 1998).
Virtual current sources for circuit analysis 43 7 D. E. Johnson, J. R. Johnson and J. L. Hilburn, Electric Circuit Analysis, (Prentice Hall, Englewood Cliffs, NJ, 1997). 8 J. D. Irwin, Basic Engineering Circuit Analysis, 4 th edn (Macmillan, New York, 1993). 9 R. C. Dorf, Introduction to Electric Circuits, nd edn (Wiley, New York, 1993). 10 J. G. Gottling, Node and mesh analysis by insection, IEEE Trans. Educ., 38, (1995), 31 316. 11 G. Wilson, A systematic rocedure for the analysis of circuits containing oerational amlifiers, IEEE Trans. Educ., E-6 (1983), 99 103.