DDTNL SLED PBLEMS F TEXT ELECTNC DECES ND CCUTS Prncples and pplcatons by- N. P. Deshpande ddtonal Solved Problems Chapter : Semconductor Physcs SP.: S crystal s doped wth 5 x 0 6 rsenc atoms per cm 3 ntally. t s also doped wth 3.3 x 0 6 atome/cm 3 and then wth 0 8 atome/cm 3 o Boron atoms. Determne- ) The type o resultant semconductor ) Concentraton o majorty carrers. Soluton: ) Phosphorus s a pentavalent mpurty. Hence t s o donor type. Each atom o P wll contrbute an electron to semconductor. rsenc s also a pentavalent mpurty. Snce already 5 x 0 6 atoms/cm 3 o rsenc are present, total donor densty s N D 8.3 x 0 6 atoms/cm 3. ) ddtonal dopng by Boron atoms (acceptor type mpurty) converts the S rom n- type to p-type snce acceptor concentraton s more that total donor concentraton. Net acceptor densty s less tan number o Boron atoms added due to compensaton. Hence extrnsc S s o p-type and densty o holes (majorty carrers s- p N (B) [N D (s) + N D (P)] 0 8 [5 x 0 6 + 3.3 x 0 6 ] 9.7 x 0 7 /cm 3 SP.: Determne the Ferm probablty (E) or an electron at 300 0 K havng energy level o 4kT above E. Soluton: The desred Ferm probablty s gven by relaton- ( E) 0.079or.79% + e E E kt + e 4kT kt SP.3: Fnd the rate o change o conductvty wth respect to temperature or ntrnsc Ge at 300 0 K. Soluton: ntrnsc concentraton s gven by relaton- n B T 3/ e -Eg/kT and conductvty s gven by relaton-
( ) 3 / Eg / kt µ + µ BT e ( µ + ) σ n q n p n µ For ntrnsc semconductor, n p n. Derentatng expresson or σ w.r.t. T and notng that B(µ n + µ p ) s ndependent o temperature, we get- p dσ dt 3 T E + kt g Substtutng Eg E g0 0.785 e, T 300 0 K and k 8.6 x 0 5 e/ 0 K, we get- σ 3 E g + dt T kt d 0 0.0556 / 3 0.785 + 5 x300 x8.6x0 x ( 300) SP.4: n ntrnsc S sample doped wth 0 8 atoms/cm 3 o rsenc s rased rom 300 0 K to 340 0 K. Fnd the change n derence between E and E. K Soluton: Snce rsenc s pentavalent mpurty. Extrnsc semconductor wll be o n- type. For n-type S, n N D and E E kt ln n n t 300 0 K and kt 0.0586 e. Substtutng these values n above expresson, we get- 8 n 0 E E kt ln 0.0586 ln 0 n.5x0 0.4658 e t 340 0 K and kt 0.093 e. Substtutng these values n above expresson, we get- 8 n 0 E E kt ln 0.093ln 0 n.5x0 0.58 e Hence change n (E E ) rom 300 0 K to 340 0 K s 0.58 0.4658 0.06 e SP.5: ddton o rsenc atoms per S atom to the extent o 0.4 x 0 7 results n a 0 Ω-cm resstvty extrnsc semconductor at 300 0 K. What must be the atomc densty n ntrnsc S? Soluton: Conductvty o extrnsc S s-
( Ω cm) σ n 0. ρn The conductvty s also gven by- σ n nqµ n Hence we need to determne n ( N D ) rst. µ n 300 cm /-s orm standard propertes table. σ 0. n 4.8x0 x300 n N D 9 qµ n.6x0 4 / cm 3 Snce rato o S atoms to s atoms s 0.4 x 0 7, n 4.8 x 0 4 x 0.4 x 0 7 4.99 x 0 /cm 3. SP.6: When ntrnsc S at 300 0 K s doped wth acceptor mpurty, ts conductvty becomes.5 (Ω-m) -. Determne- ) Hole concentraton ) Electron concentraton 3) ato o hole to electron concentraton. Soluton: Snce acceptor mpurty s added, the resultng semconductor wll be o p-type. Conductvty o p-type semconductor s gven by- σ p pqµ p σp.5 0 3 p.875x0 / m 9 qµ p.6 x0 x 0.05 Electron concentraton can be determned rom Mass acton law. Hence- 6 (.5x0 ) 3 n n.x0 0 p.875x0 / m The rato o hole to electron concentraton s-.875x0.x0 0.56x0 8 Chapter : Semconductor Physcs ddtonal Exercse Problems E.: Calculate the ntrnsc carrer concentraton o S and Ge at 300 0 K and 400 0 K takng nto account the varaton o E g wth temperature. E.: band gap energy or a sample o S s ound to be.0 e, what must be the temperature o the sample? 3
E.3: Plot the graph o (E) versus temperature or a semconductor wth E 6. e and E 5.9 e or temperature range o 0 0 C to 00 0 C. Comment on results. E.4: ntrnsc S at 300 0 K s doped wth 0 6 atoms/cm 3 o Boron atoms, what wll be the thermal equlbrum electron and hole concentraton values? From the calculated values o concentratons, deduce the type o extrnsc semconductor. E.5: Fnd resstvty o ntrnsc Ge at 300 0 K. acceptor mpurty to the extent o atom per 0 7 atoms o Ge s added, what wll be the change n resstvty? E.6: nterconnectons nsde the ntegrated crcuts are made usng Copper or lumnum. a strp conductor has length o.00 mm, cross sectonal area o 3 x0 - m and the resstance o 0Ω, what must be the electron concentraton? ssume moblty o electrons to be 000 cm /-s. E.7: Fnd densty o donor atoms resstvty o ntrnsc S s ound to be 8 Ω-cm. What s the rato o majorty to mnorty carrer concentratons n extrnsc S? E.8: For a p-type S bar used n Hall eect experment, d W 3 mm. The current through bar s 40 µ and Hall voltage s 00 m. magntude o lux densty used s 0. Wb/m, nd the resstvty o bar. ssume moblty o holes to be 500 cm /-s. E.9: n-type S sample s doped wth donor mpurty o 0 5 atoms /cm 3. length o S sample s.00 mm and cross sectonal area s 5 x 0-9 m, determne- ) oltage needed across the bar to produce a current o. µ ) Conductvty o the bar. E.0: n external voltage o s appled to ntrnsc S cube wth all dmensons to be 0 mm. n.5 x 0 0 electrons/cm 3, determne- ) Drt velocty o charge carrers ) Drt current densty due to electrons 3) Drt current densty due to holes 4) Total drt current densty 5) Total current n the bar. E.: bar o ntrnsc S has cross sectonal area o 4. x 0-4 m. electron densty s. x 0 6 /m 3, what should be the length o bar so that a current o. m results n t when 0 are appled across the bar? ssume µ n 0.3 m /-s, µ p 0.05 m /-s. 4
ddtonal Solved Problems Chapter 3: Dodes and Ther pplcatons SP 3.: the barrer potental or certan S dode at room s 0.6 and the concentraton o donor atoms s 0 /m3, determne the concentraton o acceptor atoms. Soluton: t room temperature T 0.0586. 0.6, n or S.5 x 0 0 /m 3 and N D 0 /m 3. Substtutng these values n the expresson or barrer potental, we get- kt N N D N N 0 ln T ln q n n N ( ) x0 0.6 0.0586 ln 0.5x0 Solvng or N, we get- N.68 x 0 atoms/m 3. D SP 3.: S p-n juncton dode has reverse saturaton current o 0-4 at room temperature. Calculate the current through the orward based dode at 67 0 C a orward voltage o 0.7 s appled across the dode. ssume η. Soluton: Both T and S change wth temperature. t room temperature.e. T 300 0 K, S 0-4, T 0.0586. t 67 0 C, T 73 + 67 340 0 K. T 340 T 0.093 600 600 everse saturaton current at T s gven by- ( T T) /0 4 S Sx 0 x Current through dode s gven by- / η e 6x0 S (340 300) /0 6x0 4 ( ) ( ) T 4 0.7 / 0.093 x e 3.768 m SP 3.3: n deal S dode has reverse saturaton current o n at room temperature (300 0 K). Fnd the dynamc resstance o dode or a orward bas o ) 0.5 ) 0.6 and 3) 0.7. ssume η. Comment on results. Soluton: Dynamc resstance o dode s gven by expresson- r η T η T Se T 0.0586 at 300 0 K. Hence η T 0.057. 5
) Dynamc resstance or a orward bas o 0.5 s- η 0.057 0.5 / 0. 0 9xe r T 057 ηt Se 3.74k ) Dynamc resstance or a orward bas o 0.6 s- η 0.057 0.6 / 0. 0 9xe r T 057 ηt Se 473.6Ω 3) Dynamc resstance or a orward bas o 0.7 s- η 0.057 0.7 / 0. 0 9xe r T 057 ηt Se 68.5Ω Comment: s the dode s orward based beyond cut-n voltage, the dynamc resstance drops at a rapd rate. Ths sgnes the exponental nature o - characterstc o dode. SP 3.4: Determne the state o each dode or the crcut shown below or ) k ) 0k. Dode D s S dode wth 0Ω and γ 0.6. Dode D s Ge dode wth 0Ω and γ 0.. D 0 D Soluton: ntally we assume that both dodes are N. We then replace the dodes wth ther equvalent crcuts. The resultant crcut that we can use or analyss s shown below- γ γ 0 D D K K ) For k, the KL expresson or loop contanng D s- - + ( + ) + + γ 0 6
Smlarly, KL expresson or loop contanng D s- - + ( + ) + + γ 0 Substtutng the values o resstors n k and current n m, we get- -0 + ( + ) x + 0.0 + 0.6 0 () -0 + ( + ) x + 0.0 + 0. 0 () Subtractng () rom (), and rearrangng terms, we get- + 40 Substtutng n () and solvng or, we get -0.9 m. Snce s negatve, dode D must be FF. Hence practcally, 0. Substtutng 0 n (), we get 9.6 m. Hence we conclude that D s FF and D s N. ) For 0k, and assumng that both D and D are N as beore, the KL expresson or loop contanng D s- - + ( + ) + + γ 0 Smlarly, KL expresson or loop contanng D s- - + ( + ) + + γ 0 Substtutng the values o resstors n k and current n m, we get- -0 + ( + ) x 0 + 0.0 + 0.6 0 (3) -0 + ( + ) x 0 + 0.0 + 0. 0 (4) Subtractng (4) rom (3), and rearrangng terms, we get- + 40 Substtutng n (3) and solvng or, we get -9 m. Snce s negatve, dode D must be FF. Hence practcally, 0. Substtutng 0 n (4), we get.978 m. Hence we conclude that D s FF and D s N. SP 3.5: Determne the slope o transer characterstc or parallel clpper crcut shown n Fgure below when the dode s N. Forward resstance o dode s 0Ω. Comment on result. D 0 7
Soluton: When the dode s N, t can be replaced by ts DC equvalent crcut. The resultant crcut s shown below- γ o Slope o transer characterstc o ths crcut s gven by relaton (3.6) whch s- K Slope + 0 9.9x0 0 + 000 3 Comment: The expresson or slope ndcates that t s desrable to have << or better clppng. Snce s the characterstc o dode, we need to choose >> n any practcal dode clppng crcut. SP 3.6: Wrte expressons or or ollowng clppng crcuts when the dode s N. ssume that the orward resstance o dode s and cut-n voltage γ. D 0 D 0 (a) (b) D 0 (c) 8
Soluton: a) Let us assume that when dode s N, current through, D and path s. When the dode s N, we can replace t wth ts DC equvalent crcut. Ths s shown below- γ o K The KL expresson or path contanng, and D s- - + + + γ 0 s seen rom the gure, + γ. b) The clpper crcut shown n Fgure b) s a parallel bsed clpper. The equvalent crcut ater replacng ddoe wth ts DC equvalent crcut s shown below- γ o K The KL expresson or closed loop contanng, and D s- - + + γ + + 0 s seen rom gure the output voltage s + γ +. c) The clpper crcut shown n Fgure c) s a parallel bsed clpper. t can be noted that polarty o s reversed.the equvalent crcut ater replacng ddoe wth ts DC equvalent crcut s shown below- 9
γ o K The KL expresson or closed loop contanng, and D s- - + + γ + - 0 s seen rom gure the output voltage s + γ -. SP 3.7: For HW crcut shown n Fgure below, determne peak and average.e. Dc output voltage. ssume drop across conductng dode to be 0.9. : D + 30, 50 Hz C L (External Load) T - Soluton: Secondary voltage s determned by step-down rato o transormer. Peak prmary voltage s gven by- m (pr) 30x 35.7 Usng stpe-down rato, peak value o seconadry voltage s gven by- n 35.7 m(pr) m (sec) 7. Peak load voltage L(p) m(sec) D 7. 0.9 6. verage value o output voltage s gven by- 0
π m(p) dc 8.34 SP 3.8: Determne the TUF or HW crcut where secondary resstance s Ω, orward ressatnce o conductng dode s 3 Ω and equvalent load resstance s 00 Ω. Comment on result. Soluton: TUF or HW s gven by expresson (3.56)- TUF x x 0.79 π S + π 5 + + L 00 Comment: Ths example satses the desrable condton or better TUF vz. ( S + ) << L.Henc etuf s very close to theoretcal maxmum value o 0.87. SP 3.9: For the FW crcut, determne- dc, dc, P dc, rms and recter ecency. ssume drop across conductng dode to be 0. 5 Ω W, resstance o each hal o secondary- S 5 Ω and equvalent load resstance s 00 Ω. Step-down rato o power transormr s :. Soluton: Secondary voltage s determned by step-down rato o transormer. Peak prmary voltage s gven by- (pr) m 30x 35.7 Usng stpe-down rato, peak value o seconadry voltage s gven by- n 35.7 m(pr) m (sec) DC output voltage s gven by- π x7. π m(sec) dc 7. 7.5 Peak secondary current s gven by- Usng stpe-down rato, peak value o seconadry voltage s gven by- m(sec) 7. m 0.7 L 00 DC load current s gven by-
π x0.7 π m dc 0.75 MS load current s gven by- m 0.75 rms 0.8 DC power delvered to load s gven by- 4 π 4 π ( 7.) ( 5 + 5 + 00) 00 P m L dc ( ) S + + L.46W 8 ecter ecency π 8 00 L ( S + + L ) π ( 5 + 5 + 00) 0.736or73.6%
ddtonal Exercse Problems Chapter 3: Dodes and Ther pplcatons E 3.: S p-n juncton dode s doped wth acceptor mpurty o.5 x 0 atoms/cm 3 and a donor mpurty o 0 atoms/cm 3. Calculate the barrer potental at a) oom temperature b) 70 0 C. E 3.: S p-n juncton dode has a reverse saturaton current o 0-4 and s orward based to 0.7. ssumng η, plot the graph o orward voltage versus temperature or temperature changng rom 0 0 C to 00 0 C. Comment on results. E 3.3: For the clppng crcuts shown below, wrte closed loop KL expresson when the dode s N. eplace each dode wth a seres combnaton o and γ. D 0 D 0 D D 0 0 D 0 D 0 E 3.4: For a Ge dode operatng at room temperature, η. D s ound to be 0. or a orward current o 8 m, a) what wll be the orward current or D 0.5? b) What must be the value o reverse saturaton current? E 3.5: For the crcut shown below, sketch the transer characterstc assumng deal dode. nput voltage range s +4. 3
D 3 0Ω 0Ω 0 0Ω 5 D E 3.6: utput voltage o a FW crcut s 4 and load draws a current o 00 m. resstance o each hal o secondary wndng o power transormer s 4 Ω, orward resstance o conductng dode s also 4 Ω, determne- ) DC power output ) ecter ecency 3) P ratng o dodes. E 3.7: For the regulator crcut shown below, Z, Z Z 5 Ω, ZK m and Zmax 40 m, what wll be the maxmum varaton n output voltage. nput voltage s constant and equal to +8. 00 Ω 8 Z o E 3.8: For the zener voltage regulator shown below, determne- ) utput voltage ) Load current 3) oltage drop across 4) Current through zener 5) Power dsspated by zener. k 48 Z 7 o 4
ddtonal Solved Problems Chapter 4: Feld Eect Transstors and pplcatons SP 4.: The crcut shown below uses JFET N 5459 wth GS(FF) -8.0 and DSS 9 m. Determne the mnmum value o DD that wll put the devce n saturaton. D D 470Ω G S N5459 + - DD Soluton: For JFET n saturaton, the mnmum value o DS P GS(FF) 8. For gven crcut, GS 0. By denton, D DSS or GS 0. The KL expresson or loop contanng DD, D and JFET s- - DD + D D + DS 0 Hence DD D D + DS (9)(0.47) + 8.3 SP 4.: Data sheet or JFET N5459 ndcates DSS 9 m. GS(FF) -8, what wll be the dran current or- ) GS - ) GS - 3) GS -3 4) GS -4. Soluton: The dran current or derent values o GS s determned by Schockley s equaton- D GS DSS where P GS(FF) 8 P GS ) For GS -, D DSS 9 6.89m P 8 GS ) For GS -, D DSS 9 5.06m P 8 GS 3 3) For GS -3, D DSS 9 3.5m P 8 GS 4 4) For GS -4, D DSS 9.5m P 8 5
SP 4.3: Data sheet or JFET N5458 ndcates DSS 6 m, GS(FF) -7.0. y s(max) 5500 µs, what wll be the orward transconductance at GS -3.5? lso determne the value o dran current or ths value o GS. Soluton: y s(max) s nothng but g m0 or JFET. n order to determne transconductance or JFET at GS -3.5 we use the relaton (and notng that - P GS(FF) 7 GS 3.5 g m g mo µ P 7 ( 5500) 750µ S or750 / The dran current or gven value o GS s obtaned usng Schockley s equaton- GS 3.5 D DSS 6.0 P 7.5m SP 4.4: certan JFET s requred to be based at md-pont. DSS or JFET s 9 m GS - and DD 8, what wll be the values o S and D or sel bas arrangement? Soluton: For JFET based at md-pont, P GS(FF) GS x 3.4-6.8. The dran current s hal o DSS.e. 9/ 4.5 m and DS DD / 9. esstance n seres wth Source termnal s gven by- S GS 444Ω 4.5m D Usng KL expresson or output loop, and rearrangng the terms, we can wrte- DD DS 8 9 D S 0.444.556k 4.5 D SP 4.5: JFET CS ampler shown n gure below uses JFET N5459. g m 4 m/ and r d 00 k, what wll be the voltage gan and output resstance o the ampler? ssume all capactors to be arbtrarly large. 6
+ DD D 0k - C C + C C + - G S + M 0Ω C S - Soluton: oltage gan or CS ampler s gven by relaton- -g m eq Where eq r d D 0k 00k 9.09k Hence -4 m/ x 9.09k -36.36 The output resstance s gven by r d D 0k 00k 9.09k SP 4.6: What s the voltage gan and nput resstance o JFET ampler shown n gure below? GSS or JFET s 5 n at GS -0 and transconductance o JFET s. m/. DD + - C C + + C C -.M 0k C S G S L 0M 7
Soluton: Ths s a Common Dran (CD) ampler. The expresson or voltage gan s- g m eq where eq S L. n the present case, L >> S. Hence eq + g m eq S. The voltage gan s- g m eq + g g m S + g.x0 +.x0 m eq m S nput resstance or devce s gven by- 0 5n GS GSS 000M 0.93 Ths nput resstance o the devce s shunted by external basng resstor G. Hence ampler nput resstance s- G G.M SP 4.7: Data sheet or certan EMSFET gves D(on) 00 m, GS(th).. ) K 6.0 m/, what must be the value o GS? ) Determne the value o D or GS 4. Soluton: ) K [ ] hence [ ] 33. 33 GS GS(th) K 6 GS GS(th) D(on) GS GS(th) 5.77 GS 5.77 + GS(th 5.77 +. 6.97 ) ) equred value o Dran current s gven by- D K[ GS - GS(th) ] 6.0[4-.] 47.04 m SP 4.8: For EMSFET basng crcut shown n gure below, the devce used has GS(th). and D(on) 00 m at GS 5. Determne the values o GS, K, D and D DS 6. D(on) 00 8
DD +4 D 0k D G S k Soluton: The basng arrangement shown uses a potental dvder crcut. Snce Source s at ground potental, GS s gven by- GS xdd x4 3.7 + 0 + GS D(on) 00 K 3.85m / [ ] GS(th) ( 5.) The dran current s gven by relaton- D K[ GS - GS(th) ] 3.85 x [3.7-.] 87.5 m we wrte a KL expresson or dran loop, and rearrange terms, external dran resstance s gven by relaton- D DD DS 4 6 06Ω 87.5m D 9
ddtonal Exercse Problems Chapter 4: Feld Eect Transstors and pplcatons E 4.: For certan JFET, GS(FF) -8 and DSS 9 m. Determne the values o D or GS varyng rom 0 to 8 n steps o and plot the transer characterstc. E 4.: JFET used n sel bas crcut has GS(FF) -0 and DSS m. Determne the values o D and S or md-pont bas. The crcut uses DD +4. Fnd quescent values o D, GS and DS. E 4.3: For the crcut shown below, determne quescent values o D, GS and DS. The JFET used has GS(FF) 7 and DSS 8m. DD - D.k p-channel JFET G 0M S 470Ω E 4.4: For the CS ampler shown n gure below, what wll be the output voltage 0m, 0 khz C nput s appled to the ampler. The JFET used has g m 3.8m/. + DD D.k - C C + 47µF C C + - 00µF G S + 0M 390Ω C S - 000µF 0 L 00k
E 4.5: For the CG ampler shown n gure below, the JFET used has g m 3.8 m/. Determne- ) oltage gan ) nput resstance 3) utput resstance. ssume all capactors to be arbtrarly large. DD +9 D 0k C C C C - + + - S.8k E 4.6: For the MSFET crcut shown n gure below, the devce used has D(on) 3. m at GS 4 and GS(th).8. Determne- ) GS and ) DS. DD + 0M D k D G S 4.7M
E 4.7: Data sheet o certan MSFET ndcates D(on) 8m at GS -0. GS(th) -.8. Determne D or GS -4. E 4.8: Draw the output voltage waveorm or CS ampler shown below. The MSFET used has g m 4.5 m/ and DSS m. ssume all capactors to be arbtrarly large. DD +4 D k C C D C C 0m MS G S G 0M E 4.9: For the crcut shown below, the MSFET used has ollowng parameters- D(on) 6 m at GS 8, GS(th). and g m 3 m/. Determne GS, D and DS. DD +0 k D k C C + - - C C + 8k L 0k
Chapter 5: Bpolar juncton Transstors and pplcatons ddtonal Solved Problems SP 5.: Calculate the values o C and CE or the crcut shown below. The transstor used has β 00. ssume BE(actve) 0.7. CC + C k B 00k BB Soluton: Wrtng KL expresson or nput loop gves us the value o base current. The closed loop KL expresson or nput loop s- - BB + B B + BE(actve) 0 earrangng terms, we get- BB BE(actve) 0.7 B 3µ B 00k ssumng that the transstor s n actve regon, C β B 00 x 3 x0-6.3 m. To determne CE, we wrte KL expresson or output loop. Ths gves- - CC + C C + CE 0 CE CC C C (.3)(.) 9.4 Snce CB s postve (or npn transstor) and CE s more than CE(sat), transstor s ndeed n actve regon. Ths justes our ntal assumpton. ( CB C B 9.7 0.7 8.44). SP 5.: For the crcut shown below, the transstor used has β 00. Determne the regon o operaton o transstor. ssume BE(actve) 0.7 and BE(sat) 0.8. 3
CC +4 C 4k7 B 00k BB 3 E k Soluton: ntally we assume that transstor s n actve regon. KL expresson or nput loop s- - BB + B B + BE(actve) + E E 0 For the transstor n actve regon, E (+β) B. Substtutng ths n above KL expresson, and rearrangng terms, we get- BB BE(actve) 3 0.7 B µ + ( + β) (00 + 0)0 3 B E For transstor assumed to be workng n actve regon, C β B 00 x x 0-6.m. We can now determne CE (hence CB ) to conrm our assumpton that transstor s ndeed workng n actve regon. KL expresson or output loop s- - CC + C C + CE + E E 0 Hence CE CC C C E E 4 - (.)(4.7) (.)().0 n order to determne CB, we calculate B and C. 4
B BE(actve) + E E 0.7 +..8 Smlarly, C CC - C C 4 (.)(4.7) 7. By denton, CB C B 7..8 4.38 Snce CB s postve or npn transstor, the devce s ndeed n actve regon. SP 5.3: For CE ampler shown n gure below, determne- ) 4) 5). The BJT used has ollowng h-parameters ) 3) S h e k h e 80 h re x 0-4 h oe 0 µ/ ssume all capactors to be arbtrarly large. + CC 00k C 3k9 C C r s C C k S E + C E 0k k - C Soluton: The C equvalent crcut or ampler ater replacng BJT wth ts h- parameter model s shown below- r s B h e C b S 00k 0k h re v ce E h e b h oe C 3k9 5
n ths case, /h oe 50k. Ths s much larger than C.e. 3k9. Hence- h e + h 80 6 + (0x0 )(3.9x0 3 B oe C ) 74. h e + h re C x0 3 + (x0 4 )( 74.)(3.9x0 3 ) 94.Ω B 00k 0k 9.k b b x b s ound out usng Norton s current dvson rule. 9. b B ( 74.) 67. 4 b B + ( 9.+ 0.94 ) nput resstance s gven by- (0.94k)(9.k) 853Ω B C ( 67.4)(3.9) oltage gan 307. 4 0.853 oltage gan takng nto account r S S + r S ( 307.4)( 0.853) 0.853 + 4.5 utput admttance or transstor- Y h oe h h e h re + e S where S s eectve source resstance seen by the transstor. r k 9. k 0.9 k S S B 6
4 ( 80)( 0 ) h eh re 6 Y h oe 0 0 3 h + 0.9 0 e S ( + ).57 µ / Y 86.43 k Eectve output resstance wll be- ( 86.43 k) ( 3.9 k) 3.73 k C SP 5.4: For the ampler shown below, calculate- ) 5) S 6) S ) 3) 4) 7). The BJT used has ollowng h-parameters h e k h e 60 h re.5 x 0-4 h oe 5 µ/ ssume all capactors to be arbtrarly large. + CC 00k C 3k9 C C r s CC S k 0k E 330Ω C E L 4k7 Soluton: To see whether approxmate analyss s vald or not, we rst calculate L C L 40k 3k9 4k7.0k hoe 6 3 h oe L 5 0.0 0 0.05 L 7
Snce h oe L 0., we can use approxmate analyss. Fgure below shows C equvalent wth BJT replaced by CE h-parameters. We have omtted h re v ce and h oe rom the equvalent crcut, consstent wth approxmate analyss. r s B h e C S k 00k 0k b E h e b C 3k9 C L 4k7 C equvalent or ampler wth BJT replaced by CE h-parameters Current gan or devce h e 60 nput resstance or devce h e k nput resstance or ampler B Current gan or ampler s gven by relaton- k 00k 0k 0.9k C C b b C C + L B + h 3.9 3.9 + 4.7 9. 9.+ B ( h ) ( 60) 4. 49 e e Derent ratos were ound out usng Norton s current dvson rule. oltage gan or ampler- h e L ( 60)(.0) 34.66 0.9 oltage gan takng nto account source resstance- S + r S ( 34.66)(0.9) 0.9 + 63.79, or devce (pproxmate model). 8
4k7 3k9 L L C.3k SP 5.5: For the crcut shown n gure below, determne- ) ) 3) and 4). The BJT used has ollowng h-parametersh e k h re.5x0-4 h e 80 h oe 5µ/ Neglect the eect o basng network. ssume all capactors to be arbtrarly large. + CC r s CC C C S k E k Soluton: Ths s a Common Collector ampler. Snce h-parameters or CE are speced, we use converson ormulae rom Table 5.6. h c h e h oc h oe 5 x 0-6 h c -(+h e ) -8 h rc Snce h oc E < 0., we can use approxmate analyss. Current gan +h e +80 8 nput resstance, neglectng the eect o basng network s- h e + (+h e ) E.0 + (+80)(.) 78.k h e oltage gan 0. 994 78. utput resstance rs + h e 000 + 000 4. 69Ω + h + 80 e 9
SP 5.6: Common Base ampler s drven by a voltage source havng output mpedance o 50Ω. (ecall that CB ampler s nput resstance s low). load resstance or ampler s 0k and BJT used has ollowng h-parameters- h b 7Ω h rb.5 x 0-4 h b -0.98 h ob 0.5µ/ Determne- ) ) 3) 4) S 5) S 6). Neglect the eect o basng network. h b ( 0.98) Soluton: Current gan 0. 975 6 3 + h + (0.5x0 x0x0 ) ob L nput resstance h b + h rb L 7 + (.5x0-4 )(0.975)(0x0 3 ) 9.43Ω L 0.975x0000 oltage gan 33. 3 9.43 oltage gan takng nto account source resstance- + r (33.3)(9.43) 9.43 + 50 S S.75 Current gan takng nto account source resstance rs + r (0.975)(50) 9.43 + 50 S S 0.63 utput admttance Y h ob h h b b h rb + r S 0.5x0 6 ( 0.98)(.5x0 7 + 50 4 ) 3.68x0 6 mho utput resstance Y 3.68x0 6 7.6k SP 5.7: For Emtter Follower stage shown below, the BJT used has ollowng h- parametersh e.k h e 00 Calculate the value o nput resstance ) Neglectng the eect o basng network ) Takng nto account the eect o basng network. 30
+ CC 39k C C C C 3k9 E k Soluton: ) nput resstance wthout consderng the eect o basng network- h + ( + h ).+ ( + 00) e e E 0.k ) nput resstance takng nto account the eect o basng network- B 0.k 39k 3.9k 3.4k SP 5.8: For the ampler shown below, the BJT used has h e k and h e 0. Calculate ) Mller resstances M, M and hence o the crcut. ). ssume C to be arbtrarly large. + CC 8k 3 C 0k 8k E k 3
Soluton: Ths s a crcut o Bootstrapped Emtter Follower. Snce voltage gan o emtter ollower crcut s close to unty. Eect o M on output sde can be neglected. Fgure below shows C equvalent crcut that we can use or computaton o perormance parameters- M 8k E k M 8k C ground The eectve load resstance, across whch output the s developed s- k 8k k 0.88 k E E M e ` ( h ) h + +.0 + () (0.88 k) 06.8 k e E h e.0 0.99 ` 06.8 Snce s close to unty, our ntal assumpton that eect o M wll be neglgble s justed. 3 0 k M.0 M - 0.99 M 06.8k b M 000 ( + h e ) ( ) 09.3 + 8 000 + 06 b M SP 5.9: two-stage C coupled BJT ampler uses dentcal transstors wth h e 0 and h e k. oltage dvder basng network uses 00k and 0k. C or each stage s 0k. Determne overall ) nput resstance ) utput resstance 3) oltage gan. ssume couplng and bypass capactors to be arbtrarly large. 3
Soluton: (eer to Fgure 5.78 o text). doptng notatons o ths gure, 00k 0k 3 00k 4 0k C C 0k. ) verall nput resstance o the ampler s gven by- h e 00k 0k k 900Ω ) Snce hoe s not speced, ts eect on output resstance can be neglected. Hence overall output resstance s C 0k. 3) To calculate voltage gan, we rst determne nput resstance o second stage. Ths s gve by- 3 4 h e 00k 0k k 900Ω or 0.9k Eectve load resstance on rst stage L C 0k 0.9k 0.85k h e L h e L ( 50)(0.85) oltage gan o rst stage 45. 8 0.9 h e C ( 50)(0) oltage gan o second stage 555. 55 (0.9) verall voltage gan x (-45.8) x (-555.55) 5444.44 SP 5.0: Class transormer coupled audo power ampler shown n gure below uses a step-down transormer wth turns rato 4:. The output s adjusted or maxmum symmetrcal swng. nput voltage s sne wave. Determne- ) C power delvered to load ) DC power nput 3) Power dsspaton ratng o the transstor. + CC +8 N : N 4: 4Ω C C E C E 33
Soluton: For an deal case and or maxmum symmetrcal swng, Pac rmsx rms m x m where m and m are peak values o secondary voltage and current respectvely. For m maxmum symmetrcal swng, CE(mn) 0 and C(mn) 0. Hence m. m m m m P ac x x L n an deal case, m(pr) CC 8. m L Secondary peak voltage s determned usng transormer s turns rato. Hence- n 8 4 m(pr) m (sec) P ( 4.5) ac m(sec) L x4 4.5.53W Quescent collector current s gven by- CC n 8 6x4 CC CQ L L 0.8 DC power nput P dc CC x CQ 8 x 0.8 5.06W Power dsspated by transstor (assumng deal transormer and neglectng the power dsspated by basng network) s the derence between DC power nput and C power output. Hence- P D P dc P ac 5.06.53.53W Comment: s expected the theoretcal maxmum ecency s 50%. L 34
Chapter 5: Bpolar Juncton Transstors and pplcatons ddtonal Exercse Problems E 5.: For the crcut shown below, determne the value o B that wll saturate the transstor. ssume BE(sat) 0.8 and CE(sat) 0.. The transstor used has β 00. CC + C k B BB + -.5 E 5.: For the crcut shown below, determne the values o CEQ and CQ. The BJT used has β 80. ssume BE(actve) 0.7. What s the value o eectve load resstance? CC + B 470k C k7 C C C C L 0k E 5.3: For a BJT havng ollowng h-parameters, plot the graph o versus L where L vares rom 00Ω to M. E 5.4: For certan CE ampler, BJT used has ollowng h-parametersh e k h e 00 h re x 0-4 h oe 5µ/ Calculate ) Current gan ) nput resstance 3) oltage gan 4) utput resstance. Neglect the eect o basng network. 35
E 5.5: For a bootstrapped Darlngton par shown below, calculate- ) verall voltage gan ) verall nput resstance. The BJTs used have ollowng h-parametersh e.k h e 60 h oe 0µ/ ssume all capactors to be arbtrarly large. + CC 3 0k C M Q Q M E k E 5.6: For the crcut shown below, derve an expresson or ) oltage gan ) utput resstance n terms o small sgnal parameters o devces. ssume h e h oe 0 or BJT and G >> and. + Q Q G E 5.7: For an deal Class B ampler o complementary-symmetry type, CC +4 and L 8Ω. Calculate ) Theoretcal maxmum C power delvered to load ) Power dsspated by each transstor. 36
E 5.8: HF transstor uses a BJT havng ollowng hybrd-p parameters- r b 0Ω k b r b e r ce 00k C e 00pF C C 3pF g m 0m/. upper cut-o requency s observed to be 0MHz, what must be the value o load resstance or the stage? 37
ddtonal Solved Problems Chapter 6: peratonal mplers and pplcatons SP 6.: For the crcut shown n gure below, % error between theoretcal and practcal output voltage s ound to be 4%. ssumng that the error s entrely due to nput oset voltage, what must ts value? + - + n - 50 m 50k k Soluton: Theoretcal output voltage o ths non-nvertng ampler s gven by- 50 n + 50 +.55 Let the practcal output be denoted by. Snce there s a 4% error between theoretcal and practcal output, we have + 0.04.65 Expresson or or non-nvertng ampler s- + + + + + n earrangng the terms, we get-.65.55 5 + m SP 6.: For the crcut shown n gure below, the output rpple s m peak-to-peak. rpple n the power supply s 40m peak-to-peak, what must be the PS o PMP n db? 38
n + - 99k k Soluton: The voltage gan o ths non-nvertng ampler s gven by- + 99 + 00 pple n the output x Hence utput rpple m 0µ 00 PS S 40m 0µ 000 PS n db 0log 0 (000) 66dB SP 6.3: Closed loop bandwdth o an nvertng ampler havng gan o 00 s observed to be 40kHz. 0Hz, what must be the open loop gan o the ampler? Soluton: Usng relaton 6.30 rom text, the open loop gan o ampler s gven by- 00x40x0 3 5 4x0 0 SP 6.4: For the summng ampler shown n gure below, determne the output voltage. + 0k k - +. k 39 + 3 47k
Soluton: The expresson or output voltage s- 3 3 () 0 (.) ( 4) 3.7 47 SP 6.5: For certan PMP, the slew rate lmted output voltage s measured to be 00m. max MHz, what must be the slew rate o PMP? Soluton: Slew rate πma x m π x x 0 6 x 00 x 0-3 0.5 /µsec SP 6.6: For the nvertng ampler shown n gure below, the open loop gan o PMP used n 00000. Determne Z and Z o Z o PMP s 75Ω. 00k n 0k - + Soluton: Z or the nvertng ampler s nothng but 0K. Closed loop output mpedance s gven by- Z Z 75 Z 75 Ω + β 0 m 4 + + 0 x 00 Chapter 6: peratonal mplers and pplcatons ddtonal Exercse Problems E 6.: Determne the CM (n db) open loop gan o certan PMP s 4 x 0 5 and common mode gan s 0.. 40
E 6.: For certan PMP, the bas current s 40n. Determne % error n the output due to bas current ) For nvertng ampler ) For non-nvertng ampler when n 0m, 00k, 0k. ssume PMP to be deal otherwse. E 6.3: For certan PMP used n non-nvertng conguraton, determne % error n the output PMP has ollowng parameters-. m B 0n CM 80 db 0 5 nput voltage to PMP s 00m, 49k, k. E 6.4: Desgn a summng ampler to gve an output voltage + + 3 3 0 Determne % error n output voltage +0% tolerance resstors are used n above nvertng summng ampler. E 6.5: Determne % error n closed loop gan o nvertng ampler where 00k 0k and 0 5. ssume the PMP to be otherwse deal. 4
ddtonal Solved Problems Chapter 7: Frequency esponse SP 7.: n square wave testng o ampler, a 00Hz square wave nput results n 35% sag n the output and applcaton o 0kHz square wave nput results n 00nsec rse tme n the output. Determne the bandwdth o ampler. π L %sga x 35x00 Soluton: %sag x00 L.8Hz 00π 00π 0.35 0.35 t 00x0 H 9 r 3.5MHz Bandwdth H L 3.5MHz.8Hz 3.5MHz SP 7.: For CE ampler shown n gure below, determne ) Md-band gan o ampler ) Low requency 3 db cut-o BJT used has h e 00 and h e.k. Neglect the eect o basng network. + CC C k C C r s Cb S k L 470µF E C E 000µF h e C 00x. Soluton: ) Md-band gan s gven by S 00 r + h +. ) To determne lower 3 db cut-o requency, we need to rst calculate equvalent capactance. Ths s gven by- S e C + h + 00 e + + 6 6 C b C E 470x0 000x0 0.7x0 6 4
Hence C 8.78µF Lower 3 db cut-o requency s gven by- L 6 3 πc ( r h ) x8.78x0 ( x0.x0 3 S e π + ) 8.846Hz SP 7.3: n a cascade ampler havng 3 non-nteractng dentcal stages, ndvdual ampler has lower cut-o requency o 00Hz and upper cut-o requency o.8mhz. What wll be the bandwdth o cascade ampler? Soluton: verall low requency cut-o s gven by 00 n /n / /3 [ ] [ ] / 00 0.509 verall hgh requency cut-o s gven by- 96.4Hz n ( /n ) /.8x0 6 ( /3 ) / 97.68kHz Bandwdth o cascaded ampler n n 97.68kHz 0.96kHz 97.49kHz Chapter 7: Frequency esponse ddtonal Exercse Problems E 7.: For CE ampler shown n gure below, determne the overall low requency response o the ampler. The BJT used has h e k and h e 00. + CC 00k C k C C r s Cb 00µF 50Ω 470µF S E C E 0k k 0µF E 7.: For Exercse problem 7. above, does the ampler mplement domnant pole? no, what modcaton wll be necessary n the crcut? 43
E 7.3: The C coupled ampler shown n gure below gves L 0Hz. What must be the value o h e o BJT used? ssume emtter bypass capactor to be arbtrarly large. E 7.4: n a cascade arrangement o C coupled amplers wth dentcal nonnteractng stages plot the graph o bandwdth versus number o stages (n) or n varyng rom to 5. Gven 0Hz and 30Khz. How many stages would be requred to realze an audo ampler? E 7.5: two-stage JFET ampler uses dentcal FETs wth ollowng parameters- g m 0m/ r d 0k. The ampler uses D 0k, G M and equvalent shunt capactance per stage s 0pF. Determne- ) alue o C b to gve requency response db down at 0Hz. ) verall md-band gan. 44
ddtonal Solved Problems Chapter 8: Feedback and scllators SP 8.: For the block dagram shown below, derve an expresson or S S + Α + Α - - β β Soluton: By nspecton o gure- S - β x ( S -β ) t second summng juncton, β ( S β ) β The output voltage x [ ( S β ) - β ] Combnng terms n, [ + β + β ] S + β + β S SP 8.: n ampler s desgned o have open loop gan o 000. The ampler delvers W output to load. The nput voltage to ampler s 0m. Measured % second harmonc dstorton s 4%. a 40dB negatve eedback s appled and the output power s to reman same, determne ) New value o nput sgnal ) % second harmonc dstorton. Soluton: ) 40 db negatve eedback amount to 0log 0 ( + β) 40. Hence + β 00. Gan wth eedback s- 45
000 9.9 + β + 00 For ampler wthout eedback, the orgnal output voltage was 000 x 0m 0. For ampler wth eedback, the closed loop gan s 9.9. Hence nput voltage requred to produce same output power wll be- 000 x0m 9.9.0 ) For ampler wth eedback, the dstorton reduces by actor D. Hence wth a 40dB negatve eedback, harmonc dstorton wll be (4 / 00).e. 0.04%. SP 8.3: pen loop gan o an ampler vares to the extent o +00 n the nomnal value o 4000. t s necessary to stablze the closed loop gan to +0.4%. Determne- ) Desenstvty ) Closed loop gan o the ampler. Soluton: Fractonal change o gan s gven by- x + β D x 00 00 D x x 6.5 4000 0.4 ) Closed loop gan or ths value o D wll be- 4000 640 D 6.5 SP 8.4: For the crcut shown n gure below, BJT used has ollowng h-parameters h e k h e 00 ) denty the eedback topology ) Calculate S and. ssume all capactors to be arbtrarly large. + CC 00k C 8k C C C 0k r s CC C C3 S k 46 E C E 0k k Q Q E k
Soluton: Current lowng through E and E s sampled and mxed wth nput at the base o Q. penng the output loop makes eedback zero. Hence ths s a case o current samplng. Snce ths current s mxed n shunt wth nput current, ths s a case o shunt mxng. Hence we can conclude that ths crcut represents current shunt eedback. The C equvalent crcut that we can use or analyss s shown below- C 8k C 0k r s Q k Q E k S B M E k7 M Stage s a CE ampler. Hence >>. Hence >>. Sng Mller s theorem, M 7k Eectve resstance n emtter lead o Q s- E E + ( E M ) k +.45k 3.45k nput resstance or second stage- h e + ( + h e ) E + (0)(3.45) 349.45k 47
h e 349.45 0.997.45 Let x x0.997 0. 7 3.45 Eectve load on Q 8k 349.45k 8k L C L 8 h e ( 00)x 800 Let x 800x0.7 60 v M 7k. Ω ( 60) 4 C 0 h ex 00x.86 349.45 x (-800) x(-.86) 548 S xβ x S + rs where M M.4Ω.4 Hence S xβ 548x 07. 85.4+ 000 S SP 8.5: For the crcut shown n gure below, determne ) v ) 3) o. Basng network s omtted or smplcty. The BJT used has h e k and h e 80. + CC r s S 600Ω E k 48
Soluton: We neglect unty n comparson wth h e n ollowng calculatons. pen loop gan or the ampler s gven by- h e E 80xk 50 rs + h e 0.6k + k rs + h e + h e E 0.6 + + (80)() Desenstvty D 5 rs + h e 0.6 + 50 ) 0. 98 D 5 ) D r S + h e + h e E 0.6 +.0 + (80)() 8.6k rs + h e 0.6 + 3) 0Ω h 80 e SP 8.6: For the crcut shown below, the closed loop gan measured s 0. PMP has open loop gan o 5 x 0 5, what must be the value o? + - 0k Soluton: >>. Hence + β β β 0. For non-nvertng ampler, β 0. + Substtutng 0k, we get 90k 49
SP 8.7: For BJT ampler shown n gure below, determne ) ) v 3) 4) o. BJT used are dentcal wth h e 50 and h e k. ssume all capactors to be arbtrarly large. + CC C C 50k C k C C 3 50k C 0k C C3 Q Q 4k7 5 3k9 6 00Ω C E 4 0k E k C C4 C E 4k7 Soluton: t s necessary to derve the equvalent crcut o ths eedback ampler wthout eedback. To determne the nput crcut, we set 0. Ths wll connect top end o to C ground. Thus 6 and wll be n parallel wth each other. we denote ths by E, E 6 0.k 4.7k 0.k. Eectve load on second stage L C ( + ) 0k 4.8k 6 3.4k h e h e L 50x3.4 6 Eectve load on rst stage L h k 50k 0k k 840Ω C 3 4 e h e h e L + ( + he) E 50x0.84 + (5)(0.) 6.88 x (-6.88) x (-6) 4.56 β 6 6 + 0. 0.0 4.7 + 0. D + β + (0.0)(4.56) 3.9 50
D 4.56 3.9 47.85 nput resstance wthout eedback h e + (+h e ) E + (5)(0.) 6.k nput resstance wth eedback x D 6. x 3.9 4k utput resstance wthout eedback L 3.4k utput resstance wth eedback 3.4 0.39k 39Ω D 3.9 SP 8.8: For the smpled crcut shown n gure below, ) denty the topology o eedback ) Determne v. The BJTs used are dentcal wth h e k and h e 00. + CC C k r s Q Q k E k S E k Soluton: we short the output, eedback voltage across E becomes zero. Hence ths s a case o voltage samplng. The eedback voltage across E s mxed n seres wth nput. Hence ths ampler represents voltage seres eedback topology. To nd the nput crcut, we set 0. Ths connects E and E n parallel between Q emtter to ground. To nd the output crcut, we open crcut nput loop. Ths connects E + E across output. The resultant C equvalent crcut that we can use or analyss s shown below- s k r s B b h e k E C h e b C k 5 C B b h e k h e b E k E k
s seen rom gure, β E + E E Hence β 0.5. oltage gan wthout eedback x x Eectve load on second stage + 4.4k nput resstance o second stage h e. L E E h ex L 50x4.4 Hence 0 Eectve load on rst stage h k k L C e 0.956k h ex L 50x0.956 oltage gan o rst stage 47. 8 h e verall voltage gan x (-0) x (-47.8) 056 Desenstvty D + β + (0.5)(056) 559 056 Gan wth eedback. 99 D 559 SP 8.9: BJT Hartley oscllator uses varable trmmer capactor to change the requency o oscllatons. Capactor vares between 5pF and 50pF. L L mh, determne the range o requency or oscllator crcut. Neglect mutual couplng between L and L. Soluton: L eq L + L mh 5
π L eq C Hence and L C L C max 3 π eq mn π x0 x5x0 mn 3 π eq max π x0 x50x0.59mhz 503.9kHz SP 8.0: For certan FET Colptt oscllator (Fgure 8.55), C 0.0µF and C 0.00µF. L µh, determne ) Gan o oscllator crcut ) Frequency o oscllatons. ssume Q o resonant crcut to be arbtrarly large. Soluton: Gan o oscllator crcut s gven by- C 0. 0 C 0.00 Frequency o oscllatons s gven by- π LC where CC 0.0x0.00 C 0.09 C C 0.0 0.00 F eq µ + + eq Hence LC 6 6 π eq π x0 x0.09x0 375.3kHz Chapter 8: Feedback and scllators ddtonal Exercse Problems E 8.: For a negatve eedback ampler, open loop gan s 00 and β 0.0. nput sgnal o 0m rom mcrophone s appled, determne ) oltage gan wth eedback ) output voltage 3) Feedback voltage. E 8.: negatve eedback ampler has open loop gan o 80dB. β 0.00, what wll be the change n closed loop gan open loop gan changes by +%. E 8.3: For a negatve eedback ampler, L 00Hz and H 0kHz. pen loop gan o the ampler s 000. β 0.0, determne ) Closed loop gan ) Bandwdth wth eedback. E 8.4: For certan negatve eedback ampler, the open loop gan o 000 alls to 60 when negatve eedback s appled. Determne the eedback actor n db. 53
E 8.5: For the eedback ampler shown n gure below, denty the eedback topology. Calculate ) v ) 3) o. The BJTs used have h e 00 and h e.k. ssume all capactors to be arbtrarly large. Basng network s omtted or smplcty. + CC C 00k C k5 C C C C3 C C Q Q E k E 470Ω C E E 8.6: For a two-stage JFET ampler shown below, denty the topology o eedback and determne ) v ) 3) o. JFETs used have r d 0k and g m 4 m/. + DD D 47k D k C C3 C C C C Q Q s G M S 70Ω G M 54 S 70Ω C S 0k
E 8.7: For a 3-stage BJT ampler shown n gure below, derve an expresson or ) Feedback actor ) v. + CC C C C3 C C Q Q 3 Q E E E 8.8: For a BJT Hartley oscllator, L mh, L mh and M 0µH. a varable capactor s used to adjust the requency o oscllatons between khz to khz, determne the value o C mn and C max. E 8.9: For certan quartz crystal, equvalent crcut components have ollowng values- L S 0.39H S 4k ) seres resonant requency o oscllator s.000mhz, what must be the value o C S? ) parallel resonant requency o oscllatons s.mhz, what would be the value o C M? 55
Chapter 9: Lnear oltage egulators and oltage eerences ddtonal Solved Problems SP 9.: For FW, capactor lter arrangement, dc 4 and equvalent load resstance s 00Ω. lter capactor used s 000µF, what wll be the MS rpple voltage? ssume 50Hz mans operaton. Soluton: 4 dc dc rms where dc 0m 4 3C 00 L L Ω Hence 0x0 3 dc rms 6 4 3C L 4x 3x50x000x0 34.64m SP 9.: + Dc voltage s derved rom FW capactor lter arrangement. The power supply s used to drve 4-dgt, 7-segment LED dsplay. Each segment draws a current o 5m. the dsplay can tolerate MS rpple o 0.8, determne the value o lter capactor. Soluton: n the worst case,.e. when all segments are N, the current demanded by load (dsplay) s dc No. o dgts x No. o segments per dgt x Current per segment 4 x 7 x 5 40m. Ths load current, drawn rom + supply amounts to the equvalent load resstance o- L dc 85. 7Ω 40m dc Usng the expresson or rpple actor r MS r dc 4 3C L C dc rms x 4 3C L 0.8 x 4x 505.µ F 3x50x85.7 SP 9.3: + dc power supply provdes current o 00m. DC voltage s derved rom FW LC lter arrangement powered by 50Hz C mans, determne the value o crtcal nductance. Soluton: We rst calculate equvalent load resstance. Ths s gven by- 56
dc L 60Ω dc 00m The value o crtcal nductance s gven by- L L 60 94.5 94.5 C 63.66mH SP 9.4: DC regulated power supply has load regulaton o 4% at ull load current o 00m. no load voltage s +5, determne ) Full load voltage ) Equvalent output resstance o regulator. Soluton: FL % Load regulaton x00 NL NL NL NL FL 0.04 Snce NL 5, FL NL +0.04 NL 5 (0.04)(5) 4 Equvalent output resstance FL FL NL 5 4 00m 0Ω SP 9.5: Desgn a C 73 based voltage regulator (eer to Fgure 9.9) to gve a nomnal output voltage o +5 wth maxmum load current o 00m. ssume 5k Soluton: eerrng to expressons 9.43 to 9.46, we can determne the requred values. SC 0.66 0.66 6. 6Ω 00m L(max) + ( + ) ( ) EF 7.0 5.0 5.0 ( + 5.0) 7.0 where resstor values are substtuted n kω. 57
Hence k. To mnmze oset error, + Practcally one may use 3 as.5k. x5 + 5 3.4k Chapter 9: Lnear oltage egulators and oltage eerences ddtonal Exercse Problems E 9.: utput voltage o a FW-lter capactor arrangement shows a peak value o 9.8 and mnmum value o 9.0. equvalent load resstance s 00Ω and lter capactor used s 000µF, determne- ) DC output voltage o the crcut ) pple actor. ssume 50 Hz C mans operaton. E 9.: Many battery elmnators requre 9 DC output. Desgn an elmnator crcut that wll provde a maxmum o 0m load current wth maxmum allowable rpple o %. ssume FW-LC lter arrangement and 50Hz C mans operaton. E 9.3: Desgn a zener regulator crcut to gve nomnal output o + DC at 0m. zener used has ZT 0m and maxmum nput voltage s 0, determne varaton n the output voltage nput changes ro 6 to 0 or the selected zener. lso determne maxmum power that can be dsspaton by the selected zener. E 9.4: zener regulator crcut uses zener dode wth ollowng parameters- Z 6.0 ZT 40m Z Z Ω P Z 750mW Zmn m unregulated nput changes between to 8, determne- ) Maxmum permssble Z ) alue o seres lmtng resstor 3) Power dsspaton ratng o seres resstor 4) Maxmum permssble load current. 58