ECE 570 Session 3 IC 752-E Computer Aided Engineering for Integrated Circuits Automatic Formulation of Circuit Equations Objective: Basics of computer aided analysis/simulation Outline:. Discussion of methods 2. Review of modified nodal analysis 3. Example of model equations 4. Computerized formulation of equations Supplemental reading: Ruehli, Vol. 3 - Part, Chpt. 2 (by K. Singhal and J. Vlach)
. Discussion of methods STA - direct assembly of KCL, KVL, and CE, many redundant variables. MTA - obtained from STA by elimination of branch voltages using KVL, fewer redundant variables. MNA - obtained from MTA via elimination of branch currents in elements with admittance representation, fewest redundant variables. 2. Review of MNA in traditional variables (nodal voltages, currents) 2.. Start with the partition of branch currents vector I I 2 J currents in resistors/conductors, capacitors, dependent current sources (admittance representation possible) currents in inductors, voltage sources, controlling currents, currents for output (no admittance representation) independent current sources 2
2.2. KCL are written in the form and the KVL are A I A I = A J () 2 2 J T V = A vn T V2 = A2 vn T VJ = AJ vn The constitutive equations complete the networ model. (2) 3
3. Example of model equations 3.. The constitutive equations are: A) for the elements with admittance representation A) for the capacitors C V ( ) dv dt I = (3) A2) for the dissipative elements (resistors, conductors) Γ V = I (4) 4
Assembling the equation for the A) type elements C ( V ) dv 0 I V = 0 dt Γ I (5) ( ) C V or else in the compact matrix form ( ) dv G C V GV = I (6) dt I 5
B) for the elements without admittance representation B) for the inductors L I ( ) di dt K V = (7) 2 2 2 2 B2) for the voltage sources K V 2 2 w S (8) Assembling the equations L ( I ) 2 di 2 K 0 2 V2 = 0 dt K w 2 S (9) ( ) L I 2 K w s 6
or in the compact matrix form di L 2 ( I2 ) KV2 ws dt = (0) Formulating the final equations Equation (6) and the first KVL (2a) submitted the KCL () yields: dv A C ( V ) A A GA v A I A J dt T n T n 2 2 = J () The remaining equation are determined by (0) rewritten with the elimination of V 2 with the use of second KVL (2b) yielding 7
di ( ) 2 T L I KA v w dt 2 2 n = S (2) Assembling the equations in the matrix form results in ( ) T T A vn A GA A vn AJ J C V A 0 d 2 = T 0 L( I ) dt I 2 I w 2 S KA2 0 2 ( ) C x The model equations in compact form C ( x) dx Gx w dt = This equation will be useful in future discussion of numerical methods including traditional time marching techniques also called discrete variable techniques (SPICE) and spectral methods based on Chebyshev and Fourier series. x G w 8
4. Computerized formulation of circuit equations A circuit is specified using an input file which contains: connectivity information specification of components (models). The input file is parsed, sub-circuits and complex elements are developed into networs composed of basic elements, such that constitutive equation can be formed. The networ of basic elements determines the system matrix. In case of nonlinear elements a linearization procedure is used to form a linear, companion networ, which is solved iteratively to obtain the solution of original nonlinear networ. Each basic element of the networ contributes to the system matrix in a specific way. The contribution can be determined by the inspection of the input file without matrix computations. Consequently each element is characterized by a stamp, which determines its contribution to the system matrix. 9
Constructing the incidence matrix (A). An entry aij of the A matrix is determined as follows a ij 0 if the node i is not connected to the branch j = if the node i is the positive node of the branch j if the node i is the negative node of the branch j This rule is used to construct the sub-matrix A 2 if there are no current controlled, current defined branches. 0
Stamps of basic elements Resistor Schematics symbol N N- i R Description on the simulator input file Example of description (SPICE) RK N N- RKVAL
Stamp of resistor (contribution to the admittance matrix) N N N R R N R R 2
Capacitor Schematics symbol Entry on a typical input file N N- CK N N- CVAL i C Capacitor stamp N N d d CVAL CVAL N dt dt N d d CVAL CVAL dt dt 3
Inductor N i L N- branch equation di L v = 0 dt N N i N N d L dt Inductor stamp branch equation 4
Independent voltage source i - N N- E v v = E n, N n, N 5
N N i 0 v n N 0 0 N 0 0 = I2 0 0 E 0 Independent voltage stamp 6
Independent current source i N Input: i N N I I Stamp N- I N = I N 7
Controlled sources CCVS VN N i VN i j - N v = H i j - Input file: VK N N HK I ( VN, VN _) The stamp of CCVS is shown in the next page. 8
N N V N V N i i 0 N N V N = V N j H 0 j 9
CCCS VN i j v N i i = F i j VN - N Input file: IK N N FK I ( VN, VN ) The stamp of CCCS is shown in the next page. 20
j branch eq. branch eq. N N VN VN i i 0 N N VN = VN j F 0 j 2
VCCS NC v - c NC v - N N i i = g v c SPICE input entry: GK N N- NC NC- g The stamp is shown in the next page. 22
23 N N NC NC N g g N g g Y NC NC =
VCVS NC N v - j v - i v = E v j NC - N Input file: VK N N NC NC EK The stamp is shown in the next page. 24
25 N N NC NC i N N NC NC E E branch equation