Similar documents
INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:


INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:


In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.

74HC257; 74HCT257. Quad 2-input multiplexer; 3-state

74HC573; 74HCT573. Octal D-type transparent latch; 3-state. The 74HC573; 74HCT573 is functionally identical to:

74LV373 Octal D-type transparent latch (3-State)

74HC573; 74HCT573. Octal D-type transparent latch; 3-state. The 74HC573; 74HCT573 is functionally identical to:

74HC244; 74HCT244. Octal buffer/line driver; 3-state

74LVC573 Octal D-type transparent latch (3-State)

INTEGRATED CIRCUITS. For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

74LVC823A 9-bit D-type flip-flop with 5-volt tolerant inputs/outputs; positive-edge trigger (3-State)

INTEGRATED CIRCUITS. 74LV273 Octal D-type flip-flop with reset; positive-edge trigger. Product specification 1997 Apr 07 IC24 Data Handbook

8-bit binary counter with output register; 3-state

74HC1G125; 74HCT1G125

74AHC541; 74AHCT541. Octal buffer/line driver; 3-state. The 74AHC541; 74AHCT541 is a high-speed Si-gate CMOS device.

74HC General description. 2. Features. Octal D-type flip-flop; positive-edge trigger; 3-state; inverting

74AHC244; 74AHCT244. Octal buffer/line driver; 3-state. The 74AHC244; 74AHCT244 is a high-speed Si-gate CMOS device.

NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs

74HC245; 74HCT245. Octal bus tranceiver; 3-state. The 74HC245; 74HCT245 is similar to the 74HC640; 74HCT640 but has true (non-inverting) outputs.

74HC574; 74HCT574. Octal D-type flip-flop; positive edge-trigger; 3-state

74AHC125; 74AHCT125. Quad buffer/line driver; 3-state

74HC4051; 74HCT channel analog multiplexer/demultiplexer

UNISONIC TECHNOLOGIES CO., LTD U74HC244

Quad bus transceiver; 3-state. The output enable inputs (OEA and OEB) can be used to isolate the buses.

74AHC14; 74AHCT14. Hex inverting Schmitt trigger


INTEGRATED CIRCUITS DATA SHEET. FAMILY SPECIFICATIONS HCMOS family characteristics. File under Integrated Circuits, IC06

Octal buffer/line driver (3-State)

74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting

Hex inverting Schmitt trigger with 5 V tolerant input

CD54/74HC367, CD54/74HCT367, CD54/74HC368, CD74HCT368

74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting. Product data sheet

The 74HC21 provide the 4-input AND function.

74LV374 Octal D-type flip-flop; positive edge-trigger (3-State) INTEGRATED CIRCUITS

MM74HC244 Octal 3-STATE Buffer

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

QUICK REFERENCE DATA GND = 0 V; T amb =25 C; t r =t f = 6 ns. TYPICAL SYMBOL PARAMETER CONDITIONS 74HC00 74HCT00 UNIT

74HC4053; 74HCT4053. Triple 2-channel analog multiplexer/demultiplexer

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

74AHC2G126; 74AHCT2G126

INTEGRATED CIRCUITS DATA SHEET. 74HC04; 74HCT04 Hex inverter. Product specification Supersedes data of 1993 Sep Jul 23

EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at ore.hu.

QUICK REFERENCE DATA GND = 0 V; T amb =25 C; t r =t f = 6 ns. TYPICAL SYMBOL PARAMETER CONDITIONS 74HC00 74HCT00 UNIT

INTEGRATED CIRCUITS. 74LVC138A 3-to-8 line decoder/demultiplexer; inverting. Product specification 1998 Apr 28

XC7SET General description. 2. Features. 3. Applications. Ordering information. Inverting Schmitt trigger

UNISONIC TECHNOLOGIES CO., LTD U74LVC1G125

74HC238; 74HCT to-8 line decoder/demultiplexer

74AHC1G14; 74AHCT1G14

74HC123; 74HCT123. Dual retriggerable monostable multivibrator with reset

NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output

74LVC374 Octal D-type flip-flop; positive edge-trigger (3-State) INTEGRATED CIRCUITS

74HC373; 74HCT General description. 2. Features. Octal D-type transparent latch; 3-state

CD54HC257, CD74HC257, CD54HCT257, CD74HCT257

74VHC244 Octal Buffer/Line Driver with 3-STATE Outputs

74ALVC bit dual supply translating transciever; 3-state. This device can be used as two 8-bit transceivers or one 16-bit transceiver.

UNISONIC TECHNOLOGIES CO., LTD

Transcription:

Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner.

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS ogic Family Specifications The IC06 74HC/HCT/HCU/HCMOS ogic Package Information The IC06 74HC/HCT/HCU/HCMOS ogic Package Outlines Octal Schmitt trigger buffer/line driver; 3-state Supersedes data of March 1988 File under Integrated Circuits, IC06 December 1990

FEATURES Non-inverting outputs Schmitt trigger action on all data inputs Output capability: bus driver I CC category: MSI GENERA DESCRIPTION The are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TT (STT). They are specified in compliance with JEDEC standard no. 7A. The are octal Schmitt trigger non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs are controlled by the output enable inputs OE 1 and OE 2. A HIGH on OE n causes the outputs to assume a high impedance OFF-state. The Schmitt trigger action in the data inputs transforms slowly changing input signals into sharply defined jitter-free output signals. The 7541 is identical to the 541 but has hysteresis on the data inputs. QUICK REFERENCE DATA GND = 0 V; T amb =25 C; t r =t f = 6 ns TYPICA SYMBO PARAMETER CONDITIONS HC HCT UNIT t PH / t PH propagation delay A n to Y n C = 15 pf; V CC = 5 V 10 16 ns C I input capacitance 3.5 3.5 pf C PD power dissipation capacitance per buffer notes 1 and 2 30 32 pf Notes 1. C PD is used to determine the dynamic power dissipation (P D in µw): P D =C PD V 2 CC f i + (C V 2 CC f o ) where: f i = input frequency in MHz f o = output frequency in MHz (C V 2 CC f o ) = sum of outputs C = output load capacitance in pf V CC = supply voltage in V 2. For HC the condition is V I = GND to V CC For HCT the condition is V I = GND to V CC 1.5 V ORDERING INFORMATION See 74HC/HCT/HCU/HCMOS ogic Package Information. December 1990 2

PIN DESCRIPTION PIN NO. SYMBO NAME AND FUNCTION 1, 19 OE 1, OE 2 output enable inputs (active OW) 2, 3, 4, 5, 6, 7, 8, 9 A 0 to A 7 data inputs 10 GND ground (0 V) 18, 17, 16, 15, 14, 13, 12, 11 Y 0 to Y 7 bus outputs 20 V CC positive supply voltage Fig.1 Pin configuration. Fig.2 ogic symbol. Fig.3 IEC logic symbol. December 1990 3

FUNCTION TABE INPUTS OUTPUTS OE 1 OE 2 A n Y n X H H X H X X Notes 1. H = HIGH voltage level = OW voltage level X = don t care Z = high impedance OFF-state H Z Z Fig.4 Functional diagram. Fig.5 ogic diagram. December 1990 4

DC CHARACTERISTICS FOR 74HC For the DC characteristics see 74HC/HCT/HCU/HCMOS ogic Family Specifications. Transfer characteristics are given below (not applicable for OE n inputs). Output capability: bus driver I CC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; t r =t f = 6 ns; C = 50 pf SYMBO t PH / t PH t PZH / t PZ t PHZ / t PZ PARAMETER propagation delay 39 A n to Y n 14 11 3-state output enable time 44 OE n to Y n 16 13 3-state output disable time 58 OE n to Y n 21 17 t TH / t TH output transition time 14 5 4 T amb ( C) 74HC +25 40 to +85 40 to +125 min. typ. max. min. max. min. max. 120 24 20 160 32 27 160 32 27 60 12 10 150 30 26 200 40 34 200 40 34 75 15 13 180 36 32 240 48 41 240 48 41 90 18 15 UNIT TEST CONDITIONS V CC (V) ns 2.0 ns 2.0 ns 2.0 ns 2.0 WAVEFORMS Fig.8 Fig.8 Fig.8 Fig.8 TRANSFER CHARACTERISTICS FOR 74HC Voltages are referred to GND (ground = 0 V) SYMBO PARAMETER V T+ positive-going threshold 1.50 3.15 4.20 V T negative-going threshold 1.35 1.80 V H hysteresis (V T+ V T ) 0.10 0.25 T amb ( C) 74HC +25 40 to +85 40 to +125 min. typ. max. min. max. min. max. 0.20 0.40 0.50 1.35 1.80 0.10 0.25 1.50 3.15 4.20 1.35 1.80 0.10 0.25 1.50 3.15 4.20 UNIT TEST CONDITIONS V CC (V) V 2.0 V 2.0 V 2.0 WAVEFORMS December 1990 5

DC CHARACTERISTICS FOR 74HCT For the DC characteristics see 74HC/HCT/HCU/HCMOS ogic Family Specifications. Transfer characteristics are given below (not applicable for OE n inputs). Output capability: bus driver I CC category: MSI Note to HCT types The value of additional quiescent supply current ( I CC ) for a unit load of 1 is given in the family specifications. To determine I CC per input, multiply this value by the unit load coefficient shown in the table below. INPUT OE 1 OE 2 A n UNIT OAD COEFFICIENT 1.30 1.30 0.20 AC CHARACTERISTICS FOR 74HCT GND = 0 V; t r =t f = 6 ns; C = 50 pf T amb ( C) TEST CONDITIONS 19 32 40 48 ns Fig.8 18 32 40 48 ns Fig.8 20 32 40 48 ns Fig.8 74HCT SYMBO PARAMETER UNIT V +25 40 to +85 40 to +125 CC (V) WAVEFORMS min typ. max min. max min. max. t PH / t PH propagation delay A n to Y n t PZH / t PZ 3-state output enable time OE n to Y n t PHZ / t PZ 3-state output disable time OE n to Y n t TH / t TH output transition time 5 12 15 18 ns Fig.8 TRANSFER CHARACTERISTICS FOR 74HCT Voltages are referred to GND (ground = 0 V) SYMBO PARAMETER V T+ positive-going threshold 2.0 2.1 V T negative-going threshold 0.70 0.80 V H hysteresis (V T+ V T ) 0.17 0.17 T amb ( C) 74HCT +25 40 to +85 40 to +125 min. typ. max. min. max. min. max. 0.23 0.23 0.64 0.74 2.0 2.1 0.60 0.70 2.0 2.1 UNIT TEST CONDITIONS V CC (V) V 5.5 V 5.5 V 5.5 WAVEFORMS December 1990 6

TRANSFER CHARACTERISTIC WAVEFORMS handbook, halfpage V O MBA325 V H V I V T V T Fig.6 Transfer characteristic. Fig.7 Waveforms showing the definition of V T+, V T and V H. AC WAVEFORMS (1) HC : V M = 50%; V I = GND to V CC. HCT: V M = 1.3 V; V I = GND to 3 V. Fig.8 Waveforms showing the input (A n ) to output (Y n ) propagation delays and the output transition times. (1) HC : V M = 50%; V I = GND to V CC. HCT: V M = 1.3 V; V I = GND to 3 V. Fig.9 Waveforms showing the 3-state enable and disable times. PACKAGE OUTINES See 74HC/HCT/HCU/HCMOS ogic Package Outlines. December 1990 7