,, Features and Benefits Temperature-stable quiescent output voltage Precise recoverability after temperature cycling Output voltage proportional to magnetic flux density Ratiometric rail-to-rail output Improved sensitivity.5 to 5.5 V operation Immunity to mechanical stress Solid-state reliability Robust EMC protection Packages: pin SOTW (suffix LH), and pin SIP (suffix U) Description The X family of linear Hall-effect sensors are optimized, sensitive, and temperature-stable. These ratiometric Hall-effect sensors provide a voltage output that is proportional to the applied magnetic field. The X family has a quiescent output voltage that is 5% of the supply voltage and output sensitivity options of.5mv/g,.mv/g, and 5mV/G. The features of this family of devices are ideal for use in the harsh environments found in automotive and industrial linear and rotary position sensing systems. Each device has a BiCMOS monolithic circuit which integrates a Hall element, improved temperature-compensating circuitry to reduce the intrinsic sensitivity drift of the Hall element, a small-signal high-gain amplifier, and a rail-to-rail lowimpedance output stage. proprietary dynamic offset cancellation technique, with an internal high-frequency clock, reduces the residual offset voltage normally caused by device overmolding, temperature dependencies, and thermal stress. The high frequency clock allows for a greater sampling rate, which results in higher accuracy and faster signal processing capability. This technique produces devices that have an extremely stable quiescent output voltage, are immune to mechanical stress, and have precise Continued on the next page Not to scale Functional Block Diagram V+ VCC Dynamic Offset Cancellation mp Filter Out VOUT. μf Gain Offset Trim Control GND -DS, Rev. 8
,, Description (continued) recoverability after temperature cycling. Having the Hall element and an amplifier on a single chip minimizes many problems normally associated with low-level analog signals. Output precision is obtained by internal gain and offset trim adjustments made at end-of-line during the manufacturing process. The X family is provided in a -pin single in-line package (U) and a -pin surface mount package (LH). Each package is available in a lead (Pb) free version (suffix, T), with a % matte tin plated leadframe. Selection Guide Part Number Pb-free Packing Mounting ELHLT-T Yes 7-in. reel, pieces/reel Surface Mount EU-T Yes Bulk, 5 pieces/bag SIP through hole LLHLT-T Yes 7-in. reel, pieces/reel Surface Mount LU-T Yes Bulk, 5 pieces/bag SIP through hole ELHLT-T Yes 7-in. reel, pieces/reel Surface Mount EU-T Yes Bulk, 5 pieces/bag SIP through hole LLHLT-T Yes 7-in. reel, pieces/reel Surface Mount LU-T Yes Bulk, 5 pieces/bag SIP through hole ELHLT-T Yes 7-in. reel, pieces/reel Surface Mount EU-T Yes Bulk, 5 pieces/bag SIP through hole LLHLT-T Yes 7-in. reel, pieces/reel Surface Mount LU-T Yes Bulk, 5 pieces/bag SIP through hole mbient, T (ºC) to to 5 to to 5 to to 5 Sensitivity, Typ. (mv/g) Pb-based variants are being phased out of the product line. a. Certain variants cited in this footnote are in production but have been determined to be LST TIME BUY. This classification indicates that sale of this device is currently restricted to existing customer applications. The device should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: October,. Deadlilne for receipt of LST TIME BUY ORDERS: pril 7, 7. These variants include: ELHLT, EU, LLHLT. b. Certain variants cited in this footnote are in production but have been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of this device is currently restricted to existing customer applications. The device should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: May,. These variants include: ELHLT, EU, LLHLT, LU, LLHLT, LU, ELHLT, EU, LU. Contact llegro for additional packing options. 5...5 bsolute Maximum Ratings Characteristic Symbol Notes Rating Units Supply Voltage V CC * dditional current draw may be observed at voltages above the minimum supply Zener clamp voltage, V Z(min), due to the Zener diode turning on. 8 V Output Voltage V OUT 8 V Reverse Supply Voltage V RCC. V Reverse Supply Voltage V RCC. V Output Sink Current I OUT m Range E to ºC Operating mbient Temperature T Range L to 5 ºC Maximum Junction Temperature T J (max) 5 ºC Storage Temperature T stg 5 to 7 ºC Northeast Cutoff, Box 5 Worcester, Massachusetts 5- (58) -5
,, DEVICE CHRCTERISTICS over operating temperature (T ) range, unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Units Electrical Characteristics; V CC = 5 V, unless otherwise noted Supply Voltage V cc(op) Operating; Tj < 5 C.5 5. 5.5 V Supply Current I cc B =, I out = 5. 8 m Quiescent Voltage V out(q) B =, T = ºC, I out = m..5.575 V Output Voltage V out(h) B = +X, I out = m.7 V V out(l) B = X, I out = m. V Output Source Current Limit I out(lm) B = X, V out..5 m Supply Zener Clamp Voltage V Z I cc = m = I cc(max) + 8. V Output Bandwidth BW khz Clock Frequency f C 5 khz Output Characteristics; over V CC range, unless otherwise noted ; C bypass =. μf, no load Noise, Peak-to-Peak V N ; C bypass =. μf, no load mv mv ; C bypass =. μf, no load mv Output Resistance R out I out ± m.5 Ω Output Load Resistance R L I out ± m, VOUT to GND.7 kω Output Load Capacitance C L VOUT to GND nf Negative current is defi ned as conventional current coming out of (sourced from) the specifi ed device terminal. Typical data is at T = C. They are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for individual units, within the specifi ed maximum and minimum limits. In these tests, the vector X is intended to represent positive and negative fi elds suffi cient to swing the output driver between fully OFF and saturated (ON), respectively. It is NOT intended to indicate a range of linear operation. Noise specifi cation includes both digital and analog noise. Northeast Cutoff, Box 5 Worcester, Massachusetts 5- (58) -5
,, MGNETIC CHRCTERISTICS, over operating temperature range, T ; V CC = 5 V, I out = m; unless otherwise noted Characteristics Symbol Test Condition Min Typ Max Units ; T = ºC.75 5. 5. mv/g Sensitivity 5 Sens ; T = ºC.99..8 mv/g ; T = ºC.75.5. mv/g Delta V out(q) as a function of temperature V out(q)(δt) Defi ned in terms of magnetic fl ux density, B ± G Ratiometry, V out(q) V out(q)(δv) ±.5 % Ratiometry, Sens ΔSens (ΔV) ±.5 % Positive Linearity Lin+ ±.5 % Negative Linearity Lin ±.5 % Symmetry Sym ±.5 % U Package Delta Sens at T = max 5 ΔSens (Tmax) From hot to room temperature.5 7.5 % Delta Sens at T = min 5 ΔSens (Tmin) From cold to room temperature % Sensitivity Drift Sens Drift T = C; after temperature cycling and over time % LH Package Delta Sens at T = max 5 ΔSens (Tmax) From hot to room temperature 5 5 % Delta Sens at T = min 5 ΔSens (Tmin) From cold to room temperature.5 8.5 % Sensitivity Drift Sens Drift T = C; after temperature cycling and over time.8 % dditional information on chracteristics is provided in the section Characteristics Defi nitions, on the next page. Negative current is defi ned as conventional current coming out of (sourced from) the specifi ed device terminal. Typical data is at T = C, except for ΔSens, and at x.x Sens. Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for individual units, within the specifi ed maximum and minimum limits. In addition, the typical values vary with gain. G = millitesla. 5 fter 5ºC pre-bake and factory programming. Sensitivity drift is the amount of recovery with time. Northeast Cutoff, Box 5 Worcester, Massachusetts 5- (58) -5
,, Characteristic Defi nitions Quiescent Voltage Output. In the quiescent state (no magnetic field), the output equals one half of the supply voltage over the operating voltage range and the operating temperature range. Due to internal component tolerances and thermal considerations, there is a tolerance on the quiescent voltage output both as a function of supply voltage and as a function of ambient temperature. For purposes of specification, the quiescent voltage output as a function of temperature is defined in terms of magnetic flux density, B, as: V out(q)(τα ) V out(q)(ºc) ΔV out(q)(δτ) = () Sens (ºC) This calculation yields the device s equivalent accuracy, over the operating temperature range, in gauss (G). Sensitivity. The presence of a south-pole magnetic field perpendicular to the package face (the branded surface) increases the output voltage from its quiescent value toward the supply voltage rail by an amount proportional to the magnetic field applied. Conversely, the application of a north pole will decrease the output voltage from its quiescent value. This proportionality is specified as the sensitivity of the device and is defined as: V out( B) V out(+b) Sens = B The stability of sensitivity as a function of temperature is defined as: Sens (ΤΑ ) Sens (ºC) ΔSens (ΔΤ) = % Sens (ºC) () () Ratiometric. The X family features a ratiometric output. The quiescent voltage output and sensitivity are proportional to the supply voltage (ratiometric). The percent ratiometric change in the quiescent voltage output is defined as: V out(q)(vcc ) V out(q)(5v) ΔV out(q)(δv) = % V CC 5V and the percent ratiometric change in sensitivity is defined as: Linearity and Symmetry. The on-chip output stage is designed to provide a linear output with a supply voltage of 5 V. lthough application of very high magnetic fields will not damage these devices, it will force the output into a non-linear region. Linearity in percent is measured and defined as: and output symmetry as: () Sens (VCC ) Sens (5V) ΔSens (ΔV) = % (5) V CC 5V V out(+b) V out(q) () Lin+ = % (V out(+b / ) V out(q) ) V out( B) V out(q) (7) Lin = % (V out( B / ) V out(q) ) V out(+b) V out(q) (8) Sym = % V out(q) V out( B) Northeast Cutoff, Box 5 Worcester, Massachusetts 5- (58) -5 5
,, Typical Characteristics ( pieces, fabrication lots) 8 7.5 7.5 5.5 5.5.5.5.5.5 verage Supply Current (I CC )vstemperature Vcc =5V - - ICC (m) 5 Lin+ (%) 5 99 98 97 9 95 - verage Positive Linearity (Lin+) vs Temperature V cc =5V - 5 Lin (%) 5 99 98 97 9 95 - verage Negative Linearity (Lin ) vs Temperature V cc =5V - 5.8.. verage Ratiometry, V OUT(q)(ΔV) vs Temperature.5 to 5. V 5.5 to 5. V.8.. verage Ratiometry, ΔSens (ΔV), vs Temperature.5 to 5.V 5.5 to 5.V Ratiometry (%). 99.8 99. Ratiometry (%). 99.8 99. 99. 99. 99. 99. 99 99 - - 5 - - 5 Continued on the next page... Northeast Cutoff, Box 5 Worcester, Massachusetts 5- (58) -5
,, Typical Characteristics, continued ( pieces, fabrication lots).575 verage bsolute Quiescent Output Voltage, V out(q), vs Temperature V cc =5V Quiescent Output Voltage, Vout(q), vsvcc T = C Vout(q) (V).55.5.5.75.5 Vout(q) (V).9.8.7..5.... - - 5..5 5 5.5 Vcc (V) 5.5 verage bsolute Sensitivity, Sens, vs Temperature Vcc =5V 5.5 verage Sensitivity, Sens, vs V cc T = C Sens (mv/g) 5.5.5.5 - - 5 Sens (mv/g) 5.5.5.5.5.5 5 5.5 Vcc (V) Vout(q)(ΔT) (G) 8 - - - -8 - verage Delta Quiescent Output Voltage, Vout(q)(ΔT), vs Temperature Δ in readings at each temperature are relative to C Vcc =5V - - 5 ΔSens (%) 8 - - - -8 - - verage Delta Sensitivity, ΔSens, vs Temperature Δ in readings at each temperature are relative to C V cc =5V - 5 Northeast Cutoff, Box 5 Worcester, Massachusetts 5- (58) -5 7
,, THERML CHRCTERISTICS may require derating at maximum conditions, see application information Characteristic Symbol Test Conditions* Value Units Package Thermal Resistance R θj *dditional thermal information available on llegro website. Package LH, -layer PCB with copper limited to solder pads 8 ºC/W Package LH, -layer PCB with. in. of copper area each side connected by thermal vias ºC/W Package U, -layer PCB with copper limited to solder pads 5 ºC/W Power Derating Curve V CC(max) Maximum llowable V CC (V) 5 -layer PCB, Package LH (R J = 8 ºC/W) -layer PCB, Package U (R J = 5 ºC/W) -layer PCB, Package LH (R J = ºC/W) V CC(min) 8 8 Temperature (ºC) Power Dissipation, PD (mw) 9 8 7 5 9 8 7 5 Power Dissipation versus mbient Temperature -layer PCB, Package LH (R J = ºC/W) -layer PCB, Package U (R J = 5 ºC/W) -layer PCB, Package LH (R J = 8 ºC/W) 8 8 Temperature ( C) Northeast Cutoff, Box 5 Worcester, Massachusetts 5- (58) -5 8
,, Power Derating The device must be operated below the maximum junction temperature of the device, T J(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating T J. (Thermal data is also available on the llegro MicroSystems Web site.) The Package Thermal Resistance, R θj, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, R θjc, is relatively small component of R θj. mbient air temperature, T, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, P D ), can be estimated. The following formulas represent the fundamental relationships used to estimate T J, at P D. P D = V IN I IN () ΔT = P D R θj () Example: Reliability for V CC at T = 5 C, package U, using minimum-k PCB. Observe the worst-case ratings for the device, specifically: R θj = 5 C/W, T J(max) = 5 C, V CC(max) = 5.5 V, and I CC(max) = 8 m. Calculate the maximum allowable power level, P D(max). First, invert equation : ΔT max = T J(max) T = 5 C 5 C = 5 C This provides the allowable increase to T J resulting from internal power dissipation. Then, invert equation : P D(max) = ΔT max R θj = 5 C 5 C/W = 9 mw Finally, invert equation with respect to voltage: V CC(est) = P D(max) I CC(max) = 9 mw 8 m =. V The result indicates that, at T, the application and device can dissipate adequate amounts of heat at voltages V CC(est). Compare V CC(est) to V CC(max). If V CC(est) V CC(max), then reliable operation between V CC(est) and V CC(max) requires enhanced R θj. If V CC(est) V CC(max), then operation between V CC(est) and V CC(max) is reliable under these conditions. T J = T + ΔT () For example, given common conditions such as: T = C, V CC = V, I CC = m, and R θj = C/W, then: P D = V CC I CC = V m = 8 mw ΔT = P D R θj = 8 mw C/W = 7 C T J = T + ΔT = C + 7 C = C worst-case estimate, P D(max), represents the maximum allowable power level (V CC(max), I CC(max) ), without exceeding T J(max), at a selected R θj and T. Northeast Cutoff, Box 5 Worcester, Massachusetts 5- (58) -5 9
,, Package LH, -Pin; (SOT-W)...8..9 NOM.59..7.8..5 [.] M C B B B 8º º..8.8...8..7 Preliminary dimensions, for reference only Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only (reference JEDEC TO- B, except case width and terminal tip-to-tip) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown Hall element (not to scale) B ctive rea Depth.8 [.].9.8 NOM...... X. [.] C SETING PLNE C SETING PLNE GUGE PLNE X.5.... [.8] M C B.95.7.5..7.75.....9.75 Pin-out Drawings Package LH Package U Terminal List Symbol Number Package LH Package U Description VCC Connects power supply to chip VOUT Output from circuit GND Ground Northeast Cutoff, Box 5 Worcester, Massachusetts 5- (58) -5
,, Package U, -Pin SIP..59.7. C D. NOM...58.57.7..7..97.55 NOM. D D B. MX...79 REF... 5..7...5.9..8..5.7 NOM Dimensions in inches Metric dimensions (mm) in brackets, for reference only Dambar removal protrusion (X) B Ejector mark on opposite side C ctive rea Depth.95 [.5] NOM D Hall element (not to scale) The products described herein are manufactured under one or more of the following U.S. patents: 5,5,9; 5,,78; 5,,8; 5,89,889; 5,58,79; 5,57,; 5,9,7; 5,,9; 5,5,79; 5,8,89; 5,9,8; 5,79,; 5,97,; and other patents pending. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. llegro products are not authorized for use as critical components in life-support devices or sys tems without express written approval. The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. Copyright,, Northeast Cutoff, Box 5 Worcester, Massachusetts 5- (58) -5