CSCI 1010 Models of Computa3on. Lecture 02 Func3ons and Circuits

Similar documents
CHAPTER1: Digital Logic Circuits Combination Circuits

Computer Organization I

Digital Circuit And Logic Design I. Lecture 3

CSE20: Discrete Mathematics for Computer Science. Lecture Unit 2: Boolan Functions, Logic Circuits, and Implication

Boolean Algebra, Gates and Circuits

Logic Gate Level. Part 2

Combinational Logic Design Principles

CS 121 Digital Logic Design. Chapter 2. Teacher Assistant. Hanin Abdulrahman

Chapter 2: Switching Algebra and Logic Circuits

Chapter 2. Boolean Algebra and Logic Gates

Chapter 2: Princess Sumaya Univ. Computer Engineering Dept.

Chapter 2 Boolean Algebra and Logic Gates

Chapter 2 Combinational Logic Circuits

Lecture 5: NAND, NOR and XOR Gates, Simplification of Algebraic Expressions

Review: Additional Boolean operations

CS 161: Design and Analysis of Algorithms

EECS150 - Digital Design Lecture 19 - Combinational Logic Circuits : A Deep Dive

Standard Expression Forms

MC9211 Computer Organization

Chap 2. Combinational Logic Circuits

Functions. Computers take inputs and produce outputs, just like functions in math! Mathematical functions can be expressed in two ways:

Hardware Design I Chap. 2 Basis of logical circuit, logical expression, and logical function

CHAPTER 12 Boolean Algebra

E&CE 223 Digital Circuits & Systems. Lecture Transparencies (Boolean Algebra & Logic Gates) M. Sachdev

CSCI 1010 Models of Computa3on. Lecture 11 Proving Languages NP-Complete

XI STANDARD [ COMPUTER SCIENCE ] 5 MARKS STUDY MATERIAL.

Chapter 2: Boolean Algebra and Logic Gates

II. COMBINATIONAL LOGIC DESIGN. - algebra defined on a set of 2 elements, {0, 1}, with binary operators multiply (AND), add (OR), and invert (NOT):

Boolean Algebra. Philipp Koehn. 9 September 2016

Chapter-2 BOOLEAN ALGEBRA

Combinational Logic Fundamentals

Lecture #14: NP-Completeness (Chapter 34 Old Edition Chapter 36) Discussion here is from the old edition.

Lecture 2 Review on Digital Logic (Part 1)

Chapter 2 Combinational Logic Circuits

CS 226: Digital Logic Design

Every time has a value associated with it, not just some times. A variable can take on any value within a range

CS61c: Representations of Combinational Logic Circuits

2009 Spring CS211 Digital Systems & Lab CHAPTER 2: INTRODUCTION TO LOGIC CIRCUITS

Boolean Algebra. Examples: (B=set of all propositions, or, and, not, T, F) (B=2 A, U,, c, Φ,A)

Midterm1 Review. Jan 24 Armita

UC Berkeley College of Engineering, EECS Department CS61C: Representations of Combinational Logic Circuits

CSCI 1590 Intro to Computational Complexity

E&CE 223 Digital Circuits & Systems. Lecture Transparencies (Boolean Algebra & Logic Gates) M. Sachdev. Section 2: Boolean Algebra & Logic Gates

Contents. Chapter 2 Digital Circuits Page 1 of 30

EEA051 - Digital Logic 數位邏輯 吳俊興高雄大學資訊工程學系. September 2004

UNIVERSITI TENAGA NASIONAL. College of Information Technology

Boolean Algebra CHAPTER 15

Boolean Algebra and Logic Gates

Signals and Systems Digital Logic System

In Module 3, we have learned about Exclusive OR (XOR) gate. Boolean Expression AB + A B = Y also A B = Y. Logic Gate. Truth table

Lecture 6: Manipulation of Algebraic Functions, Boolean Algebra, Karnaugh Maps

Ch 2. Combinational Logic. II - Combinational Logic Contemporary Logic Design 1

Chapter 2 Boolean Algebra and Logic Gates

Chapter 2 Boolean Algebra and Logic Gates

Chapter 2 : Boolean Algebra and Logic Gates

EC-121 Digital Logic Design

1. Name the person who developed Boolean algebra

Logic Design. Chapter 2: Introduction to Logic Circuits

Review for Test 1 : Ch1 5

Combinational Logic. Review of Combinational Logic 1

ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN. Week 2 Dr. Srinivas Shakkottai Dept. of Electrical and Computer Engineering

Part 5: Digital Circuits

Combinatorial Logic Design Principles

BOOLEAN ALGEBRA TRUTH TABLE

Boolean Algebra & Logic Gates. By : Ali Mustafa

This form sometimes used in logic circuit, example:

CHAPTER 2 BOOLEAN ALGEBRA

Chapter 2 (Lect 2) Canonical and Standard Forms. Standard Form. Other Logic Operators Logic Gates. Sum of Minterms Product of Maxterms

1. Prove: A full m- ary tree with i internal vertices contains n = mi + 1 vertices.

Week-I. Combinational Logic & Circuits

Gate-Level Minimization

ELC224C. Karnaugh Maps

Number System. Decimal to binary Binary to Decimal Binary to octal Binary to hexadecimal Hexadecimal to binary Octal to binary

Digital Logic Design. Malik Najmus Siraj

Review. EECS Components and Design Techniques for Digital Systems. Lec 06 Minimizing Boolean Logic 9/ Review: Canonical Forms

Circuits & Boolean algebra.

Systems I: Computer Organization and Architecture

Chapter 2 Combinational Logic Circuits

Digital Systems and Information Part II

211: Computer Architecture Summer 2016

Propositional Logic. Logical Expressions. Logic Minimization. CNF and DNF. Algebraic Laws for Logical Expressions CSC 173

Section 4.1 Switching Algebra Symmetric Functions

Chapter 2 Boolean Algebra and Logic Gates

Digital Logic Design. Combinational Logic

CS206 Lecture 03. Propositional Logic Proofs. Plan for Lecture 03. Axioms. Normal Forms

control in out in out Figure 1. Binary switch: (a) opened or off; (b) closed or on.

Unit 2 Session - 6 Combinational Logic Circuits

Possible logic functions of two variables

If f = ABC + ABC + A B C then f = AB C + A BC + AB C + A BC + A B C

CS Introduction to Complexity Theory. Lecture #11: Dec 8th, 2015

Chapter 2 Combinational Logic Circuits

WEEK 2.1 BOOLEAN ALGEBRA

Digital Logic. Lecture 5 - Chapter 2. Outline. Other Logic Gates and their uses. Other Logic Operations. CS 2420 Husain Gholoom - lecturer Page 1

Total Time = 90 Minutes, Total Marks = 50. Total /50 /10 /18

Combinational logic. Possible logic functions of two variables. Minimal set of functions. Cost of different logic functions.

EECS Variable Logic Functions

Unit 2 Boolean Algebra

Discrete Mathematics. CS204: Spring, Jong C. Park Computer Science Department KAIST


Boolean Algebra and Logic Gates Chapter 2. Topics. Boolean Algebra 9/21/10. EECE 256 Dr. Sidney Fels Steven Oldridge

Transcription:

CSCI 1010 Models of Computa3on Lecture 02 Func3ons and Circuits

Overview Func3ons and languages Designing circuits from func3ons Minterms and the DNF Maxterms and CNF Circuit complexity Algebra of Boolean expressions Illustra3on using the Full Adder Dual rail logic John E. Savage CSCI 1010 Lect 02 2

Mathema3cal Preliminaries The Cartesian product A B of two sets is the set of pairs, the first from A, the second from B. If A = {0,1}, B = {2,3}, A B = {02, 03, 12, 13} The n-fold Cartesian product of a set A with itself is denoted A n. E.g. A 3 = {0,1} 3 = {000,001,010,011, } If a, b are in A, a b denotes the string ab in A B. The opera3on is called concatena3on. The empty string ϵ sa3sfies a ϵ = a, ϵ a = a. John E. Savage CSCI 1010 Lect 02 3

Mathema3cal Preliminaries The Kleene star A * = {ϵ} U A U A 2 U A 3 U, that is, the set of strings of all lengths including the empty string. {0,1} * = {ϵ, 0, 1, 00, 01, 10, 11, 000, 001, } John E. Savage CSCI 1010 Lect 02 4

Languages A language is a set of strings over an alphabet. A language L over the alphabet A sa3sfies L A *, that is, L is a subset of A *. Examples of languages The set of 10-bit binary strings (in {0,1}) with an odd number of 1s is a subset of {0,1} 10. The strings that form acceptable Pascal programs. John E. Savage CSCI 1010 Lect 02 5

Boolean Func3ons A Boolean func3on f : {0,1} k {0,1} f has k inputs and one output. f(x 1, x 2,, x k ) is the value of f on inputs x 1, x 2,, x k Standard Boolean func3ons: AND on two binary inputs, f AND (x,y) = x ᴧ y OR on two binary inputs, f OR (x,y) = x v y EXOR on two binary inputs, f EXOR (x,y) = x y NOT on one binary input, f NOT (x) = x or f NOT (x) = x John E. Savage CSCI 1010 Lect 02 6

Languages and Func3ons Let f : {0,1} k {0,1} The k-tuples x for which f(x) = 1 is a language They form a subset of the strings in {0,1} k. Given a language L A *, there is a natural characteris3c func3on f L : A * {0,1} associated with the language L. If x is in L, f L (x) = 1. If x is not in L, f L (x) = 0. John E. Savage CSCI 1010 Lect 02 7

Logic Circuits and Func3ons A logic circuit is a directed acyclic graph (DAG) in which node labels are Boolean func3ons. g 7 := g 5 v g 6 ; g 5 := g 1 ᴧ g 4 ; g 6 := g 3 ᴧ g 2 ; g 4 := g 2 ; g 3 := g 1 ; g 1 := x; g 2 = y The output func3on is g 7 = x y How would you show this? John E. Savage CSCI 1010 Lect 02 8

Straight-Line Programs A straight-line program (SLP) is a program that has no branching or looping. An SLP can use arithme3c or Boolean opera3ons A Boolean SLP is an SLP in which the opera3ons are Boolean. The graph of a Boolean SLP is a circuit. The graph is directed and acyclic (a dag) John E. Savage CSCI 1010 Lect 02 9

Boolean Straight-Line Program (1 READ x) (2 READ y) (3 NOT 1) (4 NOT 2) (5 AND 1 4) (6 AND 3 2) (7 OR 5 6) Nota3on: (r OP s t) g r := g s OP g t This SLP computes the Exclusive OR of x and y: g 7 = x y = (x y) (x y) John E. Savage CSCI 1010 Lect 02 10

Compu3ng Mul3-Output Func3ons Computes f : {0,1} 3 {0,1} 2, f(x,y,z) = (c,s) This Full Adder uses AND, OR, XOR carry sum X Y Z C S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 is Exclusive OR John E. Savage CSCI 1010 Lect 02 11

Designing Circuits From Func3ons Consider binary func3on g : {0,1} n {0,1} m with m outputs. It can be viewed as m func3ons, that is, g = (f 1,f 2,, f m ) where f j : {0,1} n {0,1} are Boolean func3ons. We can realize each f j separately by a circuit or find common sub-circuits to reduce number of gates (opera3ons). John E. Savage CSCI 1010 Lect 02 12

Designing Circuits From Func3ons Start by realizing one-output func3ons f(x 1,,x n ) A literal is a variable (x j ) or its complement (the NOT of the variable) (x j ) A minterm is the AND of one literal for each variable of a func3on. E.g. x 1 x 2 x n A minterm = 1 exactly when each literal = 1. E.g. x 1 = 0, x 2 = 1,, x n = 0. It has value 0 on 2 n -1 inputs. John E. Savage CSCI 1010 Lect 02 13

Designing Circuits From Func3ons Construct circuit for f : {0,1} n {0,1} by forming the OR of those minterms in the inputs to f for which f has value 1. E.g. c = xyz xyz xyz xyz X Y Z C Minterm expansions can oqen 0 0 0 0 0 0 1 0 be simplified. 0 1 0 0 E.g. c = xy xz yz 0 1 1 1 1 0 0 0 Tables offer clear (but long) way 1 0 1 1 to show func3onal equivalence. 1 1 0 1 1 1 1 1 output John E. Savage CSCI 1010 Lect 02 14

Disjunc3ve Normal Form The minterm expansion is also called the disjunc3ve normal form (DNF). Disjunct is an old word for OR. Defini3on: The DNF is the OR of minterms corresponding to the inputs for which a Boolean func3on has value 1. Why does a formula compute the func3on? John E. Savage CSCI 1010 Lect 02 15

Maxterms The maxterm of a Boolean func3on is the OR of one literal for each variable of the func3on. E.g. x y z A maxterm is 1 except when all literals are 0. E.g. The above maxterm is 0 when x = 1, y = 1, and z = 0. It has value 1 on 7 of the 8 inputs! X Y Z C 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 John E. Savage CSCI 1010 Lect 02 16

Conjunc3ve Normal Form The conjunc3ve normal form (CNF) of func3on f is the AND of the maxterms for which f = 0. Conjunct is an old word for AND. John E. Savage CSCI 1010 Lect 02 17

CNF Example The CNF of f is 1 except where maxterms = 0. E.g. c = (x y z ) (x y z) (x y z) (x y z) The CNF can oqen be simplified. E.g. c = (x y) (x z) (y z) = 0 if 2 or more inputs are 0 X Y Z C 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 John E. Savage CSCI 1010 Lect 02 18

Circuit Complexity Given a binary func3on f : {0,1} n {0,1} m its circuit size, denoted C Ω (f), is the size of the smallest circuit (fewest gates) drawn from the basis Ω. A basis Ω is complete if every binary func3on can be realized by a circuit with gates from Ω. Ω = {AND, OR, NOT} is complete. Ω = {AND, EXOR} and Ω = {NAND} are complete. John E. Savage CSCI 1010 Lect 02 19

Compu3ng Circuit Size For complete bases the circuit size changes by a mul3plica3ve factor when the basis changes. Why is this statement true? It is hard to compute C Ω (f) for arbitrary func3on f. Thus, we compute upper and lower bounds. Best approach: enumerate circuits contain k gates, star3ng at k = 0, un3l we find a circuit compu3ng f. Courses are taught on circuit complexity! John E. Savage CSCI 1010 Lect 02 20

Monotone Func3ons A func3on f : {0,1} n {0,1} m is monotone if its none of its outputs decreases when an input is increased from 0 to 1. Not all func3ons are monotone. NOT is not monotone Monotone func3ons can be realized over the basis {AND, OR}, which is not complete. Adding NOT this basis can greatly reduce circuit size of a monotone func3on. John E. Savage CSCI 1010 Lect 02 21

The Algebra of Boolean Expressions Commuta3vity Absorp3on Rules x y = y x, x x = x, x x = 1 x y = y x Distribu3vity x x = x, x x = 0 1. x (y z) = (x y) (x z) (AND distributes over OR) 2. x (y z) = (x y) (x z) (OR distributes over AND) E.g. simplify (a b c) (a b c) Let x = (a b) and apply rule 1. (a b c) (a b c) = (x c) (x c) = x (c c) = x = (a b) John E. Savage CSCI 1010 Lect 02 22

The Algebra of Boolean Expressions DeMorgan s Rules x y = x y x y = x y Exclusive OR defini3on x y = (x y) (x y) Exclusive OR expansion (= 1 if 1 or 3 inputs = 1) x y z = x (y z)= (x (y z)) (x (y z)) = (x ((y z) (y z))) (x ((y z) (y z))) ((y z) (y z)) = (y z) (y z) = (y z) (y z) = (y y) (y z) (z y) (z z)=(y z) (z y) x y z = (x y z) (x y z) (x y z) (x y z) John E. Savage CSCI 1010 Lect 02 23

Full Adder s = x y z c = = xy xz yz X Y Z C S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 The formulas use 7 binary opera3ons. The above circuit uses only 5! John E. Savage CSCI 1010 Lect 02 24

Implica3on Boolean Operator Implica3on is wriyen x y. It is interpreted, if x is True, then y is cannot be False. The truth table for z = x y is shown below. Formula for implica3on over {AND, OR, NOT}? X Y Z 0 0 1 0 1 1 1 0 0 1 1 1 John E. Savage CSCI 1010 Lect 02 25

Dual Rail Logic Instead of represen3ng a truth value by a literal x, let s represent it by (x,x). Thus, True and False are represented by (0,1) and (1,0). How is AND represented in this new system? How about OR and NOT? What does a circuit look like? John E. Savage CSCI 1010 Lect 02 26

Dual Rail Logic AND: Inputs (x,x) and (y,y). Output (z,z) where z = x y and z = x y. OR: Inputs (x,x) and (y,y). Output (z,z) where z = x y and z = x y. NOT: Input (x,x), output (z,z) where z = x, z = x. Thus, flip the inputs. AND, OR, NOT circuit can be converted to dual rail by doubling AND, OR gates, dropping NOTs John E. Savage CSCI 1010 Lect 02 27

Review Func3ons and languages Designing circuits from func3ons Minterms and the DNF Maxterms and CNF Circuit complexity Algebra of Boolean expressions Illustra3on using the Full Adder Dual rail logic John E. Savage CSCI 1010 Lect 02 28