BEOL-investigation on selfheating and SOA of SiGe HBT

BEOL-investigation on selfheating and SOA of SiGe HBT Rosario D Esposito, Sebastien Fregonese, Thomas Zimmer To cite this version: Rosario D Esposito, Sebastien Fregonese, Thomas Zimmer. BEOL-investigation on selfheating and SOA of SiGe HBT. 28th BipAK 2016, Nov 2016, Munich, Germany. <hal-01399956> HAL Id: hal-01399956 https://hal.archives-ouvertes.fr/hal-01399956 Submitted on 21 Nov 2016 HAL is a multi-disciplinary open access archive for the deposit and dissemination of scientific research documents, whether they are published or not. The documents may come from teaching and research institutions in France or abroad, or from public or private research centers. L archive ouverte pluridisciplinaire HAL, est destinée au dépôt et à la diffusion de documents scientifiques de niveau recherche, publiés ou non, émanant des établissements d enseignement et de recherche français ou étrangers, des laboratoires publics ou privés.

BEOL-investigation on selfheating and SOA of SiGe HBT R. D Esposito, S. Fregonese, T. Zimmer BipAk, Infineon Munich November 24-25, 2016

Outline SiGe HBTs for THz applications Thermal issues in state of the art SiGe HBTs Technologies under study: IFX B11HFC and ST B55 Characterization of BEOL impact in single finger HBTs (IFX B11HFC) Physical modeling of the BEOL impact (IFX B11HFC) Impact of BEOL and transistor layout in multifinger HBTs (ST B55) Conclusions & future perspectives 2

Temperature issues in SiGe HBTs High speed performances till sub-thz range DTI (poor thermal conductivity) aggressive shrink of the active part high current densities high internal electric fields at the BC junction http://users.ece.gatech.edu/cressler/ can be modeled as a heat source Serious thermal issues due to self-heating shift and deterioration of the DC and AC characteristics eventually device failure positive electro-thermal feedback => electro-thermal loop 3

Scaling and high integration consequences Device level: Circuit level: multifingered Scaling increases performances, but leads to higher higher J C and density of architectures thus to higher power densities components INTER-DEVICE thermal coupling INTRA-DEVICE thermal coupling Hot-spot formation Device failure Degradation of the expected performances Pascal Chevalier, 55nm SiGe BiCMOS for Optical, Wireless and High-Performance Analog Applications EuMW2015 4

Effect of SH on device behavior:hicum simulations A high value of Rth has a negative impact on the DC beavior: it leads to IC instability A high Rth decreases the ft and fmax figures of merit 5

Technologies under study: IFX B11HFC feature size f T f MAX BV CBO BV CEO 130nm 250GHz 370GHz 5.5V 1.5V 7 BEOL metals 4 thin Cu 2 thick Cu 1 Alu for pads 7

Technologies under study: ST B55 feature size f T f MAX BV CBO BV CEO 55nm 320GHz 370GHz 5.2V 1.5V 9 BEOL metals 5 thin Cu 2 medium Cu 1 thick Cu 1 Alu for pads 8

BEOL metallization evolution Evolution over time of a CMOS technology node The dimensions of the active part of the transistors decreases The complexity of the BEOL increases Akira Tsuchiya (Kyoto University, Japan) 9

Scenario of the thermal impact of the BEOL Thermal conductivity FEOL Si 1.54 W/cm K B E O L Metal connects BEOL Si0 2 0.014 W/cm K BEOL Cu 3.85 W/cm K Can the heat generated at the BC junction be dissipated through the metal stacks above it? How much the impact of the added metals on the behaviour of the component? F E O L Is it possible to model this effect to take it into account into circuit simulator? HEAT SOURCE: BC junction 10

Test structures to evaluate BEOL impact narr test set: Minimum volume of metal added wide test set: More volume of metal added The metal dummies do not change the electrical connections: emitter is grounded at metal-1 level 0.34µm E4narr E3narr E2narr B1E1 1.52µm 1.02µm 0.64µm E4wide E3wide E2wide M1 Metal added upon the base contacts 1.30µm 1.30µm B3 B2 C B E B C C B E B C C B E B C B1E1: reference test structure 12

Test structures for evaluation of the BEOL impact E2narr E3narr E4narr A E =(0,34x5) µm 2 E2wide E3wide E4wide B2 B3 13

Test structure R th [K/W] ΔR th % B1E1 3300 0.0% E4narr 3240 1.9% E4wide 3160 4.4% B3 3210 2.8% V BE =0.83V; V CE =0.5V Output curves Test structure ΔI C % B1E1 0.0% E2narr 1.8% E3narr 2.5% E4narr 3.4% E2wide 5.5% E3wide 9.0% E4wide 10.0% B2 10.2% B3 15.8% ΔI C % increases if the volume of metal increases; if metal is added to base contacts effect is stronger 14

Measured f T and f MAX figures of merit de-embedding using the same OPEN and SHORT structures V CE =1.5V No deterioration in the small signal RF figures of merit is measured A sensible increment of f T and f MAX can be observed 15

Test structures for compact modeling of the BEOL impact A E =(0,22x5) µm 2 M1 test structure M6 test structure Electrical connections are unaltered among the two structures 17

M1 test structure and schematic representation of the Rth M1 test structure M1 M1 M1 M1 M1 C B E B C HEAT SOURCE: BC junction Rth of the BEOL part is just given by oxide (very high value, P d BEOL is negligible) Total Pd can be approximated by just the Pd of the lower part 18

M6 test structure and schematic representation of the Rth M6 M6 test structure M1 M1 M1 M1 C B E B C HEAT SOURCE: BC junction metallization reduces the overall Rth of the BEOL part and helps vehicle P d BEOL upwards Total P d is now split in 2 branches: one flows in the lower part and the other in the BEOL part 19

DC measurements on M1 and M6 (output curves) DC current lowers for M6 in the high power dissipation region (Vbe~900mV) due to lower Rth (~10% variation) => better thermal stability 20

DC measurements and thermal network simulated in HiCuM 4.0KΩ T 70.0KΩ M6 Pd M1 M1 M1 M1 T BEOL part lower part C B E B C Pd 4.0KΩ M1 test structure Rth for M1 test structure is verified with dedicated on-wafer measurements HEAT SOURCE: BC junction lower part M6 test structure Equivalent Rth drops from 4.0k to 3.78k (-5.5%) 21

Zth extraction using low frequency S-parameters measurements Z TH di dt c j I c Y V 22 _ meas ce Y Y 22 _ meas 22 _ iso V be Y 12 _ iso Y 22 is sensible to dynamic self heating and used for Zth calculation Y 22 that would be theoretically measured if there were no selfheating effects in the component Rinaldi, Small-signal operation of semiconductor devices including self-heating, with application to thermal characterization and instability analysis TED 2001 22

Low frequency Y 22 measurements Thermal Network in HiCuM compact model Vbe=0.90V Vce=1.5V Adding metal dummies in the BEOL changes the Y 22 in the range DC 2~6MHz Thermal diffusion is a distributed phenomenon: an infinite number of RC poles is theoretically needed Measured Y 22 in the range 10kHz 500MHz shows three main slopes 23

Proposed thermal network to take into account distributed Zth Rth BEOL1 Rth BEOL2 Rth BEOL3 BEOL thermal network T Cth BEOL1 Cth BEOL2 Cth BEOL3 Rth k jn n r R j Pd Cth k jn n c C j Rth A Cth A Rth B Cth B Rth C Cth C k k r c 1 1 Lower part thermal network (FEOL up to metal-1) D Esposito, S. Fregonese, A. Chakravorty and T. Zimmer, Dedicated test-structures for investigation of the thermal impact of the BEOL in advanced SiGe HBTs in time and frequency domain ICMTS 2016 24

Thermal model for the M1 test structure Rth BEOL1 Rth BEOL2 Rth BEOL3 T Cth BEOL1 Cth BEOL2 Cth BEOL3 BEOL part is neglected for the M1 test structure Pd 4k 1.7k Rth A Rth 1.3k B Rth 1k C Cth 3.6p A Cth 31p B Cth 279p C this thermal network takes into account the thermal effect of the FEOL and of the BEOL till metal 1 M1 M1 M1 M1 M1 Same Rth than DC case is used, but cut into 3 parts C B E B C HEAT SOURCE: BC junction 25

Thermal model for the M6 test structure Rth BEOL1 Rth BEOL2 Rth BEOL3 47k 17k 6k 70k Pd 40 mw T 4mW 36mW 500f 1.1n 2.3µ Cth BEOL1 Cth BEOL2 Cth BEOL3 2 nd and 3 rd poles have very high capacitances (big metal volume added) 1.7k Rth A 1.3k Rth B 1k Rth C 4k M1 M1 M6 M1 3.6p Cth A 31p Cth B 279p Cth C M1 the thermal network of the lower part is kept the same as M1 C B E B C HEAT SOURCE: BC junction 26

Y 22 parameter simulated in HiCuM Y 22 (db) -40-50 -60 V BE =0.90V V CE =1.5V -70-80 M1 meas M1 sim M6 meas M6 sim 10k 100k 1M 10M 100M frequency (Hz) The Y 22 versus frequency is fit nicely for the 2 test structures under study using the proposed thermal networks 27

Thermal unbalances in multifinger devices (ST B55) Thermal coupling in multifinger HBTs: 1) unbalanced temperature distribution 2) hotspot formation 3) current hogging 4) device instability 5) device failure 29

Proposed alternative finger layouts: HL structures Reference structure: VM3 (active part is unaltered) Increased cross section surface for power dissipation Enlarged DTI HL1 Non-uniform finger length HL2 Lower power dissipated on the central fingers Emitter segmentation HL3 30

VM structures to evaluate the BEOL impact in multifingers VM8 dummies till metal-8 VM6 dummies till metal-6 VM3 reference test structure VM1 just metal-1 is present M8 M8 M8 M8 M8 M6 M3 M6 M6 M6 M6 M3 M3 M3 M3 M1 M1 M1 M1 M1 E E E E E The active part of the transistor is not modified, just heat spreaders are added Electrical connections are unaltered among the different transistor structures 31

3D representation of the BEOL test structures 5xCBEBEBC architecture VM8 test structure Metal dummies connected upon emitter contacts (VM8) Base connections Collector connections Emitter metallization till metal-3: connected to ground plane 32

I C (ma) I C (ma) Output curves VM test structures HL test structures 140 120 100 40 35 30 VM1 VM3 VM6 VM8 80 60 25 0.4 0.6 0.8 (V) V CE 40 20 0.4 0.6 0.8 1.0 1.2 1.4 (V) V CE Adding metal heatspreaders above the emitters lowers the slope of I C in the high Pdiss region The increase of the DTI enclosed area allows an even lower slope The slope of J C is even lower for the devices with reduced A E Emitter segmentation yields the best electro-thermal performances R. D Esposito, S. Frégonèse, A. Chakravorty, P. Chevalier, D. Céli and T. Zimmer, "Innovative SiGe HBT topologies with improved electro-thermal behavior", TED 2016 33

Thermal impedance metal-6 C B E B C metal-3 metal-1 M1 M8 M6 M3 metal-6 metal-3 M1 M1 M1 metal-1 At low frequency the DTI limits Going from high to low frequencies, the temperature the thermal variations. oscillations penetrate tillifhigher it is wider, metal or levels. if the emitters are When the temperature variations smaller => will lower reach Zthmetal-1, there will be a split between the Zth of VM1 and VM3 34

Conclusions: BEOL impact E4wide E3wide E2wide M1 C B E B C Mechanical stress Decrease of Rth Stabilizing effect for I C Better RF performances The metallization helps to evacuate the heat generated by the transistor The metal volume slows down the thermal response and keeps the temperature more stable These effect can be modeled on a physical base and simulated 36

4mW T Conclusions: layout modifications 70.0KΩ BEOL part Modifications in the transistor layout have a stronger electro-thermal impact (DTI enlargement, emitter segmentation) Pd 36mW 4.0KΩ lower part In AC the temperature sinusoidal variations penetrate the transistor till different depths according to the frequency Changes in the transistor layout mostly induce Zth variations at very low frequencies 37

Acknowledgements Thanks to XMOD Technologies for supplying the compact model parameters Thanks to STMicroelectronics for the B55 wafers Thanks to Infineon Technologies for the B11HFC wafers This work received funding from the European Union s Seventh Program for research, technological development and demonstration under grant agreement n 316755 (FP7 DOTSEVEN) as well as from the Rf2THz project. 38

Thank you for your attention! 39