E2.2 Analogue Electronics

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E2.2 Analogue Electronics Instructor : Christos Papavassiliou Office, email : EE 915, c.papavas@imperial.ac.uk Lectures : Monday 2pm, room 408 (weeks 2-11) Thursday 3pm, room 509 (weeks 4-11) Problem, Quizzes: Thursday 4pm, room 408 (weeks 3-4, 7-11) Office hours: Tuesday 11am Thursday 10 am Office hours start week 3 (week of 1910/09) Course website: on blackboard (or on my home page) Imperial College London EEE 1

What analogue electronics is Engineering, i.e. the analysis (study and reverse engineering) and synthesis ( design ) of circuits: Amplifiers, Filters, Oscillators Radio Multipliers (Modulators Demodulators) Analogue signal processing (e.g. rectifiers, logarithmic amplifiers) Fast Digital gates (!) Applications: Communications, Signal Processing, Control, Instrumentation, Areas of human activity: Industrial, Consumer, Biomedical, Imperial College London EEE 2

analogue electronics is not only CMOS integrated circuits Transistor circuits Op-amp circuits Audio electronics Mobile phone circuits Radars Printed circuit board design Integrated circuit design Television set repair In fact, it is all of the above, and much more. Restricting our point of view to one of these will make understanding the topic more difficult. Imperial College London EEE 3

Course Aims Learn to analyse electronic circuits Analysis is prerequisite to: DESIGN (including Integrated Circuit design) APPLICATION (including repair) Analysis is performed through modelling: ABSTRACTION: replace groups of components with one symbol SIMPLIFICATION but NOT oversimplification MATHEMATICS (is a language, not a torture device!) The inverse of ANALYSIS is SYNTHESIS (i.e. DESIGN!) The course is closely connected to two other 2 nd year courses: Control Theory Signal processing because circuits are used to implement control and signal processing AND because without their methods circuit analysis is not possible (except in trivial cases) Imperial College London EEE 4

Imperial College London EEE 5

Imperial College London EEE 6

Prerequisites Analysis of circuits: Kirchhoff's laws,nodal Analysis,Thevenin and Norton Theorems, Phasors, Frequency and step Response of RC circuits, DC opamp circuits: Inverting and Non-Inverting Amplifiers. Analogue electronics: Static I-V characteristics of BJT and FET transistors Small signal models of BJT and FET transistors Single Stage Transistor amplifiers with BJT, FET Maths: Differentiation, Integration Second order Ordinary differential Equations Complex numbers Fourier transforms Imperial College London EEE 7

References These slides Main Course text: Sergio Franco: Design with Operational Amplifiers and Analog Integrated Circuits, McGraw Hill Any book in analogue electronics you like. There are many! e.g. Sedra and Smith, Microelectronic Circuits, Oxford U. Press The best general reference in electronics (but not the best to learn from): Horowitz and Hill, The Art of Electronics, Cambridge U. Press. Imperial College London EEE 8

Workload Direct workload: 17 lectures 8 problem sessions starting on week 3 1 problem sheet/week Assessment: final exam : 2 hours long (100% of the marks) Indirectly related lab work Imperial College London EEE 9

The tools of the trade Kirchhoff's Current Law (KCL) nodal analysis Kirchhoff's Voltage Law (KVL) mesh analysis (difficult!) Ohm s Law Idealised Resistors and conductors Phasor analysis (i.e. Fourier transform): Capacitors, Inductors Modeling: large signal analysis small signal analysis Approximations: Thevenin and Norton Theorems Bode Plots All of the above, and more, is implemented in simulators: eg. SPICE Mathematics! Imperial College London EEE 10

Circuit Components Independent Sources Voltage, Current Dependent Sources Voltage Controlled (Voltage, Current) Source: VCVS and VCCS Current Controlled (Voltage, Current) Source: CCVS and CCCS Resistors Capacitors, Inductors, transformers Diodes, Transistors Bipolar Junction (BJT): NPN, PNP Field Effect (FET): n-channel, p-channel, JFET, MOSFET Operational amplifiers Imperial College London EEE 11

Computer simulation: SPICE Written at the University of California Berkeley User inputs netlist, ie a list of components connecting nodes The netlist is a way of writing the admittance matrix! Schematic capture is a GUI producing netlists User specifies one or more types of analysis to be performed: DC bias AC small signal Transient Component sensitivity Commercial versions: very expensive, confusingly complicated! Free packages (with schematic, on the web; grab one!): 5Spice: http://www.5spice.com (schematic capture, includes WinSpice) SIMetrix: www.catena.uk.com/ (complete package) LT Spice : http://www.linear.com/designtools/software/switchercad.jsp History of SPICE: http://www.ecircuitcenter.com/spicetopics/history.htm Imperial College London EEE 12

Resistors, Conductors, Capacitors, Inductors V = IR, I = GV Ohm s law can be written in two ways: Clearly R=1/G This is useful in simplifying circuits: Resistors in series: Rtotal = R1+ R2 R1R 2 Resistors in parallel: G NOT: total = G1+ G R 2 total = R Some standard terminology: 1+ R2 Impedance Z: Z = R+ jx (R: Resistance, X: Reactance) Admittance Y: Y = G+ jb (G: Conductance, B: Susceptance) Immitance: Impedance and Admittace considered together Note that: Capacitor: BC = ωc; The capacitor is naturally a susceptor Inductor: XL = ωl; The inductor is naturally a reactor Nodal analysis is easier if we treat components as admittances Nodal equations and the admittance matrix Imperial College London EEE 13

Any part of a circuit with 2 external terminals can be replaced by a Thevenin equivalent circuit. Entire networks with 2 terminals can considered to be a single component The Thevenin voltage source may be a: Fixed voltage source Voltage controlled voltage source Current controlled voltage source Note that V L =V T Z L / (Z T + Z L ) In real life, Z T is never zero! The Thevenin Theorem The Thevenin theorem is a Taylor expansion of V(I) about the operating point V 0, I 0 (if the expansion exists!) Imperial College London EEE 14

The Norton Theorem Any part of a circuit with 2 external terminals can be replaced by a Norton equivalent circuit. Entire networks with 2 terminals can considered to be a single component The Norton current source may be a: Fixed current source Voltage controlled current source Current controlled current source Note that I L =I N Y N / (Y N + Y L ) In real life, Y N is never zero! The Norton theorem is a Taylor expansion of I(V) about the operating point V 0, I 0 (if the expansion exists!) Imperial College London EEE 15

Thevenin and Norton special cases A Thevenin equivalent circuit with: zero Thevenin impedance is an ideal voltage source infinite Thevenin impedance is an ideal current source If the magnitude of the Thevenin impedance is larger than the magnitude of the load impedance connected to it we usually prefer to model the component using a Norton equivalent circuit A Norton equivalent circuit with: zero Norton admittance is an ideal current source infinite Norton admittance is an ideal voltage source If the magnitude of the Norton admittance is larger than the magnitude of the load admittance connected to it we usually prefer to model the component using a Thevenin equivalent circuit Imperial College London EEE 16

The Thevenin equivalent of a voltage divider Think of the series element as an impedance Z(s) Think of the shunt element as an admittance T(s) Both Z and Y are arbitrary functions of frequency s=jw Thevenin voltage is the value of the voltage divider: V IN Z(s) V T Z T V V IN = + Z sy s T Y(s) 1 ( ) ( ) Thevenin impedance is the parallel combination of Z an Y: Z T These forms are easy to remember! ( ) ( ) ( ) V oc V V Z s = = = Isc 1+ Z( s) Y( s) Z( s) 1+ Z s Y s Imperial College London EEE 17

Ladder networks First Cauer form Second Cauer form L1 L2 L3 Ln C1 C2 Cn C1 L1 C2 L2 C3 Cn Ln (a) (b) When they are made of L and C they are called canonical filters or Cauer forms. They are the most efficient filter implementations. Start from left do a sequence of Thevenin and Norton transformations NEVER do nodal analysis if components are RLC both the Thevenin voltage and Thevenin impedance are ratios of polynomials in frequency Imperial College London EEE 18

Small Signal and Large Signal models Large Signal I V OC =V T I Small Signal: V OC =V T V I SC =I N V G N =1/R T I SC =I N G N =1/R T Model is secant on the IV curve The following relations are always valid: R V T = 1/ G = I R T N T Model is tangent on the IV curve Most circuits (except of ideal sources) have both Thevenin and Norton equivalents Unless we say otherwise, we are only concerned with small signal equiv. circuits. N Imperial College London EEE 19