DODE CRCUTS 1 DC and low-frequency diode models 2 The diode-resistance circuit 3 Peak and power detectors 4 Rectifiers 5 Thermal sensor 1
deal diode model R E + - 10 10 kω D + D - D = E R D D = 10 10k Ω A A "On" "Off" A D = 1mA "Short" Circuit "Open" Circuit C C C 2
Constant-voltage-drop model Constant-voltage-drop + resistance model i D i D (a) v D (b) on 10 + - 10 kω = D + - D = 0.6 on = 10 0.6 10 k Ω = 0.94 ma (c) What if the input voltage is 1? 0.1? 3
Graphical analysis D (A) R 2.000e-3 1.800e-3 E + - 10 10 kω + D D - Diode Current (A) 1.600e-3 1.400e-3 1.200e-3 1.000e-3 8.000e-4 6.000e-4 Q-Point Load Line D = E R D 4.000e-4 2.000e-4 0.000e+0 0 1 2 3 4 5 Diode oltage () Diode i-v characteristic and load line 6 D (olt) 4
Half-wave rectifier circuit: resistive load D 1 15 10 nput oltage + - i D v = P sin ω t S R oltage () 5 0 Output oltage Output oltage -5 Simplified analysis S on Diode is ON S > on Diode is OFF O O = S -10-15 0.000 0.005 0.010 Time (sec) f P = 10 and on = 0.7 nput oltage 0.015 0.020 f p >> on on S i i D = 1 π Dmax = p R p R P = p ( average value ) 5
R E + - 10 10 kω + D D - f you know, it is simple to calculate E E = R + nφt ln + 1 S Example: R= 10 kω, S =1 na, nφ t = 50 m As you can see, for this specific example the resistor does not play an important role for current less than 1 µa whereas the diode voltage drop is small for currents greater than, say, 1 ma. / S E (m) 0 0 1 50 ln2 9 50 ln10 10 3 10+50 ln10 3 10 6 10 4 + 50 ln10 6-0.5-50 ln2-0.9-50 ln10-1 - -9??????? 6
i D + v D - φ t = kt/q v D id = S exp 1 nφt φt 25 m @ 290 K n 1 to 1.5 Diode Current (A) 0.0-0.2 S -0.1 0.0 Diode oltage () 0.1 n an C implementation, most diodes (or diode-connected MOSFETs) can be represented by Shockley equation. S (saturation current)- design parameter. 7
oltage rectifier: fundamentals A simple case: square-wave input Steady-state analysis Basic principle: charge conservation/ average current through diode = 0 T / 2 D 1 Ddt = 0 n t T D = S[ e φ 1] S T T /2 e 1 dt + e 1 dt = 0 0 P o T /2 P o nφ t nφ t T /2 0 Assumption: very low ripple (high C) o constant P n t P n t φ φ o e + e = ln = ln cosh( P n t ) n t 2 φ φ 8
Power/Peak Detector A simple case: square-wave input o nφ t ( nφ ) = ln cosh P t Power Detector P << nφ t o nφ t 1 2 P nφ t 2 Peak Detector Diode ON voltage drop >> nφ nφ ln 2 P t nput L P t Why? Results for sine input are similar. Difference is a form factor
oltage rectifier: fundamentals A simple case: square-wave input S S Waveforms for P >> nφ t 10
oltage rectifier: fundamentals S Steady-state analysis 2 L + S L S T e 1 dt + e 1 dt = 0 P o T /2 P o nφ t nφ t T /2 0 L L + S L + S Assumption: very low ripple o constant o P t = ln nφt 1 + L / S cosh ( nφ ) Waveforms for P >> nφ t 11
oltage rectifier: fundamentals S Output voltage ripple 2 L + S L + S L + S L The discharge rate of the capacitor diode during the negative half-cycle of the input is dq d = = C + dt dt C C C L S 0 T + T + dc = = C 2 2 fc /2 L S L S 12
oltage rectifier: fundamentals Sine-wave input in A cos = θ Steady-state analysis Basic principle: charge conservation / 2 1 T Ddt L = n t T D = S[ e φ 1] S 2π T /2 0 A cosθ o A cos o π θ n t n φ φ t e 1 dθ + e 1 d = θ π 0 Assumption: very low ripple (high C) o constant ( nφ ) o 0 A t = ln nφt 1+ L S D L Gaussian function 0 π 1 θ z e dθ π cos ( ) = z 0 modified Bessel function of the first kind of zero order A = 4.5, f=120 Hz, L =4µA. S = 4.4 na, nφ t = 50 m, C=150 nf. 13
The voltage multiplier oltage doubler Clamping circuit & peak detector D 1, C 1, and in half-wave rectifier. C1 stored in C1 is a dc voltage equal to that of a half-wave rectifier. X = in + C1. The dc output voltage of the doubler is equal to the value calculated for the half-wave rectifier plus C1. L = 2 C1 14
The voltage multiplier oltage doubler PCE Pload L L = = P P + P in load loss PCE max L = PCE @ = 2( N) nφ t L S PCE: Power Conversion Efficiency oltage doubler N-stage voltage multiplier 15
The voltage multiplier N-stage voltage multiplier Applications: Generation of voltages higher than the supply voltage, for EEPROMs, flash memories Energy harvesting for RFD tag chips, for example 16
The voltage multiplier model CD Average diode capacitance N-stage voltage multiplier R in 2P 2 A = in C RET NC D ( ap ) = ( ap ) v v 1 0 17
Temperature sensor D1 D2 1 2 o = D1 D2 = nφt ln 1+ ln 1+ S S n n 1 2 1 o φt ln ln = φt ln S S 2 18
References EEL 7061 Eletrônica Básica http://www.lci.ufsc.br/electronics/index7061.htm Charles Sodini, 6.012 Microelectronic Devices and Circuits, OpenCourseWarehttp://ocw.mit.edu R. Jaeger, Microelectronic Circuit Design, McGraw-Hill, New York, 1997. A. J. Cardoso, L. G. de Carli, C. Galup-Montoro, and M. C. Schneider, Analysis of the Rectifier Circuit alid Down to ts Low-oltage Limit, EEE Transactions on Circuits and Systems : Regular Papers, vol. 59, no. 1, pp. 106-112,. January 2012. A. J. Cardoso, Modelagem e projeto de conversores ac/dc de ultrabaixa tensão de operação, Tese de doutorado, UFSC, 2012 L. G. de Carli, Modelagem e projeto de retificadores de múltiplos estágios para ultrabaixa tensão de operação, Trabalho de conclusão de curso, UFSC, 2013. P. Curty, N. Joehl, F. Krummenacher, C. Dehollain, and M. Declercq, A model for u-power rectifier analysis and design, EEE Trans. Circuits Syst., Reg. Papers, vol. 52, no. 12, pp. 2771 2779, Dec. 2005. 19