Errata of CMOS Analog Circuit Design 2 nd Edition By Phillip E. Allen and Douglas R. Holberg

Errata 2 nd Ed. (5/22/2) Page Errata of CMOS Analog Circuit Design 2 nd Edition By Phillip E. Allen and Douglas R. Holberg Page Errata 82 Line 4 after figure 3.2-3, CISW CJSW 88 Line between Eqs. (3.3-2) and (3.3-3) should read as The channel transconductances, g m and g mbs, and the channel conductance, g ds, are defined as 02 Line 2 from bottom: 2φF 2φ F 5 Replace the NMOS symbol in Fig. 4.-2 with the one for an NMOS transistor in Fig. 3.- of pp. 73 with the bulk connected to ground (assumed to be the lowest potential). 7 Fig. 4.-5, replace symbol with the NMOS symbol on pp. 73. 7 Fig. 4.-6, replace symbol with the NMOS symbol on pp. 73. 25 Eq. 4.2-3 should be: r out g m g ds g m 26 Fig. 4.2-3, replace symbol with the NMOS symbol on pp. 73. 30 Eq. (4.3-), no / sign in numerators 33 Solution part to Example 4.3-3: delete 2 in 2 500 0-6 when calculating W/L 33 Solution part to Example 4.3-3: 0.0626 0.0625 when calculating W/L 34 Line 3 from the bottom, delete is greater thanv T2 34 Eq. (4.4-): λv DS2 λv DS2 38 Line 2 of Example 4.4-: Change the values from W 5 ± 0.05µm and W 2 20 ± 0.05µm W 5 ± 0.µm and W 2 20 ± 0.µm 38 Second and fourth lines of the solution: W 5 ± 0.05µm W 5 ± 0.µm and W 2 20 ± 0.05µm W 2 20 ± 0.µm 38 Solution part to Example 4.4-, line 6: W 2 20 0.05 W 5 ± 0.06 W 2 20 0. W 5 ± 0. 4 ± (0./20) ± (0./5) 4 ± 0. 20 - ±0. 5 4 ± 0. 20 - ±0.4 20 4 - (±0.03) 38 Last line of Ex. 4.4-: ratio error is.25% ratio error is 0.75% 46 Eq. (4.5-9): S V REF V DD β(v REF -V T )R V DD V REF S V REF V DD 2β(V DD -V T )R V DD V REF 46 Eq. (4.5-0): V REF V GS R 2 R V REF V GS R R 2 55 Eq. (4.6-0): V BE -V G0 T (α - γ) k 0 q V BE0 -V G0 T (α - γ) k 0 q 56 Eq. (4.6-2): V BE V EB2 7 Eq. (5.-5): C out C bd C bd2 C gs2 C L C out C bd C bd2 C gs2 C L

Errata 2 nd Ed. (5/22/2) Page 2 72 Line 3: voltage gain is.92 V/V. voltage gain is 2.098 V/V. 75 Eq. For v OUT (min): - 0 50 2 8-0.7 5-0.7 2 " - 0 50 2 3-0.7 5-0.7 2 " 78 Eq. (5.-32): e out e eq 88 Fig. 5.2-8(a): The VCCS in parallel with r ds2 should be g m2 v gs2 instead of g m v gs. 88 Fig. 5.2-8(b): The VCCS in parallel with the i 3 VCCS should be g m2 v gs2 instead of g m v gs. 97 Last line: λ P 0.5V - λ P 0.05V - 98 First eq. in step 5.): Should be V DS (sat) V IC (min) V SS V GS -.5 2.5-2 50µA 0µA/V 2 (8.4) 0.7 98 Last eq. on page: Should be W 5 2I 5 L 5 K N ' V DS (sat)2 306 98 3 rd line from bottom: giving a smaller W 5 /L 5. to allow for a variation in V TN. 98 2nd line from bottom: W /L (W 2 /L 2 ) 25, which gives W 5 /L 5 2.3. W /L (W 2 /L 2 ) 40, which gives W 5 /L 5 82. 98 Last line:. V/V 47.4 V/V 2 First eq. on this page: 2 50A 0 4.26 0.8 V 2 50A 0 2.73.0 V 2 Line between st and 2nd eqs.: V DS2 (sat) 0.7 V. V DS2 (sat) 0.5 V. 2 2 50 2 50 Second eq. on this page: 0 0.7 2 5.57" 0 0.5 2 0.9" 2 Third eq. on this page: 0.8 V 0.7 V.0 V 0.5 V 225 Fig. 5.5-7(a): The bulk VCCS for M should be g m v bs instead of g m v gs. 225 Fig. 5.5-7(a): The VCCS for M2, g m2 v gs2 should be pointing upward. 225 Fig. 5.5-7(a): The bulk VCCS for M2 should be g m2 v bs2 instead of g m2 v gs2. 225 Fig. 5.5-7(b): The fourth VCCS from the left should be g m2 v in instead of g m v in. 256 Fig. 6.2-6: Replace GB with 0dB frequency 266 Fig. 6.2-6(a): M4 M2. 268 Fig. 6.2-8(c): Corrected figure -A is shown. A is replaced by A. V i g mii V i C II. - 268 Eq. (6.2-56) should be: V out (s) V in (s) -AC c C c C s g mii /AC c II s /[R II (C c C II )] 274 Table 6.3-, last line: The downward arrrow should be upward. C c R II Vout -

Errata 2 nd Ed. (5/22/2) Page 3 274 Table 6.3-2, entry 3.): Delete the equation I 5 0 V DD V SS 2T s 274 Last line: S S 2 g m2 K 2 'I S 5 S 2 g m2 2 K 2 'I 5 288 Fig. 6.4-2c: Replace g ds V dd of the left-most controlled source with g ds V dd g m V out 303 r ds6 R r 2 ds6 R 2 g m0 Eq. (6.5-2): R A g m6 r gs6 g R m6 A g m6 r ds6 g m6 304 g m2 v in g m2 v in Eq. (6.5-6): 2 R 9 g ds5 g m7 r 2 R 9 g ds5 ) ds7 g m7 r ds7 304 R 9 g ds4 ) R 9 g ds5 ) Eq. (6.5-7): k g m7 r k ds7 g m7 r ds7 305 Eq. (6.5-20) should be written as, - p out R II 'C out 305 After Eq. (6.5-20), replace where C out by where R II [(2k)/(22k)] R II and C out 305 - - Eq. (6.5-23): p 6 p 6 R 2 g C m0 6 R 2 g C m0 6 305 Line 9 from the bottom: Figure 6.5-8 Figure 6.5-7 307 8I 5 8I 7 Table 6.5-3, Step 3, third column: S 5 K P V 2, S 7 SD5 K P V 2 SD7 307 307 S 5 2I 5 K P V SD5 2, S 7 2I 7 K P V SD7 2 V DD -V out (min) V DD -V out (max) Table 6.5-3, Step 3, fourth column: 2 2 8I 8I 9 Table 6.5-3, Step 4: S K N V 2, S 9 DS K N V 2 DS9 S 2I K N V DS 2, S 9 2I 9 K N V DS9 2 307 Table 6.5-3, Step 5: V SD4 (sat)/i 4 V SD3 (sat)/i 2 307 308 2I 4 2I 4 Table 6.5-3: Step 8: K P (V DD -V in (max)v T ) K P (V DD -V in (max)v T ) 2 2 25µA Third Eq: S 6 S 7 S 3 50µA/V 2 (0.25V)2 2 25 6 50 80 2 25µA S 6 S 7 S 3 50µA/V 2 (0.25V)2 2 25 6 50 80

Errata 2 nd Ed. (5/22/2) Page 4 308 200x0-6 Sixth Eq: 20 0x0-6 00 -.52.5-00 35.9-0.75 2 200x0-6 20 0x0-6 00 -.52.5-0 35.9-0.75 2 308 2I 4 Last Eq: S 4 S 5 K P [V DD -V in (max)v T ] 2I 4 S 4 S 5 K P [V DD -V in (max)v T ] 2 33 Fig. 6.6-7(b): The polarity of the upper V cm source should be reversed. 33 Fig. 6.6-7(b): Replace the lower controlled source designation of ±A c V cm with ± A c (V V 2 ) 2 320 Fourth line of Table 6.6-3: 6.0 U should be 6.0U 32 Caption of Fig. 6.6-7: Input common-node should be Input common mode 343 Prob. 6.3-0, 5 th line: Delete positive and 343 Fig. P6.3-0: Change the power supplies to ±.5V and increase the W/L value of M6 to 00/. 344 Prob. 6.3-0: Add sentence Assume the parameters of the MOSFETs are given in Table 3.-2. 360 Eq. (7.-8): R out (g ds6 g ds7 ) g m2 g (g m4 m6 g m8 )R o R out (g ds6 g ds7 ) g m2 g (g m4 m6 g m8 )R o 362 Eq. (7.-): Replace with 363 First line:..that R L is smaller than r ds...that the load reflected from the emitter to base of Q0 is negligible with respect to r π0. 363 Last line: 469µS 300µS 364 g m9 γ N st Eq.: g mbs9 469 0.4 2 2φ F V 2 0.72 57.µS BS9 364 g m9 γ N g mbs9 300 0.4 2 2φ F V 2 0.72 36.5µS BS9 469µS 2 nd Eq.: A MOS 469µS57.µS4µS5µS 0.8765 V/V 300µS A MOS 300µS36.5µS4µS5µS 0.8683 V/V 364 4 th Eq.: A vd (0) (7777)(0.8765)(0.95) 6483 V/V

Errata 2 nd Ed. (5/22/2) Page 5 A vd (0) (7777)(0.8683)(0.95) 6422 V/V 373 Top line: p 8 -g m8 C p 8 8 -g m8 r ds8 g m0 C 8 387 st complete paragraph: Replace this entire paragraph with the following: The input common mode range of the differential-out op amps may appear to be better because of the current source loads (M3 and M4 of Fig. 7.3-3). However, the upper input common mode range becomes restricted by M6 and M7 of Fig. 7.3-3. For example, in Fig. 7.3-3, the upper input common mode range is V DD V SD (sat) where it is V DD V SD (sat) V T. for the folded-cascode differential output op amp of Fig. 7.3-5. 389 Eq. (7.3-4): (v sg v gs4 ) (v gs v sg4 ) 394 Line after Eq. (7.4-5): g m /C g m /C c 394 I D Eq. (7.4-6): GB (n kt/q)c GB I D (n kt/q)c c 394 Eq. (7.4-7): SR I D5 C 2 I D C SR I D5 C 2 I D c C c 396 3 rd line from bottom: Figure 7.7-4 Figure 7.4-4 398 Line : M5 to M4 M6 to M4 and M7 equals M6 M7 equals M9 399 2I 2I st Eq.: V ds (sat) K N (W 2 /L 2 ) V ds (sat) K N (W /L ) 404 Eq. (7.5-3): g m6 R II 2 m6 2 II 2 405 Line following Eq. (7.5-8): Fig. 7.4- Fig. 7.5-407 Line 7 including eqs.: 0.202 µ(v rms ) 2 0.202 µ(v rms ) 420 Line 3 (2 lines after Eq. 7.6-0): above V onn should be above V onp 434 Prob. 7.-0, 3 rd line: Example 7.- Example 7.-2 434 Prob. 7.-0: Add the sentence, Assume C π 0 pf and C µ pf. 434 Prob. 7.-0: Replace Example 7.- with Example 7.-2 436 Prob. 7.4-2, 2 nd and 3 rd line: all transistor widths are transistors M through M widths are 436 Prob. 7.4-2, 5 th line:..the correct bias voltage for M0 and M the W/L values of M2 through M5 436 Prob. 7.4-2, last line: n p.5 and n n 2.5. n p.5, n n 2.5 and V t 26mV. 436 Prob. 7.5-5, 2 nd line: of a over a 442 Fig. 8.-5, st line after Fig: V OH for (v P -v N ) > 0 V OH for (v P -v N ) > V IH 442 Fig. 8.-5, 3 rd line after Fig: V OL for (v P -v N ) < 0 V OL for (v P -v N ) > V IL 444 Next to last line: 2.5V should be -2.5V. 446 - -(g Eq. (8.2-4a): p C I g ds4 ) p ds2 g ds4 ) C I 446 - -(g Eq. (8.2-4a): p 2 C II g ds4 ) p 2 ds6 g ds7 ) C II

Errata 2 nd Ed. (5/22/2) Page 6 446 447 447 447 447 448 A v (0) A v (0) Eq. (8.2-5): A v (s) s p s A v (s) p s 2 p - s p - 2 g ds2 g ds4 st eq.: p C 5x0-6 (0.040.05) I 0.2x0-2 6.75x0 6 (.074MHz) g ds2 g ds4 p - C - 5x0-6 (0.040.05) I 0.2x0-2 -6.75x0 6 (.074MHz) g ds6 g ds7 2 nd eq: p 2 C 95x0-6 (0.040.05) II 5x0-2.7x0 6 (0.670MHz) g ds6 g ds7 p 2 - C - 95x0-6 (0.040.05) II 5x0-2 -.7x0 6 (0.670MHz) Eq. (8.2-6): v out (t) A v (0)V in p 2 e --tp p e --tp 2 p -p - 2 v out (t) A v (0)V in p 2 e -tp p e -tp 2 p -p - 2 p -p 2 Eq. (8.2-): t n tp t t τ n -tp Eq. (8.2-2): v out (t n ) - p e -t n - p -p 2 t n p e -t n - e -t n - t n e -t n v out (t n ) - e tp tp e -tp e -t n - t n e -t n 448 Line after Eq. (8.2-2): Delete where p is assumed to be unity. 448 Fig. 8.2-2: Normalized Time (t n tp t/τ ) Normalized Time (t n -tp ) 454 Eq. at bottom of page: 0.7 234 2 0 38.035 V 0.7 234 2 50 38 0.496 V 455 Line 2: V TRP2 2.5 -.035.465 V V TRP2 2.5 -.96.304 V 455 Line 3: ΔV 2.5 V -.465 V V SG6.035 V. ΔV 2.5 V -.304 V V SG6.96 V. 455 Line 5: t fo 0.2pF.035V 30µA 6.9 ns t fo 0.2pF.96V 30µA 8 ns 455 Line 9:.465 V.304 V 455 Line 3:.465 V.304 V 455 Line 4: 0.232 V. 0.52 V and 2.27 V 2.348 V 455 β 6 Line 5: I 6 2 (V SG6 - V TP ) 2 38 50 2 (2.27-0.7)2 2,342µA β 6 I 6 2 (V SG6 - V TP ) 2 38 50 2 (2.348-0.7)2 2,580µA

Errata 2 nd Ed. (5/22/2) Page 7 455 Line 9: t rout 5pF 2.5V 2,342µA t rout 5pF 2.5V 2,580µA-234µA 455 Line 2: 2.2 ns 3.3 ns 455 Last line: t ro 0.2pF.465V-(-2.5) 30µA 26.43ns t ro 0.2pF.304V-(-.000) 30µA 5.4ns 456 Line 3: 79.85 ns. 68.82 ns. 456 Line 5: about 44.93 ns. about 4 ns. 456 Fig. 8.2-7: V TRP6.465V V TRP6.304V Also, lower the dashed line. 457 V OH V OL V Table 8.2-2, step 5: A v (0) V in (min) A v (0) OH -V OL V in (min) 459 V OH V OL V OH -V OL Tab;e 8.2-3, step 6: A v (0) V in (min) A v (0) V in (min) 465 Fig. 8.4-(b): The polarity of the voltage on C AZ should be reversed. 468 Fig. 8.4-7: V TRP V OL R 2 and V TRP - V OH R 2 469 Fig. 8.4-8: R R 2 R V REF R R 2 R V 2 REF 470 Eq. (8.4-0): V TRP R R 2 R R V REF - R V 2 OL V TRP R R 2 R R V 2 REF - R V 2 OL 470 Eq. (8.4-2): V TRP R R 2 R R V REF - R V 2 OH V - TRP R R 2 R R V 2 REF - R V 2 OH 470 First line after Eq. (8.4-2): (R R 2 )/R (R R 2 )/R 2 470 Eq. (8.4-3) and Eq. (8.4-4): R R R V 2 REF R 2 R R V 2 REF 470 First line after Eq. (8.4-4): R /(R R 2 ) R 2 /(R R 2 ) 470 R R 2 Fig. 8.4-0: R R V 2 REF R R V 2 REF 47 st R and 2 nd equations: R R V 2 REF R 2 R R V 2 REF 47 Last line of Ex. 8.4-: V REF 2 V V REF 0.667 V 478 Eq. (8.5-5): sc V o V o - s sc V o V o - s 480 Ex. 8.5-, line 3: ΔV i 0.0V in (min) and ΔV i 0.V in (min).

Errata 2 nd Ed. (5/22/2) Page 8 ΔV i 0.0(V OH V OL ) and ΔV i 0.(V OH V OL ). 480 3 rd line from bottom: given a latch gain of 59.2 V/V. gives a latch gain of 370 V/V. 48 Last eq. on page should be: τ L 0.67C ox WL 3 2K'I 0.67(24.7x0-4 ) (0 )x0-24 2 0x0-6 0x0-6 0.2 ns 482 First line: t 4.6τ L 496 ns g t 4.6τ L 0.55 ns 482 Second line: that t 2.3τ L 284 ns. g that t 2.3τ L 0.258 ns. 482 Third line: and is 74 ns and 422 ns g and is 0.438 ns and 0.80 ns 485 Fig. 8.6-4: The pins FB and Reset associated with M2 should be reversed. 486 Fig. 8.6-5 Disconnect the line connecting the gate-drains of M3 and M4 489 Prob. 8.3-,3 rd line: what is the propagation what is the slew rate limited propagation 49 Reference 2: Two Novel Full Two Novel Fully 502 Eq. (9.-34): v(n n o )T z -not V(z) v(n n o )T z -no V(z) 502 Eq. (9.-36): V2(z) o - C 2 C C 2 z - C C C 2 z - V(z) o V2(z) o - C 2 C C 2 z - C C C 2 z - V(z) o 543 Line 9: EODD EVEN 543 Line 0: EVEN EODD 549 Line : Eq. (9.5-) Eq. (9.5-2) 552 Line 3: Eq. (9.6-4) Eq. (9.6-3) 554 Ex. 9.6-, 2 nd line of solution: /3.83. /0.034 3.83. 557 Ex. 9.6-2, 2 nd line of solution: /5.92. /0.0628 5.92. 563 ω PB ω SB Eq. (9.7-4): Ω n Ω ω n SB ω PB 564 Caption for Fig. 9.7-3: for. for ε. 565 Title for Table 9.7-: for. for ε. 567 3 rd and 4 th line after Eq. (9.7-9): (ε 0.0233) (ε 0.526) 572 2 nd line: α 42 α 52 0.789T 2 0.789 ω 2 PB n f 2 0.789 2π 20 0.05620 c 572 0.789 ω PB α 42 α 52 0.789T n f c 0.789 2π 20 0.05620 Last line: α 63 0.4684T 2 0.4684 ω 2 PB n f 2 0.4684 2π 20 0.472 c 0.4684 ω PB α 63 0.4684T n f c 0.4684 2π 20 0.472 573 Line 2: α 43 0.472. α 63 0.472.

Errata 2 nd Ed. (5/22/2) Page 9 557 Eq. (9.7-24): Numerator term, (α 3 α 5 - α α 5-2α 3 )z (α 3 α 5 α α 5-2α 3 )z 580 Eq. (9.7-42): Ω n SW BW ω SB2 - ω SB Ω ω BP2 - ω n SW PB BW ω SB2 - ω SB ω PB2 - ω PB 587 Fig. 9.7-8: The upper input capacitor should be labeled α 2 C 2 607 Prob. 9.7-4, st line following eq.: to 000 Hz to be 000 Hz 63 Eq. (0.-3): v OUT KV REF b 2 b 2 22 b 3 23... b N 2N v OUT KV REF b 2 b 2 22 b 3 23... b N 2N 68 Eq. (0.-5): Differential nonlinearity (DNL) V cx V s V 00% V cx s V - LSBs s Differential nonlinearity (DNL) (V cx V s ) V cx -V s V V s s V cx V - LSBs s 62 Line 4: ±LSB ±0.5LSB 629 v step (actual) - v step (ideal) v step (actual) Eq. (0.2-5): DNL v step (ideal) v step (ideal) - DNL v step (actual) - v step (ideal) v step (actual) - v step (ideal) v step (ideal) v step (ideal) v step (actual) v step (ideal) - LSBs 630 Last line of solution: DNL ± 00 64 64 64 00 64 ±0.64 LSBs DNL ± 00 LSBs ± 0.0 LSBs 64 Eq. 0.3- The summation should be i0 through 7 not 8. 8 7 bi V REF bi V 2 i REF 2 i i0 i0 644 Fig. 0.3-9: C M-2 2 2 C C M- C, C M- 2C C M C and C M 2C C M C 644 5 th line below Eq. (0.3-7): 2 K-. 2 M-. 645 Eq. (0.3-24): INL INL(R) INL(C) ΔR 2M- R ΔC 2N- C LSBs INL INL(R) INL(C) ΔR 2K- R ΔC 2N- C LSBs 645 Eq. (0.3-25): DNL DNL(R) DNL(C) ΔR R (2N -) ΔC C LSBs

Errata 2 nd Ed. (5/22/2) Page 0 DNL DNL(R) DNL(C) ΔR R (2N -2 K ) ΔC C LSBs 645 3 rd line after Eq. (0.3-25): of 2 K of 2 M 646 2 nd sentence in Ex. 0.3-4: To minimize the capacitor element spread and the number of resistors, choose M 5 and K 7. To emphasize the accuracy of the capacitors, choose M 7 and K 5. 647 4 th line: ΔR R (22 -) ΔC ΔR C R (22-2 7 ) ΔC C 647 6 th line: ΔC C 2 4-2 ΔC 2 6-2 - 2 4 0.00022 C 0.02% is replaced by ΔC C 2 4-2 2 6-2 - 2 0.000228 ΔC C 0.0228% 647 Lines and 2 of Ex. 0.3-4, Solution: increase the value of M and decrease decrease the value of M and increase 647 Line 3 of Ex. 0.3-4, Solution: choose K 5 and M 7 choose M 5 and K 7 667 Eq. (0.6-4): N out N REF - v * in V REF N out N REF v * in V REF 67 Line 2: than then 675 Eq. (0.7-8): 2 2 b 2 2 2 b 70 Fig. 0.9-5 The sign of the output of the integrator (v[nt s ]) returned to the summing junction in the left shaded box should be and not -. 702 The correct Fig. 0.9-6 is shown: x[nt s ] - Integrator Delay - Integrator 2 Delay Quantizer y[nt s ] Figure 0.9-6 Sampled-date model of a second-order ΔΣ modulator. 704 Eq. (0.9-2): 3 2L 2 π 2L M 2L 2 B - 3 2L 2 π 2L M 2L (2 B -) 2 79 Prob. 0.3-2: if the divisor is 3 and 6. if the divisor is 3 and 5. 79 Fig. P0.3-7: The vertical resistor connected to the right of the resistor R x, should have the value of 2R rather than 4R and the 4R between the horizontal resistors R x and 4R should be deleted. 720 Fig. P0.3-8: The subscripts of the bits, b i, should all be decreased by. I.e. b b 0, b 2 b, etc. 720 Fig. P0.3-0: The subscripts for b should increase from right to left and not left to right. In addition, a vertical line should be drawn from the left most switch terminal labeled b 0 (old labeling) to the V REF battery. 723 Prob. 0.4-4, lines 4-6: If the attenuation factors of 0.5 become 0.55, at what bit does the converter create an error? What is the analog output for this case? Replace with If the attenuation factors of 0.5 become 0.55, what is the analog output for this case?

Errata 2 nd Ed. (5/22/2) Page 723 Prob. 0.4-7, st line: ADC DAC 724 Prob. 0.6-2, st line: Give a switched For Fig. 0.6-2, give a switched 725 Prob. 0.7-2, last line: in part (a)? in part (a) if V REF V. 729 Fig. P0.9-9: f s 2f o f s 4f o 753 Ex. B.-4, st line of Solution: Eq. (B.-40), Eq. (B.-34), New corrections beyond 090603: p. 387,