Lecture 6 PN Junction and MOS Electrostatics(III) Metal-Oxide-Semiconductor Structure

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Lecture 6 PN Junction and MOS Electrostatics(III) Metal-Oxide-Semiconductor Structure Outline 1. Introduction to MOS structure 2. Electrostatics of MOS in thermal equilibrium 3. Electrostatics of MOS with applied bias Reading Assignment: Howe and Sodini, Chapter 3, Sections 3.7-3.8 6.012 Spring 2007 Lecture 6 1

1. Introduction Metal-Oxide-Semiconductor structure MOS at the heart of the electronics revolution: Digital and analog functions Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is key element of Complementary Metal- Oxide-Semiconductor (CMOS) circuit family Memory function Dynamic Random Access Memory (DRAM) Static Random Access Memory (SRAM) Non-Volatile Random Access Memory (NVRAM) Imaging Charge Coupled Device (CCD) and CMOS cameras Displays Active Matrix Liquid Crystal Displays (AMLCD) 6.012 Spring 2007 Lecture 6 2

2. MOS Electrostatics in equilibrium Idealized 1D structure: Metal: does not tolerate volume charge charge can only exist at its surface Oxide: insulator and does not have volume charge no free carriers, no dopants Semiconductor: can have volume charge Space charge region (SCR) In thermal equilibrium we assume Gate contact is shorted to Bulk contact. (i. e, V GB = 0V) 6.012 Spring 2007 Lecture 6 3

For most metals on p-si, equilibrium achieved by electrons flowing from metal to semiconductor and holes from semiconductor to metal: Remember: n o p o =n i 2 Fewer holes near Si / SiO 2 interface ionized acceptors exposed (volume charge) 6.012 Spring 2007 Lecture 6 4

Space Charge Density In semiconductor: space-charge region close Si /SiO 2 interface can use depletion approximation In metal: sheet of charge at metal /SiO 2 interface Overall charge neutrality x = t ox ; σ = Q G t ox < x < 0; ρ o (x) = 0 0 < x < x do ; ρ o (x) = qn a x > x do ; ρ o (x) = 0 6.012 Spring 2007 Lecture 6 5

Electric Field Integrate Poisson s equation E o (x 2 ) E o (x 1 ) = 1 ε ρ( x ) d x At interface between oxide and semiconductor, there is a change in permittivity change in electric field x 2 x 1 ε ox E ox = ε s E s E ox E s = ε s ε ox 3 6.012 Spring 2007 Lecture 6 6

Start integrating from deep inside semiconductor: x > x do ; E o (x) = 0 0 < x <x do ; E o (x) E o (x do ) = 1 qn a d x ε s x x do = qn a ε s ( x x do ) t ox < x < 0; x < t ox ; E(x) = 0 E o (x) = ε s ε ox E o (x = 0 + ) = qn ax do ε ox 6.012 Spring 2007 Lecture 6 7

Electrostatic Potential (with φ = 0 @ n o = p o = n i ) φ = kt q ln n o n i φ = kt q ln p o n i In QNRs, n o and p o are known can determine φ in p-qnr: p o = N a in n + -gate: n o = N d+ φ p = kt q ln N a n i φ g = φ n + Built-in potential: φ B = φ g φ p = φ n + + kt q ln N a n i 6.012 Spring 2007 Lecture 6 8

To obtain φ o (x), integrate E o (x); start from deep inside semiconductor bulk: x 2 φ o (x 2 ) φ o (x 1 ) = E o ( x ) d x x 1 x > x do ; φ o (x) = φ p 0 < x < x do ; φ o (x) φ o (x do ) = qn a ( x x do )d x ε s φ o (x) = φ p + qn a 2ε s x x do ( x x do ) 2 t ox < x < 0; AT x = 0 φ o (x) = φ p + qn a 2ε s φ o (x) = φ p + qn x 2 a do 2ε s + qn a x do ε ox ( x do ) 2 ( x) x < t ox ; φ o (x) = φ n + Almost done. 6.012 Spring 2007 Lecture 6 9

Still do not know x do need one more equation Potential difference across structure has to add up to φ B : 2 φ B = V B,o + V ox,o = qn a x do 2ε s Solve quadratic equation: + qn a x do t ox ε ox x do = ε s t ε ox 1 + 2ε 2 φ ox B 2 ox qε s N a t 1 ox = ε s C ox 1+ 2C 2 φ ox B qε s N a 1 where C ox is the capacitance per unit area of oxide C ox = ε ox t ox Now problem is completely solved! 6.012 Spring 2007 Lecture 6 10

There are also contact potentials total potential difference from contact to contact is zero! 6.012 Spring 2007 Lecture 6 11

3. MOS with applied bias V GB Apply voltage to gate with respect to semiconductor: Electrostatics of MOS structure affected potential difference across entire structure now 0 How is potential difference accommodated? 6.012 Spring 2007 Lecture 6 12

Potential difference shows up across oxide and SCR in semiconductor Oxide is an insulator no current anywhere in structure In SCR, quasi-equilibrium situation prevails New balance between drift and diffusion Electrostatics qualitatively identical to thermal equilibrium (but amount of charge redistribution is different) np = n i 2 6.012 Spring 2007 Lecture 6 13

Apply V GB >0: potential difference across structure increases need larger charge dipole SCR expands into semiconductor substrate: Simple way to remember: with V GB >0, gate attracts electrons and repels holes. 6.012 Spring 2007 Lecture 6 14

Qualitatively, physics unaffected by application of V GB >0. Use mathematical formulation in thermal equilibrium, but: φ B φ B + V GB For example, to determine x d (V BG ): φ B + V GB = V B (V GB ) + V ox (V GB ) = qn a x d 2 (V GB ) 2ε s + qn a x d (V GB )t ox ε ox x d (V GB ) = ε s C ox 1 ε s qn a 1+ 2C 2 ( ox φb + V GB ) φ(0) = φ s = φ p + qn a x d 2 (V GB ) 2ε s φ s gives n & p concentration at the surface 6.012 Spring 2007 Lecture 6 15

What did we learn today? Summary of Key Concepts Charge redistribution in MOS structure in thermal equilibrium SCR in semiconductor built-in potential across MOS structure. In most cases, we can use depletion approximation in semiconductor SCR Application of voltage modulates depletion region width in semiconductor No current flows 6.012 Spring 2007 Lecture 6 16