BF908; BF908R IMPORTANT NOTICE. use

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Rev. 3 14 Nvember 27 Prduct data sheet IMPORTANT NOTICE Dear custmer, As frm Octber 1st, 26 Philips Semicnductrs has a new trade name - NXP Semicnductrs, which will be used in future data sheets tgether with new cntact details. In data sheets where the previus Philips references remain, please use the new links as shwn belw. http://www.philips.semicnductrs.cm use http://www.nxp.cm http://www.semicnductrs.philips.cm use http://www.nxp.cm (Internet) sales.addresses@www.semicnductrs.philips.cm use salesaddresses@nxp.cm (email) The cpyright ntice at the bttm f each page (r elsewhere in the dcument, depending n the versin) - Kninklijke Philips Electrnics N.V. (year). All rights reserved - is replaced with: - NXP B.V. (year). All rights reserved. - If yu have any questins related t the data sheet, please cntact ur nearest sales ffice via e-mail r phne (details via salesaddresses@nxp.cm). Thank yu fr yur cperatin and understanding, NXP Semicnductrs

Prduct specificatin FEATURES High frward transfer admittance Shrt channel transistr with high frward transfer admittance t input capacitance rati Lw nise gain cntrlled amplifier up t 1 GHz. handbk, halfpage 4 3 g 2 g 1 d APPLICATIONS VHF and UHF applicatins with 12 V supply vltage, such as televisin tuners and prfessinal cmmunicatins equipment. Tp view 1 2 MAM39 s,b DESCRIPTION Depletin type field-effect transistr in a plastic micrminiature SOT143 r SOT143R package. The transistrs are prtected against excessive input vltage surges by integrated back-t-back dides between gates and surce. CAUTION The device is supplied in an antistatic package. The gate-surce input must be prtected against static discharge during transprt r handling. BF98 marking cde: %M1. Fig.1 handbk, halfpage Simplified utline (SOT143) and symbl; BF98. 3 4 g 2 g 1 d PINNING PIN SYMBOL DESCRIPTION 1 s, b surce 2 d drain 3 g 2 gate 2 4 g 1 gate 1 Tp view Fig.2 2 BF98R marking cde: %M2. 1 MAM4 Simplified utline (SOT143R) and symbl; BF98R. s,b QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V DS drain-surce vltage 12 V I D drain current 4 ma P tt ttal pwer dissipatin 2 mw T j perating junctin temperature 15 C y fs frward transfer admittance 36 43 5 ms C ig1-s input capacitance at gate 1 2.4 3.1 4 pf C rs reverse transfer capacitance f = 1 MHz 2 3 45 pf F nise figure f = 8 MHz 1.5 2.5 db Rev. 3-14 Nvember 27 2 f 9

Prduct specificatin LIMITING VALUES In accrdance with the Abslute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V DS drain-surce vltage 12 V I D drain current 4 ma ±I G1 gate 1 current ma ±I G2 gate 2 current ma P tt ttal pwer dissipatin see Fig.3; nte 1 Nte BF98 up t T amb =5 C 2 mw BF98R up t T amb =4 C 2 mw T stg strage temperature 65 +15 C T j perating junctin temperature 15 C 1. Device munted n a printed-circuit bard. 25 handbk, halfpage P tt (mw) 2 MRC275 15 BF98R BF98 5 5 15 2 Tamb ( C) Fig.3 Pwer derating curves. Rev. 3-14 Nvember 27 3 f 9

Prduct specificatin THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT R th j-a thermal resistance frm junctin t ambient nte 1 BF98 5 K/W BF98R 55 K/W Nte 1. Device munted n a printed-circuit bard. STATIC CHARACTERISTICS T j =25 C; unless therwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT ±V (BR)G1-SS gate 1-surce breakdwn vltage V G2-S =V DS = ; I G1-S =ma 8 2 V ±V (BR)G2-SS gate 2-surce breakdwn vltage V G1-S =V DS = ; I G2-S =ma 8 2 V V (P)G1-S gate 1-surce cut-ff vltage V G2-S =4V; V DS =8V; I D =2µA 2 V V (P)G2-S gate 2-surce cut-ff vltage V G1-S =4V; V DS =8V; I D =2µA 1.5 V I DSS drain-surce current V G2-S =4V; V DS =8V; V G1-S = 3 15 27 ma ±I G1-SS gate 1 cut-ff current V G2-S =V DS = ; V G1-S =5V 5 na ±I G2-SS gate 2 cut-ff current V G1-S =V DS = ; V G2-S =5V 5 na DYNAMIC CHARACTERISTICS Cmmn surce; T amb =25 C; V DS =8V; V G2-S =4V; I D = 15 ma; unless therwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT y fs frward transfer admittance pulsed; T j =25 C; f = 1 MHz 36 43 5 ms C ig1-s input capacitance at gate 1 f = 1 MHz 2.4 3.1 4 pf C ig2-s input capacitance at gate 2 f = 1 MHz 1.2 1.8 2.5 pf C s utput capacitance f = 1 MHz 1.2 1.7 2.2 pf C rs reverse transfer capacitance f = 1 MHz 2 3 45 ff F nise figure f = 2 MHz; G S = 2 ms; B S =B Spt.6 1.2 db f = 8 MHz; G S =G Spt ; B S =B Spt 1.5 2.5 db Rev. 3-14 Nvember 27 4 f 9

Prduct specificatin MRC281 4 handbk, halfpage V G2-S = 4 V I D (ma) 3 3 V 2 V 1.5 V 2 1 V.5 V V.6.4.2.2.4 V G1-S (V).6 MRC282 3 handbk, halfpage V G1-S =.3 V I D (ma).2 V 2.1 V V.1 V.2 V.3 V 4 8 12 16 V DS (V) V DS = 8 V; T j =25 C. Fig.4 Transfer characteristics; typical values. V G2-S = 4 V; T j =25 C. Fig.5 Output characteristics; typical values. 5 Y fs (ms) 4 4 V MRC28 3 V 2 V 1.5 V 6 Y fs (ms) MRC276 4 3 1 V 2 2.5 V V G2-S = V 5 15 2 25 I D (ma) 4 4 8 12 16 T j ( C) V DS = 8 V; T j =25 C. V DS = 8 V; V G2-S = 4 V; I D =15mA. Fig.6 Frward transfer admittance as a functin f drain current; typical values. Fig.7 Frward transfer admittance as a functin f junctin temperature; typical values. Rev. 3-14 Nvember 27 5 f 9

Prduct specificatin Table 1 f (MHz) Scattering parameters MAGNITUDE (rati) s 11 s 21 s 12 s 22 ANGLE MAGNITUDE (rati) ANGLE MAGNITUDE (rati) ANGLE MAGNITUDE (rati) ANGLE V DS =8V; V G2-S =4V; I D = ma; T amb =25 C. 5.998 5.1 3.537 173.5.1 98.2.996 2.4.994.4 3.52 167.7.1 88.8.994 4.9 2.979 2.8 3.45 154.9.3 74.6.987 9.5 3.962 3.3 3.318 143.7.4 69.5.983 13.9 4.939 4.1 3.234 131.9.5 65.6.98 18.5 5.914 49.1 3.93 12.7.6 64.4.974 22.8 6.892 57.1 2.912 111.1.5 63.1.969 27. 7.865 64.4 2.774 1..5 65.2.966 31.2 8.837 71.6 2.616 91.4.4 7.8.965 35.4 9.811 78.1 2.479 81.9.4 87.4.965 39.4.785 84.5 3.329 72.5.3 8..966 43.7 V DS =8V; V G2-S =4V; I D = 15 ma; T amb =25 C. 5.998 5.3 3.983 173.4.1 95.5.994 2.4.994.9 3.943 167.5.1 93.6.991 5. 2.976 21.6 3.878 154.7.3 74.3.984 9.7 3.957 31.7 3.722 143.3.4 7..979 14.2 4.934 41.7 3.614 131.6.5 63.5.975 18.8 5.97 51.1 3.446 12.4.6 62.2.969 23.2 6.885 59.1 3.24 1.9.5 59.6.964 27.4 7.851 66.8 3.72.9.5 64.8.961 31.6 8.826 73.9 2.891 91.3.4 67.8.959 35.9 9.797 8.7 2.733 81.9.4 85..958 4..773 87. 2.569 72.8.4 2.9.958 44.2 Table 2 Nise data f (MHz) F min (db) (rati) Γ pt r n V DS =8V; V G2-S =4V; I D = ma; T amb =25 C. 8 1.5.72 56.7.58 V DS =8V; V G2-S =4V; I D = 15 ma; T amb =25 C. 8 1.5.7 59.2.52 Rev. 3-14 Nvember 27 6 f 9

Prduct specificatin PACKAGE OUTLINES handbk, full pagewidth.75.6.15.9 3. 2.8 1.9 4 3 A B.2 M A B.1 1 2 1.4 1.2 2.5 1.1 3.88.1.48.1.1 M A B MBC845 1.7 TOP VIEW Dimensins in mm. Fig.8 SOT143. handbk, full pagewidth.4.25.15.9 3. 2.8 1.9 3 4 A B.2 M A.1 1.4 1.2 2.5 2 1 1.1 3.48.38 1.7.88.78 MBC844.1 M B TOP VIEW Dimensins in mm. Fig.9 SOT143R. Rev. 3-14 Nvember 27 7 f 9

Legal infrmatin Data sheet status Dcument status [1][2] Prduct status [3] Definitin Objective [shrt] data sheet Develpment This dcument cntains data frm the bjective specificatin fr prduct develpment. Preliminary [shrt] data sheet Qualificatin This dcument cntains data frm the preliminary specificatin. Prduct [shrt] data sheet Prductin This dcument cntains the prduct specificatin. [1] Please cnsult the mst recently issued dcument befre initiating r cmpleting a design. [2] The term shrt data sheet is explained in sectin Definitins. [3] The prduct status f device(s) described in this dcument may have changed since this dcument was published and may differ in case f multiple devices. The latest prduct status infrmatin is available n the Internet at URL http://www.nxp.cm. Definitins Draft The dcument is a draft versin nly. The cntent is still under internal review and subject t frmal apprval, which may result in mdificatins r additins. NXP Semicnductrs des nt give any representatins r warranties as t the accuracy r cmpleteness f infrmatin included herein and shall have n liability fr the cnsequences f use f such infrmatin. Shrt data sheet A shrt data sheet is an extract frm a full data sheet with the same prduct type number(s) and title. A shrt data sheet is intended fr quick reference nly and shuld nt be relied upn t cntain detailed and full infrmatin. Fr detailed and full infrmatin see the relevant full data sheet, which is available n request via the lcal NXP Semicnductrs sales ffice. In case f any incnsistency r cnflict with the shrt data sheet, the full data sheet shall prevail. Disclaimers General Infrmatin in this dcument is believed t be accurate and reliable. Hwever, NXP Semicnductrs des nt give any representatins r warranties, expressed r implied, as t the accuracy r cmpleteness f such infrmatin and shall have n liability fr the cnsequences f use f such infrmatin. Right t make changes NXP Semicnductrs reserves the right t make changes t infrmatin published in this dcument, including withut limitatin specificatins and prduct descriptins, at any time and withut ntice. This dcument supersedes and replaces all infrmatin supplied prir t the publicatin heref. Suitability fr use NXP Semicnductrs prducts are nt designed, authrized r warranted t be suitable fr use in medical, military, aircraft, space r life supprt equipment, nr in applicatins where failure r malfunctin f an NXP Semicnductrs prduct can reasnably be expected t result in persnal injury, death r severe prperty r envirnmental damage. NXP Semicnductrs accepts n liability fr inclusin and/r use f NXP Semicnductrs prducts in such equipment r applicatins and therefre such inclusin and/r use is at the custmer s wn risk. Applicatins Applicatins that are described herein fr any f these prducts are fr illustrative purpses nly. NXP Semicnductrs makes n representatin r warranty that such applicatins will be suitable fr the specified use withut further testing r mdificatin. Limiting values Stress abve ne r mre limiting values (as defined in the Abslute Maximum Ratings System f IEC 6134) may cause permanent damage t the device. Limiting values are stress ratings nly and peratin f the device at these r any ther cnditins abve thse given in the Characteristics sectins f this dcument is nt implied. Expsure t limiting values fr extended perids may affect device reliability. Terms and cnditins f sale NXP Semicnductrs prducts are sld subject t the general terms and cnditins f cmmercial sale, as published at http://www.nxp.cm/prfile/terms, including thse pertaining t warranty, intellectual prperty rights infringement and limitatin f liability, unless explicitly therwise agreed t in writing by NXP Semicnductrs. In case f any incnsistency r cnflict between infrmatin in this dcument and such terms and cnditins, the latter will prevail. N ffer t sell r license Nthing in this dcument may be interpreted r cnstrued as an ffer t sell prducts that is pen fr acceptance r the grant, cnveyance r implicatin f any license under any cpyrights, patents r ther industrial r intellectual prperty rights. Trademarks Ntice: All referenced brands, prduct names, service names and trademarks are the prperty f their respective wners. Cntact infrmatin Fr additinal infrmatin, please visit: http://www.nxp.cm Fr sales ffice addresses, send an email t: salesaddresses@nxp.cm Rev. 3-14 Nvember 27 8 f 9

Revisin histry Revisin histry Dcument ID Release date Data sheet status Change ntice Supersedes BF98-R_N_3 271114 Prduct data sheet - BF98-R_2 Mdificatins: Fig. 1 and 2 n page 2; Figure nte changed BF98-R_2 199673 Prduct specificatin - BF98R_1 BF98R_1 - - - - Please be aware that imprtant ntices cncerning this dcument and the prduct(s) described herein, have been included in sectin Legal infrmatin. NXP B.V. 27. All rights reserved. Fr mre infrmatin, please visit: http://www.nxp.cm Fr sales ffice addresses, please send an email t: salesaddresses@nxp.cm Date f release: 14 Nvember 27 Dcument identifier: BF98-R_N_3