plans: the shrt, the medium and the lng Summary f recent prgress Next steps New Test sftware/firmware Slice test/beam test requirements Hw can we use current s? D we need mre new s? rductin testing requirements New Glink Frmat? 11th arch, 2004 Stephen Hillier, University f Birmingham 1
rgress since RAL meeting Sub-slice tests: Run 3 s, 2s reading DAQ and RI Data t ROS data matches simulatin, still sme wrk t d n Data ffsets stable and mstly understd Run -ROD with small L1A gaps Required new RO firmware reviusly nly tested with DSS Glink sink Imprved Bunch rssing number handling Same value each slice, tunable start-pint ved t new apprved TT synchrnisatin prcedure Birmingham testing: New timing calibratin technique Imprved timing windw Higher statistics timing analysis ade timing windw smaller again! Glink instability mre fully understd 11th arch, 2004 Stephen Hillier, University f Birmingham 2
Shrt term new, integratin Sftware shuld essentially be ready t g Except maybe a few fixes fr recent nline upgrade Testing culd take as little as ne week Then ready t g t RAL fr mre slice tests But f curse new prblems might appear Hpe t prvide new histgramming tls Dimitri t add nline histgramming cde Slice Tests with Will require alternative demuxing algrithm 11th arch, 2004 Stephen Hillier, University f Birmingham 3
Slice/Beam tests: ld vs new an we use ld s? rblems caused by TTdec jitter Glink instability n lng term runs via ROD Timing windw reduced (t nthing?) Alternative strategies Just use new nes (assuming they wrk) Need three new nes rather than current plan f tw Try t fix TTdecs Devise strategy t use ld s plus 2 new s 11th arch, 2004 Stephen Hillier, University f Birmingham 4
Timing Windws (n TTdec fix) Old t Old Disastrus can t place tw tgether But can use standalne New t New Hpefully will be Wide If nt, back t drawing bard Old t New Will require investigatin may be OK Suggests a pssible way f wrking??? 11th arch, 2004 Stephen Hillier, University f Birmingham 5
ssible slice test setup Reminder: 2 s per Slice test has 4 s Therefre: U T Feed tw gd s with data Other tw s in playback (with zer data) All data int new s is cntrlled - backplane between new s tested fully Dn t need ROD data fr ld (utside) s U T 11th arch, 2004 Stephen Hillier, University f Birmingham 6
Frward planning Acceptance testing (at BHA) will require: re hardware D we need s, RODs at Birmingham If yes, need ne (tw?) VE64 9U crates Or culd we use just LSs and 6U RODs? Or even just glink sinks (preferably nt) Better sftware Abut 60 s t test urrently takes ~1 week each We haven t gt 60 weeks! Need t develp a test suite fr all inputs, utputs, internals 11th arch, 2004 Stephen Hillier, University f Birmingham 7
New glink frmat? urrent frmat is 84 ticks per slice an t run this with 5 slices at 100 khz ntains redundant infrmatin arity and Link Errr flags duplicated One LVDS pair cntains tw channels, and each channel is cntained in read-ut data separately, with each flag Easy t define frmat with same inf in 76 ticks But is it wrth the effrt? New Serialiser firmware New RO firmware New ROD frmatting firmware And if s, when? 11th arch, 2004 Stephen Hillier, University f Birmingham 8
nclusins Lking frward t seeing new Als keen t try ut (in sme frm) Thugh have a little wrk t d first (bcmuxing) If new basically sund, we re in a gd psitin fr slice and beam tests What t d abut TTdec? aybe we dn t need t d anything (fr the anyway) 11th arch, 2004 Stephen Hillier, University f Birmingham 9