TOSHIBA Field Effect Transistor Silicon P-Channel MOS Type (Ultra-High-Speed U-MOSIII) High Efficiency DC/DC Converter Applications Notebook PC Applications Portable Equipment Applications CCFL Inverter Applications Unit: mm Small footprint due to a small and thin package High speed switching Small gate charge: QSW = 9.7 nc (typ.) Low drain-source ON-resistance: RDS (ON) = 24mΩ (typ.) High forward transfer admittance: Yfs =14 S (typ.) Low leakage current: IDSS = µa (max) (VDS = V) Enhancement mode: Vth =.8 to 2. V (VDS = V, ID = 1 ma) Maximum Ratings () Characteristic Symbol Rating Unit Drain-source voltage V DSS V Drain-gate voltage (R GS = 2 kω) V DGR V Gate-source voltage V GSS ±2 V Drain current DC (Note 1) I D 7.5 A Pulsed (Note 1) I DP 3 Drain power dissipation (t = 1 s) (Note 2a) P D 1.9 W Drain power dissipation (t = 1 s) (Note 2b) P D 1. W Single-pulse avalanche energy (Note 3) E AS 26 mj Avalanche current I AR 7.5 A Repetitive avalanche energy (Note 2a) (Note 4) E AR.12 mj Channel temperature T ch 15 C Storage temperature range T stg 55 to 15 C Note: For Notes 1 to 4, refer to the next page. JEDEC JEITA TOSHIBA 2-6J1B Weight:.85 g (typ.) Circuit Configuration 8 7 6 5 1 2 3 4 This transistor is an electrostatic-sensitive device. Handle with care. 1
Thermal Characteristics Characteristic Symbol Max Unit Thermal resistance, channel to ambient (t = 1 s) (Note 2a) Thermal resistance, channel to ambient (t = 1 s) (Note 2b) R th (ch-a) 65.8 C/W R th (ch-a) 125 C/W Marking (Note 5) TPC8116 H Part No. (or abbreviation code) Lot No. A line indicates lead (Pb)-free package or lead (Pb)-free finish. Note 1: The channel temperature should not exceed 15 C during use. Note 2: (a) Device mounted on a glass-epoxy board (a) (b) Device mounted on a glass-epoxy board (b) FR-4 25.4 25.4.8 (Unit: mm) FR-4 25.4 25.4.8 (Unit: mm) (a) (b) Note 3: V DD = 24 V, T ch = 25 C (initial), L =.5 mh, R G = 25 Ω, I AR = 7.5 A Note 4: Repetitive rating: pulse width limited by max channel temperature Note 5: on the lower left of the marking indicates Pin 1. * Weekly code: (Three digits) Week of manufacture (1 for first week of the year, continuing up to 52 or 53) Year of manufacture (The last digit of the calendar year) 2
Electrical Characteristics () Characteristic Symbol Test Condition Min Typ. Max Unit Gate leakage current I GSS V GS = ±16 V, V DS = V ±1 µa Drain cutoff current I DSS V DS = V, V GS = V µa Drain-source breakdown voltage V (BR) DSS I D = ma, V GS = V V V (BR) DSX I D = ma, V GS = 2 V Gate threshold voltage V th V DS = V, I D = 1 ma.8 2. V Drain-source ON-resistance R DS (ON) V GS =.5 V, I D = 3.8 A 29 37 mω V GS = V, I D = 3.8 A 24 3 Forward transfer admittance Y fs V DS = V, I D = 3.8 A 7 14 S Input capacitance C iss 119 Reverse transfer capacitance C rss V DS = V, V GS = V, f = 1 MHz 17 pf Output capacitance C oss 25 Switching time Rise time t r V V I D = 3.8 A 5 GS V OUT -1 V Turn-on time t on 12 Fall time t f 12 V DD V Duty < = 1%, t w = 1 µs Turn-off time t off 43 4.7 Ω RL = 5.3Ω ns Total gate charge (gate-source plus gate-drain) Q g V DD 32 V, V GS =V, I D = 7.5A V DD 32 V, V GS = 5 V, I D = 7.5A 27 15 Gate-source charge 1 Q gs1 3.2 Gate-drain ( Miller ) charge Q gd V DD 32 V, V GS = V, I D = 7.5A 8.1 Gate switch charge Q SW 9.7 nc Source-Drain Ratings and Characteristics () Characteristic Symbol Test Condition Min Typ. Max Unit Drain reverse current Pulse (Note 1) I DRP 3 A Forward voltage (diode) V DSF I DR = 7.5 A, V GS = V 1.2 V 3
6 2 6.5 I D V DS 3.4 3.2 3 2.8 2.7 2.6 2.5 VGS = 2.4 V 16 12.5 6 I D V DS 3.4 3.2 3 2.8 2.6 VGS = 2.4 V.2.4.6.8 1..4.8 1.2 1.6 2. 3 25 15 5 VDS = V 1 25 I D V GS Ta = 55 C Drain-source voltage VDS (V).5.4.3.2.1 V DS V GS Ta = 25 ID = 7.5 A 3.8 1.9 1 2 3 Gate-source voltage V GS (V) 5 2 6 12 Gate-source voltage V GS (V) Y fs I D R DS (ON) I D Forward transfer admittance Yfs (S) 1 1 1 VDS = V Ta = 55 C 25 1.1.1 1 Drain-source ON-resistance RDS (ON) (mω) 3 1 3 1.5 V VGS = V 3.1 1 Drain current I D (A) Drain current I D (A) 4
R DS (ON) Ta I DR V DS Drain-source ON-resistance RDS (ON) (mω) 5 4 3 2 1 VGS =.5 V V ID = 7.5 A 3.8 ID = 1.9/ 3.8/ 7.5A 4 8 12 1.9 16 Drain reverse current IDR (A) 1.5 1 VGS = V.1.2.4.6.8 1. 1.2 3 Ambient temperature Ta ( C) Capacitance V DS V th Ta 1 2. Capacitance C (pf) 1 1 1.1 VGS = V f = 1 MHz Ciss Coss Crss 1 Gate threshold voltage Vth (V) 1.6 1.2.8.4 VDS = V ID = 1 ma 4 8 12 16 Ambient temperature Ta ( C) Drain power dissipation PD (W) 2. 1.6 1.2.8.4 (1) (2) P D Ta (1) Device mounted on a glass-epoxy board (a) (Note 2a) (2) Device mounted on a glass-epoxy board (b) (Note 2b) t=1s 5 1 15 2 Drain-source voltage VDS (V) 5 3 ID = 7.5 A VDS 1 Dynamic input/output characteristics VGS 16 2 3 VDD = 32 V 4 16 12 5 Gate-source voltage VGS (V) Ambient temperature Ta ( C) Total gate charge Q g (nc) 5
r th t w Transient thermal impedance rth ( C/W) 1 (1) Device mounted on a glass-epoxy board (a) (Note 2a) (2) Device mounted on a glass-epoxy board (b) (Note 2b) (2) 1 (1) 1 1 Single - pulse.1.1.1.1 1 1 1 1 Pulse width t w (s) Safe operating area ID max (Pulse) * 1 1 ms * * Single - pulse Curves must be derated linearly t =1 ms * with increase in temperature. VDSS max.1.1 1 6
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