CARLETON UNIVERSITY Deparment of Electronics ELEC 2607 Switching Circuits January 17, 2005 Laboratory 1. Overview; A 4-Bit Binary Comparator X 3 X 2 X 1 X 0 COMPARATOR Y 3 Y 2 Y 1 Y 0 4 DATA BITS LEAST SIGNIFC BIT LEAST SIGNIFC BIT Decimal X Y 11 11 11 10 10 11 1 8 12 11 Lx Ly Lx Ly X = Y 0 0 X > Y 1 0 X < Y 0 1 never 1 1 happens Examples X Y X 3 X 2 X 1 X 0 Y 3 Y 2 Y 1 Y 0 Lx Ly 1 0 1 1 1 0 1 1 0 0 1 0 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 0 0 1 1 0 0 0 0 1 1 1 0 0 1 0 1 1 1 0 imal Take a 4-bit binary number X, for example 1011. This number is made of bits which we will call X 3 X 2 X 1 X 0. Thus X 3 =1, X 2 =0, X 1 =1, X 0 =1. In this lab, we will write full number like X in boldface, the individual bits are written with a subscript and with a normal font. A binary comparator compares two binary numbers nd Y. It can tell if X is larger, smaller, or equal to Y. The comparator in this lab will compare two 4-bit nonnegative binary numbers, and displays the result on two lights called Lx and Ly.. FIGURE 1: A block diagram of the circuit, showing the Review of Binary Numbers meanings of Lx and Ly, and some example comparisons decbinary 15 1111 14 1110 13 1101 12 1100 11 1011 10 1010 9 1001 8 1000 7 0111 6 0110 5 0101 4 0100 3 0011 2 0010 1 0001 0 0000 This comparator is designed by breaking its circuit into subcircuits or blocks. Each block does a small part of the job. They can be made identical, which will save design work. Each subcircuit will compare two 2-bit numbers, say and. The outputs will be two 1-bit numbers a and a.. These outputs have been carefully chosen so that the outputs of two comparators like COMP 32 and COMP 10, shown below, can be themselves compared with an identical subcircuit. The output of this third block will be the desired output to light Lx and Ly J.Knight, January 17, 05 SWITCHING CIRCUITS Lab 1-1
J.Knight, January 17, 05 SWITCHING CIRCUITS Lab1-2 FIGURE 2: Subcircuit or block COMP ba a a X 3 X 2 X 1 X 0 Y 3 Y 2 Y 1 Y 0 COMP 32 X 32 Y 32 COMP 10 X 10 Y 10 Comparator to compare two 4-bit numbers made from three subcircuits. a a = 0 0 > 1 0 < 0 1 Unused Output 1 1 X 3210 Y 3210 Lx Ly All three blocks can be made identical. However it turns out that can be made simpler than the other two. FIGURE 3: Examples with numerical binary inputs:. X 3 =1 X 2 =1 X 1 =0 X 0 =0 Y 3 =1 Y 2 =1 Y 1 =0 Y 0 =1 X 3 =0 X 2 =0 Y 3 =0 Y 2 =1 X 1 =1 X 0 =0 Y 1 =0 Y 0 =1 COMP 32 X 32 =0 0 Y 32 =0 0 0 COMP 10 X 10 =0 Y 10 =1 1 COMP 32 X 32 =0 0 Y 32 =1 1 1 COMP 10 X 10 =1 Y 10 =0 0 X 3210 =0 Y 3210 =1 Lx Ly X 3210 =0 Y 3210 =1 Lx Ly Boolean Algebra Summary The Universe is 0 and 1, no other numbers are used. Operators: 0+0=0 0+1=1 OR, written as +; A+B=C means C=1 if either A OR B OR both are 1 1+0=1 1+1=1, written as ; A B=C means C=1 if A B are both are 1. 0 0=0 0 1=0 NOT, written as an overbar, x; if x=1, x=0. 1 0=0 1 1=1 Associative (A+B)+C=A+(B+C), (A B) C = A (B C) 0=1 1=0 Commutative A+B=B+A, A B=B A Distributive A(B+C)=A B+A C Theorems: DeMorgan stheorems: Simplification x+x = x x x = x x+x = 1 x x = 0 x = x A + B = (A B) A B+B =B x 1=x x+1=1 x 0=0 x+0=x x + x = 1 (A + B) =A B A B+B = A + B Lab 1-2 SWITCHING CIRCUITS J.Knight, January 17, 2005
Prelab This must be prepared prior to the scheduled lab session. It will be checked near the start of the lab. The prelab is the basis for the design part of the lab report. However it usually needs considerable cleaning up and editing for the final report. 1.1 Complete the truth table, Fig. 4 (p. 3), for the generic comparator subcircuit, relating the inputs to the outputs. The inputs in the figure are in binary order. Rearrange them so the terms with a =1 are at the top, followed by those with a =1 and ending with those with no outputs. See Fig. 5 (p. 3). FIGURE 4: Incomplete the truth table for the generic comparator subcircuit. COMP ba Ya a Yba b b = 0 0 > 1 0 < 0 1 Unused Output 1 1 inputs outputs a a Boolean function to get a 1 output Comparison as for this particular line of inputs 2-bit a a binary numbers. 0 0 0 0 0 0 = 0 0 0 1 0 1 < 0 0 1 0 0 1 < 0 0 1 1 0 1 < - - - - - - - - - - - - - - - - - - - - - - 0 1 0 0 1 0 > 0 1 0 1 0 0 = 0 1 1 0 0 1 < 0 1 1 1 0 1 < - - - - - - - - - - - - - - - - - - - - - - 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 - - - - - - - - - - - - - - - - - - - - - - 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 As an example, we will find the equations relating,,, to a. We will do this for the partial table in Fig. 5 (p. 3). Note that a =1 for:,,, = 0,0,0,1 or 0,0,1,0 or 0,0,1,1 or 0,1,1,0 or 0,1,1,1 or 1,0,1,1. If,,, = 0,0,0,1 then = 0 0 0 1 =1 If,,, = 0,0,1,0 then = 0 0 1 0 =1 If,,, = 0,0,1,1 then = 0 0 1 1 =1 If,,, = 0,1,1,0 then = 0 1 1 0 =1 FIGURE 5: Rearrangement of part of Fig. 4 (p. 3) so the a =1 terms are all at the top. inputs outputs a a 0 0 0 1 0 1 0 0 1 0 0 1 0 0 1 1 0 1-0 Expression to generate a 0 1 1 0 0 1 0 1 1 1 0 1 1 0 1 1 0 1 All other inputs J.Knight,January 17, 05 SWITCHING CIRCUITS Lab 1-3
J.Knight, January 17, 05 SWITCHING CIRCUITS Lab1-4 If,,, = 0,1,1,1 then = 0 1 1 1 =1 a is 1, if one or more of the six expressions above are 1. This statement is the same as taking the Boolean OR(+) of the six expressions. 1st term 2nd 3rd term 4th 5th 6th a = + + + + + Equ (1) One does not have to consider cases when a =0 in the expression above. In Boolean Algebra a can only take on values of 1 or 0. If it is not 1, it defaults to 0. 1.2 Find the logic equation relating,,, to a using the completed truth table of Fig. 4 (p. 3). 1.3 One needs to simplify the equation for a to reduce its size. For example, in expression Equ(1), the 2nd, 3rd, 4th and 5rd terms have two common variables, and. Considering only those four terms gives - + + +. = + + + (rearrange to put in the front) = ( + + + ) (factor out ) = ( ( + ) + ( + )) Equ(2) = you do the rest using the theorems for x+x and x 1. 1.4 Since x+x=x, one can reuse terms that were included in Equ(2). Thus reusing the 3rd term gives 1st term reused 3rd reduced 2nd 3rd 4th & 5th terms from Equ(2) 6th a = + + ( ( + ) + ( + )) + Note the 1st and reused3rd terms have three common letters. One can simplify the 1st term by combining with the reused 3rd term. + ( 1st + 3rd ) = ( + ) (factor out 3 letters) Equ(3) = you do the rest 1.5 Write Equ(2) + Equ(3), that is Equ(2) ORed with Equ(3). This is equivalent to the first 5 terms of Equ(1). The result should have 5 letters not counting subscripts. 1.6 The 6th term has still to be reduced and then included in the final simplified version of Equ(1). This 6th term has three common letters with another term. Reduce those two terms to three letters. 1.7 Simplify the complete equations for a. It can be reduced to 8 letters 1.8 Write the complete simplified equation for a. You can derive it following the step used for a. However one can also write it by thinking how to change a circuit to calculate Y>X, into one to calculate X>Y. From the equations one can draw a schematic diagram using, OR and INVERT gates. For example Fig. 6 (p. 4) shows the schematic for Equ(2) + Equ(3). FIGURE 6: Equ(2) ORed with Equ(3). 1.9 Incorporating Fig. 6 (p. 4), draw a schematic of a circuit to implement the complete equations for a using, OR and NOT gates. OR This is only part of the complete circuit for Equ(1) Lab 1-4 SWITCHING CIRCUITS J.Knight, January 17, 2005
1.10 Draw the schematic to calculate a. Except for the input changes, this should look exactly like the circuit for a. 1.11 Consider the lower block. From the table in Fig. 1 (p. 1), observe that the output X 32, Y 32 =1,1 never comes out of block COMP 32 Thus in the position where X 3 Y 3 X 2 Y 2 X 1 Y 1 X 0 Y 0 X 32, Y 32 = 1,1 in the table for, one can make the output of anything one wishes, it will never COMP 32 X 32 Y 32 X 10 COMP 10 Y 10 happen. Never 1,1 Never 1,1 We call such outputs (for inputs that never happen) don t care outputs. We can have made these outputs 00, 01, 10 or 11, but here we will make them 00. X 3210 Y 3210 The truth table of Fig. 4 (p. 3) has been partially redone to apply to under the conditions that X 32, Y 32 =1,1 and X 10, Y 10 =1,1 never happen, so the corresponding outputs can be made 0,0 FIGURE 7: A truth table for. showing don t care outputs. These have been made 00 here. X 32 X 10 Y 32 Y 10 X 3210 Y 3210 a a a a Comparison as 2-bit binary. 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 1 1 0 1 = < < < 0 1 0 0 1 0 > 0 1 0 1 0 0 make these outputs 0,0 Never get = 0 1 1 0 0 1 < 0 1 1 1 0 0 make these outputs 0,0 Never get =1= 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 make these outputs 0,0 make these outputs 0,0 make these outputs 0,0 make these outputs 0,0 make these outputs 0,0 Never get =1= Never get =1= - - - - - Never get =1= Never get =1= Never get =1= or =1= 1.12 Find the equation for Y 3210 from the truth table above. Alternately, use the method at the end of p. 9, which will give a simple answer using a more thought provoking method. 1.13 Minimize the logic for Y 3210 to give two 3-input s, an OR, and some NOTs. It may be useful to use formula, A + AB = A + B. 1.14 Derive the formula for X 3210. 1 Again it is very symmetrical with Y 3210. 1. As a check go to Fig. 5 (p. 3), and remove all the terms where =1= and those where =1=. J.Knight,January 17, 05 SWITCHING CIRCUITS Lab 1-5
J.Knight, January 17, 05 SWITCHING CIRCUITS Lab1-6 When drawing a theoretical circuit for a logic equation, one typically uses and OR gates. In practice, N and NOR gates are much easier to build. Thus real logic is built with NS and NORs. On the Tektron logic board used in the lab (see p. 10), the available gates are mostly Ns and NORs. The board contains only four 2-input s and four 2-input ORs. These are barely enough s and ORs for one comparator block. However you can easily implement your circuits using N gates (an gate with an inverted output), and perhaps NOR gates (an OR with an inverted output). 1.15 Use the diagram of the Tektron Logic Lab on p. 10, to count the gates of each type. Add the missing counts to Fig. 8 (p. 6). dual 2-input -NOR 2-input 3-input 2-input OR 2-input XOR 4 available 3 available 4 available 4 available 4 available FIGURE 8: 2-input N 3-input N 4-input N 2-input NOR NOT (Inverter) 1.16 There is a very important theorem, called DeMorgan s theorem, that will soon be done in the lectures. It proves that an N gate is equivalent to an OR gate with both inputs inverted. The top of Fig. 9 (p. 6) shows the two equivalent forms for N and for NOR. The lower part shows how to build circuits made of s followed by an OR using only the plentiful N gates. FIGURE 9: Demorgan s Theorem A B N C A B also N A B = C = A + B C D E NOR F D E D + E = F = D E also NOR By using DeMorgan on the N gate symbol, one gets another equally valid symbol.- Both the with a negated output and the OR with negated inputs are equally valid symbols for a N gate. Ns with 3 or more inputs convert to an OR with 3 or more inverted inputs. In the same way, the NOR gate has two equally valid forms. F X W U V OR Z = X W + U V X W U V N N N Z = X W + U V These inversions cancel each other Placing inverting circles back-to-back makes it possible to add negating circles to the outputs of the s, and the inputs of the OR, without changing the circuit function. This changes all three gates to N gates. X W U V N N N Z = X W + U V FIGURE 10: Converting Fig. 6 (p. 4) to a dual 2-input -NOR gates using DeMorgan s theorem You will likely need to use this circuit. OR OR OR OR Start with this Fig 6 Use A Β C= (A Β) C Shrink inverters to input circles Use Demorgan s Theorem Lab 1-6 SWITCHING CIRCUITS J.Knight, January 17, 2005
You will need to revise the circuit for the generic comparator subcircuit using only gates which will be available in the Tektron Logic Lab. Further, you must keep within your gate count. 1.17 Revise the circuits for COMP 32 and COMP 10 to use only gates and quantities available on the logic trainer. FIGURE 11: Some handy gate equivalences The same circuit is used for both of the COMP 32 and COMP 10 blocks in Fig. 2 (p. 2). The two circuits should be identical. This will make them much easier to build. (A+B)+C=A+B+C Use DeMorgan to see this Be sure there are enough gates of the right types to build the two subcircuits. 1.18 Draw a circuit for using s ORs and inverters. 1.19 Redraw using gates available on the logic trainer, which were not previously used. 1.20 The complete circuit you are about to build is likely larger than anything you have wired before. It is essential to plan it systematically. We strongly suggest the following Take the schematic diagrams of the generic subcircuit using the gates available on the logic trainer. Make sure it is uncrowded and neat without scratched out lines, or bubbles, s changed to ORs by scratching over the top, ditto marks, etc. Write the equation for the subcircuit underneath it. Use a separate sheet of paper from the wiring diagrams described next. Take the diagram of the Tektron logic lab. Select the gates you will use for each subcircuit. Draw a balloon around the gates in each block or, as done on the right, for each half-block. Fill in the detailed wiring within the subcircuit. Use textual names to show the input and output signals entering or leaving your balloon, rather than the wires. If you show too much wiring your drawing will be so cluttered it will become useless. Use lines to show the shorter wires inside the balloons. Try using different colors. a = ( + )( + ) a COMP ba(x) FIGURE 12: A schematic using Y gates ab from the logic trainer FIGURE 13: A wiring diagram. You need this! Each subcircuit uses a column in the Textron lab X 2 X 3 COMP 32(X) X 32 Y 2 Y 3 COMP 32(Y) 1.21 The bottom block is simpler. Again be sure you have a good clear schematic using the available gates. Then add the wiring to the Tektron layout sheet. Y 3 balloon Y 2 X 3 X 2 J.Knight,January 17, 05 SWITCHING CIRCUITS Lab 1-7
J.Knight, January 17, 05 SWITCHING CIRCUITS Lab1-8 Testing Your Circuit. 1.22 You will need a set of test inputs to thoroughly test your subcircuits. Complete the table to use for testing. END OF PRELAB Constructing Your Circuit. Are you psychologically unprepared for the fact that they could make a wiring mistake? If so you will wire the whole darn circuit and then test it. We suggest you build and test the circuit in parts. Look on p 11 to see why. Debugging five gates is far easier than debugging twenty-five.. 2.23 Choose four switches for the X input and four for the Y input. Choose lights for X 3210 = L x and Y 3210 = L y, the final output. Choose two other pairs of lights to display X 32 -Y 32, and X 10 -Y 10 2.24 When wiring, push each lead firmly into the hole. Then grip the lead by the metal tip and give it a slight (10 degree) twist after inserting a a 1 1 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 0 0 1 0 0 1 1 1 0 1 0 1 0 1 0 0 0 1 1 0 0 0 1 0 0 1 0 1 1 1 0 1 0 1 0 1 1 0 0 1 0 0 0 1 1 1 0 1 0 1 0 1 1 0 0 1 0 0 SWITCH OUTPUTS LAMP INPUTS X 32 Y 32 X 10 Y 10 used for No No Lx Ly 1 2 3 4 5 6 7 8 X3 X2 X1 X0 Y3 Y2 Y1 Y0 9 10 FIGURE 14: Insert lead 2.25 Construct COMP 10 : Wire the subcircuit. Wire X 0 and Y 0 to the switches. Wire X 1 and Y 1 to the switches. Wire X 10 and Y 10 their lights. Test the subcircuit COMP 10. 2.26 Construct COMP 32 in the same way. Then test it too! Twist lead 3 X1 2.27 Construct. Do not be in a hurry to connect it to the other blocks. First: Wire X 32 and Y 32 to two spare switches such as such as 8 and 9, to aid debugging. 7 Y1 X 0 X 1 X 10 COMP10 Y 1 Y 10 Y 0 4 X0 X 10 Y 10 8 Y0 9 10 Lab 1-8 SWITCHING CIRCUITS J.Knight, January 17, 2005
There are no more spare switches, but you can temporarily wire X 10 and Y 10 to the push buttons. Wire outputs X 3210 and Y 3210 to the L x and L y lights respectively. You can now test the subcircuit. Remember the don t care inputs should give 00 output PULSE OUTPUTS X 32 X 10 X 3210 1 2 3 temporary connections Y 10 Y 3210 Y 32 Lx 9 Ly 10 2.28 Remove the temporary connections and wire the complete comparator as it should be. 2.29 Debugging: Most of the troubles are poorly inserted wires. Reread Step 2.24(p. 8). A common symptom is lights that change when you place the flat of you hand on top of the mess of wires. Take a spare light and connect a long lead on it. You can touch the other end of the lead to any other lead to tell if that other lead is 1 or 0. Sometimes the big white plastic connection boards are loose in the connector in the wooden frame. Push the heel of your hand on the plastic on the side of the board and push them in. If you are really having trouble it may be useful to use two trainers. Place them side by side and connect the GROUND connections by a lead. This will give you some extra debugging lights, and some less cluttered space. Check out and Clean Up When your circuit works, demonstrate it to the teaching assistant. After demonstrating clean up your board, sort the leads, and put them back in their box. We have a contract with Lord Voldemont to deal with students who do not clean up. Alternate Derivation of X 3210 and Y 3210 Use the fact that X 32 and Y 32 cannot both be 1, (only one input number can be larger), further X 10 and Y 10 cannot both be 1. If X 32 =1, then Y 32 cannot be 1 thus X>Y, i.e. X 3210 =1 (X is the two-bit number X 32 X 10, Y is the 2-bit number Y 32 Y 10 ) X 32 Y 32 X 10 Y10 If X 32 =0 and Y 32 =0, then one must look at the lower bits, X 10 and Y 10. In this case, if X 10 =1, then Y 10 cannot be 1 thus X>Y, i.e. X 3210 =1 Thus one also gets X 3210 =1 if X 32 =0 and Y 32 =0 and X 10 =1. Otherwise X<Y, or X=Y. Writing this as an equation X 3210 = X 32 +... (You finish it) (X>Y) X 3210 Y 3210 (Y>X) J.Knight,January 17, 05 SWITCHING CIRCUITS Lab 1-9
Partial Layout of The Tektron Logic Lab. You should not need the JK flip-flops and RS latches which were omitted. PULSE OUTPUTS 1 2 3 CONSTANT OUTPUTS TEKTRON COMPUTER LOGIC LAB 1 0 SWITCH OUTPUTS LAMP INPUTS 1 2 3 4 5 6 7 8 9 10 J.Knight, January 17, 05 Lab 1-10 DIGITAL ELECTRONICS
FIGURE 15: A typical completed 4-bit binary comparator. A good working circuit, but not to be taken as an outstanding model for layout Off-On switch for another trainer. X 3210 Y 3210 x 3 x 2 x 1 x 0 y 3 y 2 y 1 y 0 J.Knight,January 17, 05 SWITCHING CIRCUITS Lab 1-11
J.Knight, January 17, 05 SWITCHING CIRCUITS Lab1-12 Lab 1-12 SWITCHING CIRCUITS J.Knight, January 17, 2005