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Flash Memory Cell Compact Modeling Using PSP Model Anthony Maure IM2NP Institute UMR CNRS 6137 (Marseille-France) STMicroelectronics (Rousset-France)

Outline Motivation Background PSP-Based Flash cell model Characterization procedure Simulations Conclusions

Motivation Background PSP-Based Flash cell model Characterization procedure Simulations Conclusions

Motivation 1/4 Semiconductor memories classification Semiconductor Memories Volatile Memories Non-Volatile Memories Programmable Permanent Storage DRAM SRAM EPROM EEPROM Flash ROM

Motivation 2/4 Semiconductor memories market EEPROM SRAM ROM Flash EPROM EEPROM SRAM ROM EPROM Flash EEPROM SRAM ROM EPROM Flash DRAM DRAM DRAM 1996 2000 2006 Total : $36 billion Total : $49 billion Total : $61 billion Flash 7% Flash 21% Flash 36%

Motivation 3/4 Flash memory cell applications Memory cards Digital still cameras USB flash drives Digital video cameras Handheld computers Cellular phones Digital audio players Game consoles

Motivation 4/4 Flash memory cell for designers To integrate circuit simulators and to perform multi-cell simulations : > compact modeling approach > adapted and flexible language (Verilog-A) To include physical effects appropriate for small component : > based on an advanced description (PSP MOS model) Accurate electrical behavior for modern technologies: > complete characterization procedure

Motivation Background PSP-Based Flash cell model Characterization procedure Simulations Conclusions

Background 1/4 Flash Memory Cell : Capacitive structure and injection currents Control Gate polysi Oxide Floating Gate polysi Oxide Bulk P Source N+ Drain N+

Background 1/4 Flash Memory Cell : Capacitive structure and injection currents Control Gate polysi C PP Floating Gate polysi C OX Bulk P Source N+ Drain N+

Background 1/4 Flash Memory Cell : Capacitive structure and injection currents Control Gate polysi C PP Floating Gate polysi I CHE I FN I FN C OX I FN Bulk P Source N+ Drain N+

Background 2/4 Erased and Programmed modes : G Id Id S B D «1» UV «0» Id(«1») V T = V T UV Q C FG PP Id(«0») Vt V READ Vgs

Background 3/4 Injection Currents : Fowler-Nordheim tunneling Negative charge evacuation from floating gate e - E F q*v GB E C E F E B G Floating gate n+ Bulk p poly Si SiO 2 Si S B D I FN = α. S. E TUN 2 e β E TUN

Background 4/4 Injection Currents : Channel Hot Electron current Negative charge injection into floating gate Floating gate e - EFIELD Oxide Channel e - Drain h + E FIELD Depleted zone S G B D I CHE = A D. I AVL. e A E D exp TUND

Motivation Background PSP-Based Flash cell model Characterization procedure Simulations Conclusions

PSP-based Flash cell model 1/4 The PSP MOS model Developed by Philips Research and Penn State University. (first version 2006) Compact surface-potential based model. Relevant physical effects (mobility reduction, velocity saturation, DIBL, GIDL ) Source/Drain junctions are described using the JUNCAP2 diode model. Possibility of including temperature and geometrical scaling rules.

PSP-based Flash cell model 1/4 The PSP MOS model Developed by Philips Research and Penn State University. (first version 2006) Pao-Sah Advanced compact MOS models Compact surface-potential based model. Charge Sheet Model MM9 (Philips) Relevant physical effects (mobility reduction, velocity saturation, DIBL, GIDL ) Source/Drain junctions are described using the JUNCAP2 diode model. SP (Penn State University) MM11 (Philips) Possibility of including temperature and geometrical scaling rules. PSP

PSP-based Flash cell model 2/4 Addition of the C PP capacitor using a charge neutrality equation C PP Control Gate Floating Gate Q GI, Q GS and Q GD values are calculated by PSP model. Q GS Source Q GI Bulk Q GD Drain They depend on V FG, V B, V S and V D (Equivalent MOS electrodes). Q FG = Q GI + Q GS + Q GD + C PP ( V V ) FG CG Implicit computation of V FG

PSP-based Flash cell model 3/4 Addition of the injection currents From surface potentials, vertical electric fields through tunnel oxide can be computed G S D B Fowler-Nordheim current I FN = α. S. E 2 TUN e β E TUN

PSP-based Flash cell model 3/4 Addition of the injection currents From surface potentials, vertical electric fields through tunnel oxide can be computed G S D B Channel Hot Electron current I CHE = A D. I AVL. e A E D exp TUND

PSP-based Flash cell model 4/4 Computation scheme Static relation Q FG = Q GI + Q GS + Q GD + C PP ( V V ) FG CG Dynamic relation Q = Q + ( I + I dt FG FG0 FN CHE )

PSP-based Flash cell model 4/4 Computation scheme Static relation Q FG = Q GI + Q GS + Q GD + C PP ( V V ) FG CG Dynamic relation Q = Q + ( I + I dt FG FG0 FN CHE ) Q FG V CG V FG V B, V S, V D Q GI, Q GS, Q GD

PSP-based Flash cell model 4/4 Computation scheme Static relation Q FG = Q GI + Q GS + Q GD + C PP ( V V ) FG CG Dynamic relation Q = Q + ( I + I dt FG FG0 FN CHE ) Q FG0 Q FG E TUN, I FN, I CHE V CG V FG V B, V S, V D Q GI, Q GS, Q GD

Motivation Background PSP-Based Flash cell model Characterization procedure Simulations Conclusions

Characterization procedure 1/4 Characterization procedure diagram PSP model card extraction on dummy cell (optionally including thermal and geometrical scaling effects) Hot carriers injection calibration on dummy cell Using Ig@Vg and Ib@Vg characteristics } Dummy cell s cg = fg b d Fowler-Nordheim tunneling on a tunnel capacitor } Capacitors Inter-polysilicium capacitor characterization Checking of the programming window and fine tuning } Flash cell s cg b d

Characterization procedure 2/4 PSP model card extraction using a dummy cell

Characterization procedure 3/4 Injection current calibration

Characterization procedure 4/4 Fine tuning on real cell characteristics

Motivation Background PSP-Based Flash cell model Characterization procedure Simulations Conclusions

Simulations 1/2 Dynamic reliability (example) V T evolutions are compared with a standard programming polarization. V T error after programming < 0.5 V

Simulations 2/2 Overall performances Simulation slower than the single PSP model +5 % for DC simulation +70 % for transient simulation Internal data can be observed (as V FG ) General behavior concords with theory.

Motivation Background PSP-Based Flash cell model Characterization procedure Simulations Conclusions

Conclusions The proposed Flash memory cell model : - is compact to integrate common circuit simulators. - takes advantage of a MOS channel advanced description (using PSP). - is written with a flexible code (Verilog-A). - can perform both DC and transient simulations. - is adapted for analysis about consumption or injection rates.

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