19-654; Rev ; 11/6 General Description The high-voltage linear regulator is designed to operate from a +5V to +28V input voltage, and withstands up to 4V transients. The device consumes only 45µA of quiescent current at 1µA output current. The delivers up to 1mA of output current with low 5mV maximum dropout voltage. The provides an active-low open-drain microprocessor RESET output. The reset timeout period is programmable and can be set with an external capacitor. The includes an uncommitted comparator for input voltage monitoring/power-fail indication. The device is available with a fixed +5V (A) or +3.3V (B) output. The is short-circuit protected and includes thermal shutdown. The operates over the -4 C to +125 C automotive temperature range and is available in 8-pin, thermally enhanced TDFN and SO-EP packages. Automotive Industrial Applications Home Security/Safety Telecom/Networking Features +5V to +28V Wide Operating Input Voltage Range Withstands 4V Input Voltage Transients Guaranteed 1mA Output Current 45µA Typical Quiescent Current at 1µA Output Current Preset +5V (A) or +3.3V (B) Output Voltage Stable with Only 1µF Output Capacitance RESET Output with Adjustable Timeout Period Uncommitted Comparator for Voltage Monitoring/Power-Fail Indication Output Overload and Short-Circuit Protection Thermal Shutdown Available in 8-Pin TDFN (1.95W at T A = +7 C) and 8-Pin SO (1.5W at T A = +7 C) Operates Over -4 C to +125 C Automotive Temperature Range Ordering Information PART PIN- PACKAGE Typical Application Circuit PRESET (V) Note: All devices specified for -4 C to +125 C operating temperature range. +Denotes lead-free package. *EP = Exposed paddle. PKG CODE TOP MARK AATA+T 8 TDFN-8 5 T833-2 +APB AASA+ 8 SO-EP* 5 S8E-14 BATA+T 8 TDFN-8 3.3 T833-2 +APC BASA+ 8 SO-EP* 3.3 S8E-14 Pin Configurations +5V TO +28V V IN RH 288kΩ RL 1kΩ OFF CIN 1μF ON CCT.1μF V S EN SI CT RES SO GND +5V (A)/ +3.3V (B) 1mA RRES 1kΩ RSO 1kΩ COUT 1μF μc RESET POWER- FAIL TOP VIEW SO RES GND + 8 7 6 5 EXPOSED PADDLE 1 2 3 4 V S SI EN CT TDFN (3mm x 3mm) Pin Configurations continued at end of data sheet. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim s website at www.maxim-ic.com.
ABSOLUTE MAXIMUM RATINGS V S to GND...-.3V to +28V V S to GND (t 1s)...-.3V to +4V to GND...-.3V to +2V V S to OUT...-.3V to +28V RES, SO to GND...-.3V to +2V RES, SO Output Sink Current...5mA Short Circuit (V S 16V)...Continuous EN, SI to GND...-.3V to +12V CT to GND...-.3V to the lower of or +12V *As per JEDEC51 Standard (single-layer board). **As per JEDEC51 Standard (multilayer board). Continuous Power Dissipation (T A = +7 C) 8-Pin SO-EP (derate 19.2mW/ C above +7 C)...1538mW* Thermal Resistance (θ JA )...52 C/W Thermal Resistance (θ JC )...6 C/W 8-Pin TDFN-EP (derate 24.4mW/ C above +7 C)...1951mW** Thermal Resistance (θ JA )...41 C/W Thermal Resistance (θ JC )...8.3 C/W Operating Junction Temperature Range...-4 C to +125 C Maximum Junction Temperature...+15 C Storage Temperature Range...-6 C to +15 C Lead Temperature (soldering, 1s)...+3 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (A) (V S = +14V, = 5V, EN unconnected, T A = T J = -4 C to +125 C, C IN = 1µF, C OUT = 1µF, unless otherwise noted. Typical specifications are at T A = +25 C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Output Voltage Dropout Voltage V DP V S = +4.75V V S to Difference in Undervoltage T A = +25 C, I OUT = 1mA 4.95 5 5.5 5.6V V S 28V, I OUT = 1mA to 5mA (Note 2) 4.9 5 5.1 5.6V V S 4V, t 1s, I OUT = 1mA to 3mA (Note 2) 4.9 5 5.1 V S = +8V, I OUT = 1mA to 1mA 4.9 5 5.1 I OUT = 1mA.1.25 I OUT = 5mA.2.4 I OUT = 1mA.3.5 V IO V S = +4V, I OUT = 35mA.4 V Line Regulation V OL +5.5V V S +28V, I OUT = 1mA.6 5 mv Load Regulation V OLO 1mA I OUT 1mA 17 5 mv Current Limit I LIM 16 26 4 ma I OUT = 1µA 46 1 µa Quiescent Current I Q I OUT = 3µA 45 1 I OUT = 1mA 4.5 1 ma V V Shutdown Supply Current I SHDN V EN +.4V 17 3 µa Thermal-Shutdown Temperature Thermal-Shutdown Hysteresis T J(SHDN) Temperature rising +165 C ΔT J(SHDN) 2 C 2
ELECTRICAL CHARACTERISTICS (A) (continued) (V S = +14V, = 5V, EN unconnected, T A = T J = -4 C to +125 C, C IN = 1µF, C OUT = 1µF, unless otherwise noted. Typical specifications are at T A = +25 C.) (Note 1) RESET PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Reset Threshold Voltage V RT falling 85 9 94.5 % Reset Threshold Hysteresis V RTH 3 65 1 mv Reset Pulse Delay t RD C CT = 1nF, t R 1µs 55 11 18 ms RES Output Low Voltage V RL V S +1.5V,R RES = 1kΩ to.4 V RES Output High Leakage Current I RH V RES = 5V 1. µa Delay Comparator Threshold Delay Comparator Threshold Hysteresis V CTTH V CT rising 1.9 2.1 2.4 V 1 mv SENSE Sense Threshold V ST V SI falling 1.1 1.16 1.24 V Sense Threshold Hysteresis 5 1 15 mv Sense Output Low Voltage Sense Output Leakage Current V SL V SI 1.1V, V S 4V, R SO = 1kΩ to.4 V I SH V SO = 5V, V SI 1.5V 1 µa Sense Input Current I SI V SI = 3.3V -1 +1 µa ENABLE EN = high, regulator on 2.4 Enable Voltage V EN EN = low, regulator off.4 V Enable Internal Pullup Current I EN EN is internally pulled up to 3.6V (max) 3 µa 3
ELECTRICAL CHARACTERISTICS (B) (V S = +14V, = 3.3V, EN unconnected, T A = T J = -4 C to +125 C, C IN = 1µF, C OUT = 1µF, unless otherwise noted. Typical specifications are at T A = +25 C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Output Voltage V S to Difference in Undervoltage T A = +25 C, I OUT = 1mA 3.267 3.3 3.333 5V V S 28V, I OUT = 1mA to 5mA (Note 2) 3.234 3.3 3.366 5V V S 4V, t < 1s, I OUT = 1mA to 3mA (Note 2) 3.234 3.3 3.366 V S = +8V, I OUT = 1mA to 1mA 3.234 3.3 3.366 V IO V S = 3.5V, I OUT = 35mA.2.4 V Line Regulation V OL 5V V S 28V, I OUT = 1mA.6 5 mv Load Regulation V OLO 1mA I OUT 1mA 11 4 mv Current Limit I LIM 16 26 4 ma I OUT = 1µA 45 1 µa Quiescent Current I Q I OUT = 3µA 45 1 I OUT = 1mA 4.4 1 ma V Shutdown Supply Current Thermal-Shutdown Temperature Thermal-Shutdown Hysteresis RESET CIRCUIT I SHDN V EN.4V 17 3 µa T J (SHDN) Temperature rising +165 C ΔT J(SHDN) 2 C Reset Threshold Voltage V RT falling 85 9 94.5 % Reset Threshold Hysteresis V RTH 2 45 8 mv Reset Pulse Delay t RD C CT = 1nF, t R 1µs 55 15 18 ms RES Output-Low Voltage V RL V S 1.5V, R RES = 4kΩ to.4 V RES Output-High Leakage Current Delay Comparator Threshold Delay Comparator Threshold Hysteresis I RH V RES = 3.3V 1. µa V CTTH V CT rising 1.9 2.1 2.4 V 1 mv 4
ELECTRICAL CHARACTERISTICS (B) (continued) (V S = +14V, = 3.3V, EN unconnected, T A = T J = -4 C to +125 C, C IN = 1µF, C OUT = 1µF, unless otherwise noted. Typical specifications are at T A = +25 C.) (Note 1) SENSE PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Sense Threshold V ST V SI falling 1.9 1.15 1.23 V Sense Threshold Hysteresis 5 1 15 mv Sense Output-Low Voltage Sense Output Leakage Current V SL V SI 1.9V, V S 4V, R SO = 1kΩ to.4 V I SH V SO = 3.3V, V SI 1.5V 1 µa Sense Input Current I SI V SI = 3.3V -1 +1 µa ENABLE EN = high, regulator on 2.4 Enable Voltage V EN EN = low, regulator off.4 V Enable Internal Pullup Current I EN EN is internally pulled up to 3.6V (max) 3 µa Note 1: Limits at T A = -4 C are guaranteed by design and not production tested. Note 2: Maximum output current is limited by the power dissipation capability of the package. Typical Operating Characteristics (Typical Application Circuit, V S = +14V, C IN = 1µF, C OUT = 1µF, V SI = V, V EN = +2.4V, = +5V, T A = +25 C, unless otherwise noted.) 6 5 OUTPUT VOLTAGE vs. INPUT VOLTAGE AT NO LOAD, 1μA, 1mA, 1mA, 1mA A toc1 4 3 OUTPUT VOLTAGE vs. INPUT VOLTAGE AT NO LOAD, 1μA, 1mA, 1mA, 1mA B toc2 OUTPUT VOLTAGE vs. OUTPUT CURRENT 5.4 A 5.2 V S = 14V toc3 5. VOUT (V) 4 VOUT (V) 2 VOUT (V) 4.98 4.96 V S = 6V 3 1 4.94 4.92 2 5 1 15 V S (V) 1 2 3 4 5 6 V S (V) 4.9.1.1 1 1 1 I OUT (ma) 5
Typical Operating Characteristics (continued) (Typical Application Circuit, V S = +14V, C IN = 1µF, C OUT = 1µF, V SI = V, V EN = +2.4V, = +5V, T A = +25 C, unless otherwise noted.) 5.5 5.25 5. I OUT = 1μA OUTPUT VOLTAGE vs. TEMPERATURE I OUT = 1mA A toc4 1 1 QUIESCENT CURRENT vs. INPUT VOLTAGE T A = +25 C, +85 C T A = +125 C toc5 1 1 QUIESCENT CURRENT vs. INPUT VOLTAGE T A = +125 C T A = +25 C, +85 C toc6 VOUT (V) 4.975 4.95 I OUT = 1mA IQ (μa) 1 T A = -4 C IQ (μa) 1 T A = -4 C I 4.925 OUT = 1mA 4.9-4 -15 1 35 6 85 11 135 TEMPERATURE ( C) EN = OPEN I OUT = NO LOAD 1 2 6 1 14 18 22 26 3 34 38 V S (V) EN = OPEN I OUT = 1μA 1 2 6 1 14 18 22 26 3 34 38 V S (V) RESET OUTPUT LOW (V).25.2.15.1.5 RESET OUTPUT LOW vs. TEMPERATURE RRES = 4kΩ RRES = 1kΩ toc7 IQ (ma) 1 1.1 V S = 14V T A = +25 C QUIESCENT CURRENT vs. OUTPUT CURRENT toc8 ISHDN (μa) 4 3 2 1 SHUTDOWN SUPPLY CURRENT vs. INPUT VOLTAGE V S = 14V T A = +25 C EN = V toc9-4 -25-1 5 2 35 5 65 8 95 11 125 TEMPERATURE ( C).1.1 1 1 1 I OUT (ma) 1 2 3 4 V S (V) ISHDN (μa) 2 19 18 17 16 15 SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE V S = 14V EN = V 14-4 -5-3 65 1 135 TEMPERATURE ( C) toc1 DROPOUT VOLTAGE (mv) 325 3 275 25 225 2 175 15 125 1 75 5 25 A V S = 4.75V DROPOUT VOLTAGE vs. LOAD CURRENT.1 1 1 1 I OUT (ma) toc11 DROPOUT VOLTAGE (mv) DROPOUT VOLTAGE vs. LOAD CURRENT 3 275 B V S = 3.3V 25 225 2 175 15 125 1 75 5 25.1 1 1 1 I OUT (ma) toc12 6
Typical Operating Characteristics (continued) (Typical Application Circuit, V S = +14V, C IN = 1µF, C OUT = 1µF, V SI = V, V EN = +2.4V, = +5V, T A = +25 C, unless otherwise noted.) DROPOUT VOLTAGE (mv) 4 35 3 25 2 15 1 5 A V S = 4.75V DROPOUT VOLTAGE vs. TEMPERATURE I OUT = 1mA I OUT = 1mA -4-5 3 65 1 135 TEMPERATURE ( C) toc13 RESET THRESHOLD VOLTAGE (V) RESET THRESHOLD vs. TEMPERATURE 4.6 A 4.58 4.56 4.54 4.52 RISING 4.5 4.48 4.46 4.44 FALLING 4.42 4.4-4 -5 3 65 1 135 TEMPERATURE ( C) toc14 VRES (V) 5 4 3 2 1 RESET VOLTAGE vs. OUTPUT VOLTAGE A R RES = 1kΩ TO OUT FALLING RISING 4.3 4.4 4.5 4.6 4.7 (V) toc15 SENSE THRESHOLD (V) 1.5 1.45 1.4 1.35 1.3 1.25 1.2 1.15 1.1 1.5 SENSE THRESHOLD vs. TEMPERATURE SI INPUT RISING SI INPUT FALLING toc16 SENSE OUTPUT (V) 5 4 3 2 1 V SI FALLING SENSE OUTPUT vs. SENSE INPUT V SI RISING toc17 PSRR (db) -1-2 -3-4 -5-6 -7 POWER-SUPPLY REJECTION RATIO vs. SUPPLY CURRENT VIN = 14V IOUT = 1mA 5mVP-P toc18 1. -4-5 3 65 1 135 TEMPERATURE ( C) 1. 1.1 1.2 1.3 1.4 SENSE INPUT (V) -8.1.1 1 1 1 FREQUENCY (khz) LOAD-TRANSIENT RESPONSE toc19 C IN = 1μF C OUT = 1μF/1mΩ ESR I STEP = 1μA TO 5mA 5V AC-COUPLED 1mV/div LINE-TRANSIENT RESPONSE toc2 5V AC-COUPLED 2mV/div I OUT = 1mA 5mA I OUT 2mA/div 1μA 4V V S 1V/div 14V 2μs/div 2μs/div 7
Typical Operating Characteristics (continued) (Typical Application Circuit, V S = +14V, C IN = 1µF, C OUT = 1µF, V SI = V, V EN = +2.4V, = +5V, T A = +25 C, unless otherwise noted.) V STARTUP RESPONSE toc21 I OUT = 1mA 2V/div V ENABLE RESPONSE toc22 I OUT = 1mA 5V/div SHUTDOWN RESPONSE toc23 I OUT = 1mA 2V/div V V V S 5V/div V EN 5V/div EN 2V/div V 1ms/div 2μs/div 2μs/div Pin Description PIN NAME FUNCTION 1 V S Regulator Input. Operating supply range is from +5V to +28V and withstands 4V transients. Bypass V S to GND with a 1µF capacitor. 2 SI 3 EN Voltage Sense/Power-Fail Comparator Input. SI is the noninverting input of an uncommitted comparator. SO asserts low if V SI drops below the reference level, V ST. Enable Input. Leave unconnected (or pull EN high) to turn on the regulator. Pull EN low to place the device in shutdown mode. EN is internally pulled up to 3.6V. 4 CT 5 GND 6 RES Reset Timeout Delay Capacitor Connection. Connect a capacitor from CT to GND to program the reset timeout period/reset pulse delay. During regulation, CT is pulled up to. CT is pulled low during reset, when EN is low, or when in thermal shutdown. Ground. Bypass the input and output capacitors to the GND plane. Solder to large pads or the circuit-board ground plane to maximize thermal dissipation. Active-Low Reset Output. Pull up externally to. Open-drain RES goes low when is below the reset threshold. Once output voltage is in regulation, RES goes high after the programmed reset timeout period is over. RES is low when EN is low or in thermal shutdown. 7 SO Voltage Sense/Power-Fail Comparator Output. Pull up externally to. Open-drain SO asserts low when V SI drops below the reference level, V ST. SO also asserts low when EN is low or in thermal shutdown. 8 Regulator Output. Fixed at +5V (A) or +3.3V (B). Bypass with a 1µF ceramic capacitor to GND. EP EP E xp osed P ad d l e. E P i s i nter nal l y connected to GN D. C onnect E P to GN D to p r ovi d e a l ow ther m al - r esi stance p ath fr om the IC j uncti on to the P C b oar d. D o not use as the onl y el ectr i cal connecti on to G N D. 8
V S V INT 3μA MAX LDO PASS ELEMENT V REF EN ENABLE ALWAYS-ON GND PREREGULATOR ALWAYS-ON ICT 2μA DELAY COMPARATOR RES V INT 3.6V (MAX) N 2.1V N.9 x V REF CT FAULT DETECTION (TEMP AND SC) SCLIM SD V REF 1.25V V REF SI SO N V REF Figure 1. Functional Diagram 9
Detailed Description Regulator The high-voltage, LDO regulator operates from +5V to +28V input voltage. The device withstands up to 4V transients, providing protection against temporary overvoltage conditions like load dump. The incorporates internal feedback resistors for factory-preset voltages of either +5V (A) or +3.3V (B). The regulator is capable of driving up to 1mA of load current and features a typical current limit of 26mA. The regulator uses a pnp pass element and provides low.5v dropout while delivering 1mA load current. The output of the regulator follows closely to the input during turn-on. See the Output Voltage vs. Input Voltage graph in the Typical Operating Characteristics. This makes the usable input voltage range for 3.3V and 5V output down to 3.7V and 5.5V, respectively. The is designed to operate with very low quiescent current during always-on operation when not in dropout. The regulator is stable with a wide variety of capacitors including low-esr ceramic 1µF (63 case size). The load-transient response curves depict the stability of the LDO when using different capacitance and ESR ranges. See the Capacitor Selection and Regulator Stability section in the Applications Information. Reset Output (RES) The integrates a power-on-reset circuit. RES is an open-drain output that requires a pullup resistor to. The open-drain MOSFET can sink up to 825µA current while keeping the RES voltage below.4v. The internal reset circuit monitors the regulator output voltage and RES asserts an active-low output when the regulator output falls below a reset threshold of typically.9 x. The RES output remains low when is below the reset threshold, and remains low for the duration of the reset timeout period (t RD ). The reset timeout period is programmable and can be set with an external capacitor connected from CT to ground. The duration of the delay as a function of CT is: C V t CT CCTH 6 RD = + ( 35 1 ) ICT 6 where VCCTH = 21. V and ICT = 2 1 A. The default reset timeout period is 35µs when no capacitor is connected from CT to ground. SI/SO Comparator The includes an uncommitted comparator for monitoring the input voltage or for detecting power-fail conditions. The input SI is the noninverting input of the comparator. The open-drain output SO asserts low when voltage at the input SI drops below the threshold voltage, V ST (see Figure 1). The sense comparator typically has a hysteresis of 1mV. Use the following equation to calculate the resistor-divider for programming the trip voltage (V TRIP ) during power-fail. See the Typical Application Circuit. V TRIP = (VST R H) + RL VST where V ST = 1.16V (typ). Choose R L between 1kΩ to 3kΩ. Enable Input The enable (EN) is a TTL-compatible logic input. Logic low at EN turns off the regulator and reduces the current consumption to 17µA (typ). It is internally pulled up to a logic-high voltage (3.6V max) by an internal resistor. Thus, the is enabled by default when V S is applied and EN is left unconnected. The regulator, reset supervisor circuit, and the sense comparator can be manually shut down by pulling EN low. For shutdown operation, the pulldown network must be capable of sinking 3µA max, since the internal pullup resistor sets the maximum pullup current at 3µA. The external pulldown device should not leak more than 1µA current when it is in the off-state. Current Limit The features a current limiter that monitors the output current and controls the pass transistor s gate voltage, limiting the output current to typically 26mA. The output can be continuously shorted to ground without damaging the device at V S 16V. Note that the output short-circuit current may increase the power dissipation significantly and raise the junction temperature to its thermal-shutdown threshold. In such a case, the is temporarily turned off. Thermal Shutdown When the junction temperature exceeds T J = +165 C (typ), an internal thermal sensor signals the shutdown logic to turn off the pass transistor and allow the IC to cool. The thermal sensor turns the pass transistor on again after the IC s junction temperature cools by +2 C (typ), resulting in a cycled output during continuous thermal-overload conditions. Thermal shutdown protects the in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction temperature of T J = +15 C. 1
Applications Information Available Output Current Calculation The high-voltage regulator provides up to 1mA of output current. The input voltage extends to +28V. Package power dissipation limits the amount of output current available for a given input/output voltage and ambient temperature. Figure 2 depicts the maximum power dissipation curve for the 8-pin SO-EP package. The graph assumes that the exposed metal back of the package is soldered to copper on a single layer PCB according to the JEDEC51 standard. Use Figure 2 to determine the allowable package dissipation for a given ambient temperature. Alternately, use the following formula to calculate the allowable package dissipation: PD 1.538W For TA + 7 C = 1.538.1923 ( TA 7 C) For + 7 C < TA + 125 C After determining the allowable package dissipation, calculate the maximum output current using the following formula: IOUT(MAX) VS PD VOUT The above equations do not include the power dissipation from self-heating due to the IC ground current. The junction-to-ambient thermal impedance depends on the area of the copper plane, its thickness, and the number of copper layers on PCB. For the higher power dissipation requirement, use multiple-layered PCBs with 2oz copper and a large copper area. Capacitor Selection and Regulator Stability For stable operation over the full temperature range and with load currents up to 1mA, use a 1µF output capacitor with a low ESR. Table 1 shows a list of recommended output capacitor ESR for various load conditions. PD (W) 2. 1.8 1.6 1.4 1.2 1..8.6 1.538W 8-PIN SO-EP DERATE 19.23mW/ C fig2 Table 1. Recommended Output Capacitor ESR RECOMMENDED C OUT ESR I OUT = 3.3V = 5.V I OUT 1mA C ESR <.66Ω C ESR < 1Ω I OUT 5mA C ESR <.132Ω C ESR <.2Ω I OUT 1mA C ESR < 66mΩ C ESR <.1Ω.4.2 1 13 2 3 4 5 6 7 8 9 1 11 12 14 15 TEMPERATURE ( C) Figure 2. 8-Pin SO-EP Maximum Power Dissipation vs. Temperature 11
Pin Configurations (continued) TOP VIEW V S 1 + 8 SI 2 7 SO EN 3 6 RES PROCESS: BiCMOS Chip Information CT 4 EXPOSED PADDLE 5 GND SO-EP 12
Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 8L, SOIC EXP. PAD.EPS PACKAGE OUTLINE 8L SOIC,.15" EXPOSED PAD 21-111 C 1 1 13
Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 6, 8, &1L, DFN THIN.EPS PACKAGE OUTLINE, 6,8,1 & 14L, TDFN, EXPOSED PAD, 3x3x.8 mm 21-137 H 1 2 14
Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) COMMON DIMENSIONS SYMBOL MIN. MAX. A.7.8 D 2.9 3.1 E 2.9 3.1 A1..5 L.2.4 k.25 MIN. A2.2 REF. PACKAGE VARIATIONS PKG. CODE N D2 E2 e JEDEC SPEC b [(N/2)-1] x e T633-1 6 1.5±.1 2.3±.1.95 BSC MO229 / WEEA.4±.5 1.9 REF T633-2 6 1.5±.1 2.3±.1.95 BSC MO229 / WEEA.4±.5 1.9 REF T833-1 T133-1 T1433-1 8 1 14 1.5±.1 1.5±.1 2.3±.1 1.7±.1 2.3±.1.65 BSC.3±.5 1.95 REF 2.3±.1.5 BSC MO229 / WEED-3.25±.5 2. REF 2.3±.1.5 BSC MO229 / WEED-3.25±.5 2. REF.4 BSC MO229 / WEEC T833-2 8 1.5±.1 2.3±.1.65 BSC MO229 / WEEC.3±.5 1.95 REF T833-3 8 1.5±.1 2.3±.1.65 BSC MO229 / WEEC.3±.5 1.95 REF T133-2 1 1.5±.1 T1433-2 14 1.7±.1 2.3±.1 - - - -.2±.5 2.4 REF.4 BSC - - - -.2±.5 2.4 REF PACKAGE OUTLINE, 6,8,1 & 14L, TDFN, EXPOSED PAD, 3x3x.8 mm -DRAWING NOT TO SCALE- 21-137 H 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA 9486 48-737-76 15 26 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. Heaney