Special Iue of International Journal of Advance in Applied Science and Engineering (IJAEAS) ISSN (P): 2348-1811; ISSN (E): 2348-182X Vol. 4, Iue 1,2, March 2017, 34-39 IIST SHUNT ACTIVE POWER FILTER PERFORMANCE ENHANCEMENT USING ROBUST DC-LINK VOLTAGE CONTROL STRATEGY 1 K S R VENKATARAMANA, 2 G SESHADRI 1 M.Tech, SIDDHARTH INSTITUTE OF ENGINEERING AND TECHNOLOGY (SIETK) 2 Aociate Profeor, SIDDHARTH INSTITUTE OF ENGINEERING AND TECHNOLOGY (SIETK) ABSTRACT- In thi paper, a Shunt active power filter (SAPF) i developed without conidering any harmonic detection cheme which are content with the udden load change. The propoed ytem content with a robut control trategy to overcome the drawback. Therefore in thi trategy, the dc-link voltage have been regulated by uing a hybrid control method with the combination of the tandard proportional integral PI and alo a liding-mode (SM) controller. The SM cheme determine continuouly about the gain of the PI controller which depend upon the control loop error and it derivative. Therefore the chattering which i due to the SM cheme decreaed by the tranition rule that fixe the controller gain when teady tate condition i needed. Therefore thi controller i known a the dual-liding-mode-proportional integral. Here the phae current of the power grid which are indirectly regulated by uing the double equence controller with two degree of freedom, where the internal model principle i implemented for avoid reference frame tranformation. In thi the propoed control trategy enure zero teady-tate error and alo increae the performance during the hard tranient uch a load different. Simulation reult demontrate the performance of the propoed control cheme. INDEX TERMS Adaptive control trategy, harmonic compenation, power factor correction, hunt active power filter (SAPF). I. INTRODUCTION Nowaday, the implementation of the power converter a embedded device in houe, commercial, or indutrial electronic-baed appliance ha deteriorated the ability quality of the main[1-2]. Thoe nonlinear hundred of generate current harmonic and reactive power that lead to voltage drop on the availability network electric reitance and hould induce unbalance operative condition. SAPF are motly ued for the compenation of harmonic, reactive power, negative equence, and/or parkle [5] [7]. The traditional management cheme applied to SAPF quare meaure HEBS a a reult of their effectivene depend on however quickly and accurately the harmonic element of the nonlinear hundred quare meaure known [6]. The SAPF may be additionally enforced while not the utilization of the load harmonic extractor. During thi cae, the harmonic compenating term i obtained from the ytem active power balance [7]. The management ytem of SAPF enforced upported HEBS or BEBS idea quare meaure typically accomplihed by a cacade trategy compoed by aociate degree inner management loop for regulation the filter part current (HEBS) or grid part current (BEBS) aociate degreed an outer management loop to line the dc-link voltage. The effectivene of each olution depend on the performance of the management loop. Within the cae of HEBS, the clink controller regulate the dc electrical device voltage at the appropriate level to attain the compenation objective. Now a day, a ditinct approach of aociate degree accommodative management trategy applied for SAP F victimization the BEBS methodology ha been planned for compenating the harmonic ditortion, reactive power, and unbalanced load [10]. During thi SAPF, the preent management theme i enforced by aociate degree accommodative pole placement management, integrated with a variable tructure theme (VS-APPC). The mot advantage of the planned management trategy refer to the reduction of SAPF complexne of implementation, leading to reduced price (becaue it' not neceary to own load and filter part current meaurement, o reducing the amount of current enor), while not reduction of it compenation effectivene. In thi paper propoe a turdy management trategy to boot BEBS power filter throughout evere load change. During thi approach, the dclink voltage i regulated by a hybrid management trategy compoed by the aociation of a regular PI and SM controller[3]. 34
in Fig. 1 employ aluminum electrolytic capacitor in it dc link to enure a contant dc voltage vc. Fig. 1. Baic diagram of the propoed SAPF ytem. The SM theme endlely determine the gain of the PI upported the control loop error and it by-product. The chattering a a reult of the SM theme i reduced by a tranition rule that fixe the controller gain once ytem teady tate i reached. The grid part current quare meaure indirectly regulated by DSC with 2 degree of freedom, wherever the IMP i ued to avoid reference ytem tranformation SYSTEM DESCRIPTION AND MODELING Fig. 1 preent the topology of SAPF i preent in thi paper. It comprie a three-phae grid ource e123 with it internal impedance (Z = r + l) that feed a three-phae load bank coniting of parallel aociation of a no controlled rectifier and a three-phae linear load (Zl = rl + ll). A. SAPF Grid-Tied Power Converter Modeling The model of the SAPF grid-tied power converter conidering the interaction of the grid impedance to both the ytem. Baed on thi tudy, the ytem in Fig. 1 can be decribed by the per phae equivalent circuit preented in Fig. 2. Fig. 2. Equivalent circuit of a SAPF ytem From the equivalent circuit hown in Fig. 2, the tranfer function repreenting the dynamic behavior of power grid current can be given by () G c () = I dq V b (1) fdq (S) +a Where b = 1/ (lf + l), and a = (rf + r)/ (lf + l). In thi model, parameter a and b may vary a a function of either the random behavior of nonlinear load or the grid impedance. Further detail on the ytem modeling could be found in [17]. The SAP F Fig. 3. Equivalent circuit of the electrolytic capacitor. (a) Manufacturer model. The model choen in thi paper i hown in Fig. 3(a). It i the ame ued by manufacturer and alo it i decribed by parameter eaily identifiable. Thu, the equivalent circuit of the capacitor can be reduced to the one hown in Fig. 3(b). Fig. 3. Equivalent circuit of the electrolytic capacitor. (b) Simplified model. Baed on thi equivalent circuit, the dynamic model of the electrolytic capacitor can be given by V C () I e = er(+ 1 rpc + 1 erc ) d (S) + 1 rpc (2) The tranfer function repreented by (2) ha a pole that depend on the value of C and rp and a zero depending on the value of C, rp, and er. Conidering a reaonable cae where rp,er, it i poible to implify the model given by (2), neglecting the value of er. In thi cae, the reulting tranfer function i given by G v () = V C () I d 1 = e c () + 1 rpc = b c +a c (3) Where b c = 1/C, and ac = 1/ (rpc). The dynamic behavior of both model varie depending on C, rp, and er, which in turn vary a a function of frequency, voltage, and temperature. III. CONTROL SCHEME Fig. 4 preent the block diagram of the propoed control cheme for the SAP F baed on the methodology. It i done by generating the reference current ied, which determine the ytem active 35
power component. The phae angle of the power grid voltage vector θ i determined by uing a P LL. Fig. 4. Block diagram of the propoed control trategy. Xedq denote voltage vector reference frame variable, wherea x dq denote tationary reference frame variable. A. Grid Current Control Strategy The control trategy employed in thi paper for regulating the grid current (ee block DSC in Fig. 4) i baed on the double equence control cheme, which employ one controller for the poitive equence and another for the negative equence [32]. Generically, the tate pace model of the DSC can be repreented by dx 1dqi dt dx 2dqi dt v fdq = 2k ii ε idq + x 2dqi (4) = ω 2 S x 1dqi (5) = x 1dqi + 2k pi ε idq (6) Where k pi and kii are the controller gain and ω i the fundamental frequency of the power grid. The tranfer function of the current controller on the tationary reference frame can be given by C c () = 2k pi 2 +2k iis +2k pi ω 2 2 +ω 2 (7) The deign of the DSC i achieved by uing the zero pole cancelation method. Therefore, conidering that a can be aociated to the current controller gain kpi and kii a a k ii k pi (8) The deired band pa frequency of the DSC can be determined a ω c = bkpi. Thu, it i poible to determine the controller gain a a function of a and b, which reult in k pi = ω c b (9) k ii = a ω c b (10) Different deign methodologie can be employed for calculating the current controller gain. Here, the propoed deign approach achieve a good performance in the current control loop. B. DC-Link Voltage Controller The propoed control cheme for the dc link i implemented by a nontandard robut SM P I, which i implemented by a proportional integral (P I) controller in which it controller gain are calculated by uing the SMC approach baed on the liding urface compoed by the control loop error and it derivative. 1) SM P I Control Scheme: Conider the dynamic model of the dc link of the SAP F decribed by (3) with the value of er neglected. Admitting that the SM P I controller tranfer function can be written a C v () = k p+k i (11) Controller gain KP and ki are determined by SMC theory. The cloed-loop dynamic of the dc-link voltage can be decribed a follow: V c () = b ck p(+k i/k p) 2 +(a c +b c k p)+b c k i V c () (12) During the tranient tate, the gain KP witche between kav p and 2kp + and KP av 2kp +. Upon reaching the teady tate, kp i kept contant at kp av. A imilar tatement applie to ki. Stability of the dc link i aured whenever a c + b c k p > o (13) b c k i > o (14) By uing a uitable deign procedure, thee condition can be eaily fulfilled. Define a liding urface decribed by σ = ce v + e v (15) Where e v = vc vc, e v i it derivative, and c i a poitive contant. To prove the tability of the propoed SM P I at the origin (σ = 0), let the Lyapunov candidate be V(e v ) = 1 2 e v 2 (16) Fig. 5. Graph of the tranition criterion μ. Therefore, it time derivative can be expreed a V (e v ) = e v e v = e v ( ce v ) = ce 2 v < 0 (17) Since contant c i poitive, the propoed control i aymptotically table. Baed on thee tability retriction, the controller gain can be determined by uing the following witching law: k p = [(1 + gn(σ))k p + (1 gn(σ))k p ] + k p av (18) 36
k i = [(1 + gn(σ))k i + (1 gn(σ))k i ] + k i av (19) Where k + p, k p, k i +, k i, k p av, and k i av are poitive contant determined a a function of the deired ytem performance (thee gain can be obtained by uing a tandard P I deign methodology, e.g., root locu). The mathematical function gn(σ) return the value 1 for σ > 0 or 1 for σ < 0. 2) DSM PI Control Scheme: The SM PI controller ha a good performance during the tranient tate but ha an undeired ide effect when the teady tate i reached. It can be obtained by employing a tranition rule in the controller tructure. For thi, conider a Gauian function defined a μ(e v ) = e e v 2 λ (20) where μ i the deciion variable to elect between the witching and fixed controller, ev i the dc-link voltage error, and λ i the parameter of the Gauian function. whoe characteritic equation i Z()P() + R()L() = 0 (24) The deign objective i to find uitable polynomial P () and L() uch that Z()P() + R()L() = A η () (25) Where Aη () i a deired harmonic Hurwitz polynomial, and upercript η {f (fat), av (average), l (low)} refer to the performance criteria employed for determining deired polynomial. IV. SIMULATION EVALUATION OF THE PROPOSED SAPF Fig.8 depict the imulation outcome comparing both controller following a reference ramp. Such a ramp waveform ha a lope of 347 V/. Fig. 6. Block diagram of the DSM P I control cheme. The kp and ki gain updating policy i a follow: for μ (ev) < μt, the gain change according to (23) and (24), and for μ (ev) μt, the gain are kept contant. The block diagram of the propoed DSM P I controller i hown in Fig. 6. 3) Deign Criteria of the DSM PI: The deign criterion employed in thi paper i baed in the pole aignment that require the olution of the Diophantine equation. Thu, conider the tranfer function of dc link [ee (3)] and the voltage regulator DSM P I [ee (11)] can be written in term of polynomial. G v () = Z() (21) R() C v (v) = P() (22) L() where Z() = bc, R() = + ac, P () = kp + ki, and L() =. Then, the tranfer function of the dclink control loop will be given by T et () = Z()P() Z()P()+R()L() (23) Fig.7. Block diagram of imulation. In Fig.8. that the performance of the propoed converter i moother and the repone time i maller; the overhoot value of the propoed and conventional converter are given repectively by 0.53% and 4.37%. Fig. 8. Simulation reult for dc-link voltage vc during tartup. Although the comparion hown in Fig. 8 bring up the benefit of the DSM P I trategy, additional tet have been conidered to highlight it advantage under operating regime. 37
Fig.9. Simulation reult for dc-link voltage vc during tep tranient of it reference voltage with both tepup and tep-down variation. For intance, Fig. 9 preent a comparion for both controller for variation of the dc-link reference voltage. A zoom of the tranient at t = 5 i preented in Fig. 10, wherea Fig. 11 how a zoom of the tep-down tranient at t = 9. Fig. 13.imulation reult during load tranient (a) for dc-link voltage vc, (b) for ource voltage v1 and the load current il1 multiplied by 10 time (c) for ource current i1. The DSM P I controller alo perform better than the conventional approach with load power reduction (ee Fig. 13), a oberved at t = 15. Such a tranient wa obtained by diconnecting the reitive load. Fig. 11. Simulation reult for dc-link voltage (vc) during load tranient. Fig. 12. Simulation reult during load tranient (a) for dc-link voltage vc, (b) for ource voltage v1 and the load current il1 multiplied by 10 time, and (c) for ource current i1. On the other hand, Fig. 11 13 how a typical type and ever-preent tranient in active power filter application, i.e., tranitory of load power. Two type of variation are conidered; the firt one (ee Fig. 12) at t = 12 how the load power increae with an additional three-phae reitor (30 Ω) connected in parallel with the arrangement of linear and nonlinear load. Fig. 14. Simulation reult for function μ ued for commutation between the controller P I and DSM PI. CONCLUSION The control ytem of the propoed method which i approach for betterment of the performance of SAPF without any load current meaurement. Therefore in thi control ytem it i approach to the dc-link voltage which i regulated by uing a dual control method developed by the proportional integral (PI) controller with the calculation of gain by uing an SMC approach. The chattering due to the SM can be mitigated by uing a tranition rule in the controller tructure. The theoretical analyi of the SM PI are introduced, along with the tability which are proven and it i preented in the paper. Moreover, the tranition cheme that reult in DSM PI wa alo dicued. Moreover the control trategy and it the performance of the dc-link control loop during the load different i improved. The phae current of the power grid which are indirectly regulated by uing the two independent controller (DSC), in which the IMP i implemented to avoid reference frame tranformation. In thi verification there are few ignificant gain in the SAPF which are depend 38
upon the BEBS ince the current control trategy i impler and the filter control trategy i developed to decreae the current enor. Therefore the imulation reult hown the propoed control trategy during the load different it will improve the ytem reactive power compenation and harmonic mitigation. REFERENCES [1] IEC 60601-1, International Electro technical Commiion, Geneva, Switzerland. Rep. CEI/IEC 60601-1: 1988, 1988. [2] Draft Guide for Applying Harmonic Limit on Power Sytem, IEEE Std. P519.1/D12 2012. [3] H. Akagi, Trend in active power line conditioner, IEEE Tran. Power Electron., vol. 9, no. 3, pp. 263 268, May 1994. [4] B. Singh and V. Verma, Selective compenation of powerquality problem through active power filter by current decompoition, IEEE Tran. Power Del., vol. 23, no. 2, pp. 782 799, Apr. 2008. [5] B. Singh, K. Al-Haddad, and A. Chandra, A review of active filter for power quality improvement, IEEE Tran. Ind. Electron., vol. 46, no. 5, pp. 960 971, Oct. 1999. [6] F. A. S. Neve, H. E. P. de Souza, M. C. Cavalcanti, F. Bradachia, and E. J. Bueno, Digital filter for fat harmonic equence component eparation of unbalanced and ditorted threephae ignal, IEEE Tran. Ind. Electron., vol. 59, no. 10, pp. 3847 3859, Oct. 2012. [7] M. Angulo, J. Lago, D. Ruiz-Caballero, S. Mua, and M. Heldwein, Active power filter control trategy with implicit cloed loop current control and reonant controller, IEEE Tran. Ind. Electron., vol. 6, no. 7, pp. 2721 2730, Jul. 2013. [8] A. Bhattacharya and C. Chakrabarthy, A hunt active power filter with enhanced performance uing ANN-baed predictive and adaptive controller, IEEE Tran. Ind. Electron., vol. 58, no. 2, pp. 421 428, Feb. 2011. [9] S. Bhattacharya, T. M. Frank, D. M. Divan, and B. Banerjee, Active filter ytem implementation, IEEE Ind. Appl. Mag., vol. 4, no. 5, pp. 47 63, Sep./Oct. 1998. [10] F. Z. Peng, G. W. Ott, Jr., and D. J. Adam, Harmonic and reactive power compenation baed on the generalized intantaneou reactive power theory for three phae four wire ytem, IEEE Tran. Power Electron., vol. 13, no. 6, pp. 1174 1181, Nov. 1998. 39