Permit Multiplexing from n Lines to One Line Perform Parallel-to-Serial Conversion Strobe (Enable) Line Provided for Cascading (N Lines to n Lines) Package Options Include Plastic Small-Outline (D), Thin Shrink Small-Outline (PW), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs description Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data selection to the ND-OR gates. Separate strobe (G) inputs are provided for each of the two 4-line sections. The SN4HC is characterized for operation over the full military temperature range of C to 2 C. The SN74HC is characterized for operation from 40 C to 8 C. SN4HC...J OR W PCKGE SN74HC... D, N, OR PW PCKGE (TOP VIEW) C C2 NC C C0 G B C C2 C C0 Y GND 2 4 6 7 8 6 4 2 0 9 V CC 2G 2C 2C2 2C 2C0 2Y SN4HC... FK PCKGE (TOP VIEW) B G NC V CC 2G 4 2 20 9 8 6 7 8 7 6 4 902 2C NC 2C2 2C Y GND NC 2Y 2C0 NC No internal connection FUNCTION TBLE INPUTS OUTPUT SELECT DT G Y B C0 C C2 C X X X X X X H L L L L X X X L L L L H X X X L H L H X L X X L L L H X H X X L H H L X X L X L L H L X X H X L H H H X X X L L L H H X X X H L H Select inputs and B are common to both sections. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DT information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 996, Texas Instruments Incorporated POST OFFICE BOX 60 DLLS, TEXS 726
logic symbol B 4 2 0 G 0 G C0 C C2 C 2G 2C0 2C 2C2 2C 6 4 0 2 EN 0 2 MUX 7 9 Y 2Y This symbol is in accordance with NSI/IEEE Std 9-984 and IEC Publication 67-2. Pin numbers shown are for the D, J, N, PW, and W packages. 2 POST OFFICE BOX 60 DLLS, TEXS 726
logic diagram (positive logic) B G 4 2 C0 6 C 7 Y C2 4 C 2G 2C0 0 2C 9 2Y 2C2 2 2C Pin numbers shown are for the D, J, N, PW, and W packages. POST OFFICE BOX 60 DLLS, TEXS 726
absolute maximum ratings over operating free-air temperature range Supply voltage range, V CC.......................................................... 0. V to 7 V Input clamp current, I IK (V I < 0 or V I > V CC ) (see Note ).................................... ±20 m Output clamp current, I OK (V O < 0 or V O > V CC ) (see Note )................................ ±20 m Continuous output current, I O (V O = 0 to V CC ).............................................. ± m Continuous current through V CC or GND................................................... ±70 m Maximum power dissipation at T = C (in still air) (see Note 2): D package..................... W N package..................... W PW package.................. 0. W Storage temperature range, T stg................................................... 6 C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 0 C and a board trace length of 70 mils, except for the N package, which has a trace length of zero. recommended operating conditions SN4HC SN74HC UNIT MIN NOM MX MIN NOM MX VCC Supply voltage 2 6 2 6 V VCC = 2 V.. VIH High-level input voltage VCC = 4. V.. V VCC = 6 V 4.2 4.2 VCC = 2 V 0 0. 0 0. VIL Low-level input voltage VCC = 4. V 0. 0. V VCC = 6 V 0.8 0.8 VI Input voltage 0 VCC 0 VCC V VO Output voltage 0 VCC 0 VCC V VCC = 2 V 0 000 0 000 ttt Input transition (rise and fall) time VCC = 4. V 0 00 0 00 ns VCC = 6 V 0 400 0 400 T Operating free-air temperature 2 40 8 C 4 POST OFFICE BOX 60 DLLS, TEXS 726
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PRMETER TEST CONDITIONS VCC VOH VI I = VIH or VIL VOL VI I = VIH or VIL T = 2 C SN4HC SN74HC MIN TYP MX MIN MX MIN MX 2 V.9.998.9.9 IOH = 20 µ 4. V 4.4 4.499 4.4 4.4 6 V.9.999.9.9 V IOH = 6 m 4. V.98 4..7.84 IOH = 7.8 m 6 V.48.8.2.4 2 V 0.002 0. 0. 0. IOL = 20 µ 4. V 0.00 0. 0. 0. 6 V 0.00 0. 0. 0. V IOL = 6 m 4. V 0.7 0.26 0.4 0. IOL = 7.8 m 6 V 0. 0.26 0.4 0. II VI = VCC or 0 6 V ±0. ±00 ±000 ±000 n ICC VI = VCC or 0, IO = 0 6 V 8 60 80 µ Ci 2 V to 6 V 0 0 0 pf UNIT switching characteristics over recommended operating free-air temperature range, C L = 0 pf (unless otherwise noted) (see Figure ) PRMETER FROM (INPUT) Data tpd (ny C) TO (OUTPUT) VCC T = 2 C SN4HC SN74HC MIN TYP MX MIN MX MIN MX 2 V 90 0 22 90 or B Y 4. V 2 0 4 8 6 V 7 26 8 2 2 V 7 26 89 8 UNIT Y 4. V 7 28 42 ns 6 V 4 2 29 2 V 8 9 0 2 G Y 4. V 9 28 24 6 V 9 6 24 20 2 V 20 60 90 7 ttt Y 4. V 8 2 8 ns 6 V 6 0 POST OFFICE BOX 60 DLLS, TEXS 726
switching characteristics over recommended operating free-air temperature range, C L = 0 pf (unless otherwise noted) (see Figure ) PRMETER FROM (INPUT) Data tpd (ny C) TO (OUTPUT) VCC T = 2 C SN4HC SN74HC MIN TYP MX MIN MX MIN MX 2 V 0 2 29 or B Y 4. V 27 47 7 9 6 V 2 4 60 2 V 9 220 274 UNIT Y 4. V 2 44 67 ns 6 V 9 8 7 48 2 V 60 8 280 20 G Y 4. V 7 7 6 46 6 V 4 2 48 40 2 V 4 20 26 ttt Y 4. V 7 42 6 ns 6 V 6 4 operating characteristics, T = 2 C PRMETER TEST CONDITIONS TYP UNIT Cpd Power dissipation capacitance per multiplexer No load 40 pf PRMETER MESUREMENT INFORMTION From Output Under Test Test Point CL (see Note ) Input 0% tplh 0% tphl VCC 0 V LOD CIRCUIT In-Phase Output 0% 0% 90% 90% tr VOH 0% 0% VOL tf Input 0% 0% 90% 90% tr VCC 0% 0% 0 V tf Out-of-Phase Output tphl 90% 0% 0% 0% 0% tf tplh VOH 90% VOL tr VOLE WVEFORM INPUT RISE ND FLL TIMES VOLE WVEFORMS PROPGTION DELY ND OUTPUT TRNSITION TIMES NOTES:. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. ll input pulses are supplied by generators having the following characteristics: PRR MHz, ZO = 0 Ω, tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time with one input transition per measurement. D. tplh and tphl are the same as tpd. Figure. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 60 DLLS, TEXS 726
IMPORTNT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ( Critical pplications ). TI SEMICONDUCTOR PRODUCTS RE NOT DESIGNED, INTENDED, UTHORIZED, OR WRRNTED TO BE SUITBLE FOR USE IN LIFE-SUPPORT PPLICTIONS, DEVICES OR SYSTEMS OR OTHER CRITICL PPLICTIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright 996, Texas Instruments Incorporated
MECHNICL DT MPDI002 JNURY 99 REVISED OCTOBER 99 N (R-PDIP-T**) 6 PINS SHOWN PLSTIC DUL-IN-LINE PCKGE DIM PINS ** 4 6 8 20 MX 0.77 (9,69) 0.77 (9,69) 0.920 (2,7) 0.97 (24,77) 6 9 MIN 0.74 (8,92) 0.74 (8,92) 0.80 (2,9) 0.940 (2,88) 0.260 (6,60) 0.240 (6,0) 8 0.070 (,78) MX 0.0 (0,89) MX 0.020 (0,) MIN 0.0 (7,87) 0.290 (7,7) 0.200 (,08) MX 0.2 (,8) MIN Seating Plane 0.00 (2,4) 0 0.02 (0,) 0.0 (0,8) 0.00 (0,2) M 0.00 (0,2) NOM 4/8 PIN ONLY 4040049/C 08/9 NOTES:. ll linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-00 (20-pin package is shorter than MS-00). POST OFFICE BOX 60 DLLS, TEXS 726