Impedance Measurements for Successful Device Modeling

Similar documents
Two Port Networks. Definition of 2-Port Network A two-port network is an electrical network with two separate ports for input and output

Chapter 13 Small-Signal Modeling and Linear Amplification

Exact Analysis of a Common-Source MOSFET Amplifier

Lecture 23 Date: Multi-port networks Impedance and Admittance Matrix Lossless and Reciprocal Networks

ID # NAME. EE-255 EXAM 3 April 7, Instructor (circle one) Ogborn Lundstrom

Electronic Circuits Summary

ECE-343 Test 1: Feb 10, :00-8:00pm, Closed Book. Name : SOLUTION

ES51919/ES51920 LCR meter chipset

(3), where V is the peak value of the tank voltage in the LC circuit. 2 The inductor energy is: E.l= LI 2

Lecture 37: Frequency response. Context

Networks and Systems Prof. V. G. K. Murti Department of Electrical Engineering Indian Institution of Technology, Madras

An Angelov Large Signal Model and its Parameter Extraction Strategy for GaAs HEMT

Electric Circuit Theory

What s Your (real or imaginary) LCR IQ?

A two-port network is an electrical network with two separate ports

Lecture #3. Review: Power

Mod. Sim. Dyn. Sys. Amplifiers page 1

2.004 Dynamics and Control II Spring 2008

Lecture 14 Date:

IXBT20N360HV IXBH20N360HV

Measurement of S-Parameters. Transfer of the Reference Plane. Power Waves. Graphic Representation of Waves in Circuits

Outline. Thermal noise, noise power and noise temperature. Noise in RLC single-ports. Noise in diodes and photodiodes

1. (50 points, BJT curves & equivalent) For the 2N3904 =(npn) and the 2N3906 =(pnp)

IMPEDANCE and NETWORKS. Transformers. Networks. A method of analysing complex networks. Y-parameters and S-parameters

Lecture 3: CMOS Transistor Theory

EE 330. Lecture 35. Parasitic Capacitances in MOS Devices

Basic. Theory. ircuit. Charles A. Desoer. Ernest S. Kuh. and. McGraw-Hill Book Company

E40M Review - Part 1

Mod. Sim. Dyn. Sys. Amplifiers page 1

ECE-342 Test 3: Nov 30, :00-8:00, Closed Book. Name : Solution

Advanced Current Mirrors and Opamps

Analog Circuits and Systems

Electrical Circuits Lab Series RC Circuit Phasor Diagram

CHAPTER.4: Transistor at low frequencies

CE/CS Amplifier Response at High Frequencies

Equivalent Circuits. Henna Tahvanainen. November 4, ELEC-E5610 Acoustics and the Physics of Sound, Lecture 3

ECE 523/421 - Analog Electronics University of New Mexico Solutions Homework 3

Modelling Non-Ideal Inductors in SPICE

ECE 546 Lecture 10 MOS Transistors

EECS 105: FALL 06 FINAL

AC Circuit Analysis and Measurement Lab Assignment 8

Biasing the CE Amplifier

RLC Series Circuit. We can define effective resistances for capacitors and inductors: 1 = Capacitive reactance:

Circuit Topologies & Analysis Techniques in HF ICs

ECE 255, Frequency Response

Adjoint networks and other elements of circuit theory. E416 4.Adjoint networks

QUESTION BANK SUBJECT: NETWORK ANALYSIS (10ES34)

Very Large Scale Integration (VLSI)

A capacitor is a device that stores electric charge (memory devices). A capacitor is a device that stores energy E = Q2 2C = CV 2

EECS240 Spring Today s Lecture. Lecture 2: CMOS Technology and Passive Devices. Lingkai Kong EECS. EE240 CMOS Technology

Contents. ! Transmission Lines! The Smith Chart! Vector Network Analyser (VNA) ! Measurements. ! structure! calibration! operation

Bridge Measurement 2.1 INTRODUCTION Advantages of Bridge Circuit

Chapter 9 Frequency Response. PART C: High Frequency Response

Single Phase Parallel AC Circuits

Lecture 210 Physical Aspects of ICs (12/15/01) Page 210-1

Two Port Network. Ram Prasad Sarkar

Refinements to Incremental Transistor Model

M. C. Escher: Waterfall. 18/9/2015 [tsl425 1/29]

Switching circuits: basics and switching speed

Lab 9/14/2012. Lab Power / Energy Series / Parallel Small Signal Applications. Outline. Power Supply

Notes for course EE1.1 Circuit Analysis TOPIC 10 2-PORT CIRCUITS

MODULE-4 RESONANCE CIRCUITS

Welcome! Device Characterization with the Keithley Model 4200-SCS Characterization System.

mywbut.com Lesson 16 Solution of Current in AC Parallel and Seriesparallel

Module 4. Single-phase AC circuits. Version 2 EE IIT, Kharagpur

CHAPTER.6 :TRANSISTOR FREQUENCY RESPONSE

Electricity and Light Pre Lab Questions

CMOS Cross Section. EECS240 Spring Dimensions. Today s Lecture. Why Talk About Passives? EE240 Process

Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics. Lena Peterson

MFJ 259/259B Operation & Simplified Calibration

Deembedding Effects on Cold S-parameter Measurements

Some of the different forms of a signal, obtained by transformations, are shown in the figure. jwt e z. jwt z e

6.012 Electronic Devices and Circuits Spring 2005

High Speed Communication Circuits and Systems Lecture 4 Generalized Reflection Coefficient, Smith Chart, Integrated Passive Components

Lecture 21: Packaging, Power, & Clock

CHAPTER 3: TRANSISTOR MOSFET DR. PHAM NGUYEN THANH LOAN. Hà Nội, 9/24/2012

MOS Transistors. Prof. Krishna Saraswat. Department of Electrical Engineering Stanford University Stanford, CA

SOME USEFUL NETWORK THEOREMS

Lecture 15: MOS Transistor models: Body effects, SPICE models. Context. In the last lecture, we discussed the modes of operation of a MOS FET:

3. Design a stick diagram for the PMOS logic shown below [16] Y = (A + B).C. 4. Design a layout diagram for the CMOS logic shown below [16]

Lecture 23: Negative Resistance Osc, Differential Osc, and VCOs

TWO-PORT NETWORKS. Enhancing Your Career. Research is to see what everybody else has seen, and think what nobody has thought.

MMIX4B22N300 V CES. = 3000V = 22A V CE(sat) 2.7V I C90

PDN Planning and Capacitor Selection, Part 1

Vrg Qgd Gdg Vrd Gate Rg Rd Vgd Vgs Qds Ids = f(vds,vgs,t Qgs Ids Vds Idiode_f = f(vds Idiode_r = f(vdiode_r,t Ggs Qds = f(vds,t Qgs = f(vgs,t Vrs Rs Q

Advanced Test Equipment Rentals ATEC (2832) LCR MEASUREMENT PRIMER. ISO 9001 Certified

PHYSICS 122 Lab EXPERIMENT NO. 6 AC CIRCUITS

Chapter 2 Switched-Capacitor Circuits

IXBX50N360HV. = 3600V = 50A V CE(sat) 2.9V. BiMOSFET TM Monolithic Bipolar MOS Transistor High Voltage, High Frequency. Advance Technical Information

Lecture 7 Circuit Delay, Area and Power

Frequency Response Prof. Ali M. Niknejad Prof. Rikky Muller

Sinusoidal Steady State Analysis (AC Analysis) Part I

ECE 546 Lecture 11 MOS Amplifiers

Chapter 2. Engr228 Circuit Analysis. Dr Curtis Nelson

EE105 Fall 2014 Microelectronic Devices and Circuits

EXP. NO. 3 Power on (resistive inductive & capacitive) load Series connection

Volterra Series: Introduction & Application

Integrated Circuits & Systems

CHAPTER 22 ELECTROMAGNETIC INDUCTION

IXBT12N300 IXBH12N300

Transcription:

Impedance Measurements for Successful Device Modeling - A Lab Book Emphasizing Practice - (C) Franz Sischka, Nov. 2018 www.sisconsult.de -1-

Outline The Impedance Plane Z = R + j*x and Typical Impedance Traces Impedances from LCRZ Meters Impedances from S-Parameters Related Non-S-Parameter TwoPort Definitions -2-

j*x The Impedance Plane Z = R + j*x The frequency-dependent impedance locus curves (trajectories) can be measured by LCRZ meters, or obtained from S-Parameters inductive region For 2-Port Impedances, freq Impedance Trajectory R with increasing frequency, all impedance trajectories turn clock-wise only the right half-plane is used (otherwise: R < 0 Ω!!) capacitive region -3-

Impedance Examples Typical Impedance Traces j*x Ideal Resistor R=10 Ω R The impedance is represented by a single point, for all frequencies, on the x-axis of the impedance plot -4-

j*x j*x Resistor and Capacitor Typical Impedance Traces Rp Rs R R freq freq -5-

j*x j*x Resistors and Capacitors Typical Impedance Traces R Rs Rp R Rs+Rp freq freq -6-

j*x j*x Resistor and Inductor Typical Impedance Traces freq freq Rp Rs R R -7-

Resistors and Inductors j*x j*x Typical Impedance Traces freq freq Rp Rs R Rs+Rp R -8-

Resonance Circuits j*x j*x Typical Impedance Traces freq Rp Rs R freq R -9-

Outline The Impedance Plane Z = R + j*x and Typical Impedance Traces Impedances from LCRZ Meters Impedances from S-Parameters Related Non-S-Parameter TwoPort Definitions -10-

LCRZ Meters Measure the Frequency-Dependent Impedance, with swept DC Bias. Dependent on the settings, this impedance is then converted into either Resistor + Capacitor or Resistor // Capacitor and, usually, only the capacitance of the Resistor//Capacitor interpretation is applied to modeling -11-

The real world, however, is the measured, complex Impedance, while a CV measurement curve is just its projection to the y-axis For Example: Diode Impedance Measurement @ 1MHz CV Measurement @ 1MHz vac = 0.9V vac = 0.8V vac = 0.7V vac = 0.5V vac = 0V vac = -0.5V *all* physical capacitors also exhibit a loss, the dissipation factor. This shows up like a resistor in series to the capacitor. In an Impedance Plot, this means a shift of the impedance curve to the right. when modeling *just the capacitor*, i.e. the projection of the reality to the y-axis, you will certainly get a fit, but the model may not be the correct, physical one. vac = -1V -12-

How to Read Capacitance and Parallel Resistor out of an Impedance Z Measurement: vac = 1 vac = -1 Y REAL Y j IMAG Y 1 j Cp Rp Rp 1 1 REAL Z j IMAG Y j Cp 1 IMAG Z Cp -13-

And... How to Read Capacitance and Series Resistor (Dissipation Factor of Capacitor) out of an Impedance Z Measurement: vac = 1 <------ Z ------> o--- --o-- ---o Rs Cs vac = -1 Z REAL Z j IMAG Z Rs 1 j Cs Rs REAL Z j IMAG Z Cs 1 j j Cs Cs 1 IMAG Z -14-

Practical Aspects of Impedance Analyzer Measurements -15-

The Basic Impedance Analyzer Measurement Principle "Diagonal Measurement" DUT Impedance i Z v Z v I2 V1 i -16 -

Impedance Analyzer Calibration The impedances of two Calibration Standards are measured first OPEN Cal. Standard measurement 17

Impedance Analyzer Calibration The impedances of two Calibration Standards are measured first OPEN Cal. Standard measurement SHORT Cal. Standard measurement 18

Impedance Analyzer Impedance Analyzer Impedance Analyzer Z_open Z_short Z_total Test Fixture and Cables DUT Test Fixture and Cables Test Fixture and Cables With Z_open and Z_short known, the DUT impedance can be calculated from Z_total DUT Z_dut OPEN-only Calibration: Z_dut = (Z_open*Z_total) / (Z_open - Z_total) OPEN-SHORT Calibration: Z_dut = (Z_short - Z_total) // (Z_total - Z_open) * Z_open Source: Keysight Technologies, 'Impedance Measurement Handbook' 2014, Appendix B Pre-Requisite: the equivalent schematic of test fixture and cables must be symmetrical. In Practice: not too long cables, good connectors 19

Measurement and Simulation Principle of LCRZ Meters for Multi-Port Devices: stimulate voltage at one port measure the current at the other port ground non-involved nodes and as a result, parasitics at each port to ground are not included in measurement result! P3 P1 P2 I2 V1 20

Z30 P3 P1 P2 i2 v1 Z20 - Z10 DUT 21

Outline The Impedance Plane Z = R + j*x and Typical Impedance Traces Impedances from LCRZ Meters Impedances from S-Parameters Related Non-S-Parameter TwoPort Definitions -22-

Impedance Plots can also be obtained from S-Parameter Measurements Calculating 1-Port S-Parameters from 2-Port: Viewed from Port1, with Port2 shorted: S _ 1Port S11 S12 S21 1 S22 Port1 Port2 DUT Viewed from Port2, with Port1 shorted: S _ 1Port S22 S12 S21 1 S11 1 S _ 1Port Im pedance Z0 1 S _ 1Port -23-

Interpreting Two-Port S-Parameter Measurements by a PI Schematic S.11 S.12 S matrix S.21 S.22 Assuming an underlaying PI schematic for the DUT, convert the de-embedded S-parameters to Y-parameters, and calculate the impedances of the PI schematic branches 1 1 Y.11 Y.12 Z10 Z12 Y matrix 1 Y.21 Y.22 Z12 1 Z12 1 1 Z20 Z12 Z12 Z10 Z20 1 Z10 Y.11 Y.12 1 Z12 Y.12 1 Z20 Y.22 Y.21 all variables are represented by complex numbers -24-

A Special Case: Transistor PI Schematic Modeling Ygd Ygm Yds Ygs 25

Step-by-step Procedure Convert the S-Parameter Matrix, Stripped-Off from External Resistors/Inductors, to a Y Matrix, and Apply the PI Schematic Interpretation for the Transistor Modeling Ygd Y11 Y12 Ygs Ygd Y21 Y22 Ygm Ygd Yds Ygd Ygd Ygm Ygs Yds Ygs = Y11 + Y12 Ygd = -Y12 Ygm = Y21 - Y12 = gm * exp(-jωtau) Yds = Y22 + Y12 26

Best-Practice Intermediate Step: Convert the PI-Schematic Admittances to Impedances, and Display them for Data Inspection/Verification Zgd gm Zgs = 1 / Ygs Zgd = 1 / Ygd Zds = 1 / Yds Zds Zgs Zgs Zgd Zds PI Impedances Inspection 27

Inner PI Components: for HEMT or MOSFET Quasistatic CGD RGD RGS CGS CDS vgs vgs Gm RDS 1. Convert de-embedded S-parameters to Z, and strip-off external inductors and resistors 2. Convert to Y-parameters and calculate complex impedances, admittances and Gm Z_10 = (Y.11 + Y.12) -1 Impedance Port1 -> GND Z_12 = (-Y.12) -1 Impedance Port1 -> Port2 Gm = Y.21 - Y.12 = GM e-j 2PI freq TAU Voltage -> Current Amplification Y_20 = Y.22 + Y.12 Admittance Port2 -> GND 3. Finally, get RGS = REAL(Z_10) RGD = REAL(Z_12) GM = MAG(Gm) RDS = (REAL(Y_20)) -1 CGS = - (IMAG(Z_10) -1 ) / (2PI freq) CGD = - (IMAG(Z_12) -1) / (2PI freq) TAU = - PHASE(Gm) / (2PI freq) CDS = IMAG(Y_20) / (2PI freq) 28

TAU.M TAU.S CDS.M CDS.S [E-15] [E-12] GM.M GM.S [E-3] CGS.M CGS.S [E-15] CGD.M CGD.S [E-15] HEMT Modeling Example S-Parameter Y-Parameter 29

Calculating the Branch-to-Branch Impedances of Multi-Ports -30-

The Y-matrix relates the currents into the ports with the stimulating port voltages. The matrix elements unit is admittance. This matrix is very useful when the impedances between the ports need to be extracted and analyzed, especially for multi-port applications. This is due to the voltage stimulation at the ports. When interested in the impedance between a certain port A, and another port B, all voltages, except the one at port A, have to be set to zero. Then, the current for the impedance calculation is not measured at this port A, but rather at port B. Of course, all other shorted ports do also sink currents, provided by the voltage source at port A, but they are not involved in the port B current measurement. In other words, the impedance Z AB, between port A and the shorted port B, is simply Z AB 1 YAB -31-

How to Calculate the Branch Impedances of a 3 Port Example: Port1-to-Port2-Impedance Z12 From an inspection of the 3-Port Y-Matrix definition: i1 Y11 Y12 i2 Y21 Y22 i Y 3 31 Y32 P3 Z30 apply a SHORT to Port2 and Port3, stimulate a voltage at Port1, measure the current at Port2 and calculate: P1 v1 Y 21 1 i2 i2 Z20 Z10 v1 Z12 P2 Z12 - Y13 v1 Y23 v 2 Y33 v 3 Note: the Y-Matrix indexing is Admittanceto from e.g. the admittance from Port1 to Port2 is Y21-32-

How to Calculate the Branch Impedances of a 3 Port At a Glance: From the 3-Port Y-Matrix: i1 Y11 Y12 i2 Y21 Y22 i Y 3 31 Y32 P3 Y13 v1 Y23 v 2 Y33 v 3 Z30 calculate the inter-port branch impedances: Z12 Y12 1 Z13 Y13 1 P1 P2 Z32 Y32 1 Z12 Z20 Z10 and the pin-to-ground impedances: Z10 ( Y11 Y12 Y13 ) 1 Z20 ( Y21 Y22 Y23 ) 1 Z30 ( Y31 Y32 Y33 ) 1-33-

How to Calculate the Branch Impedances of a 3 Port continued: i1 Y11 Y12 i2 Y21 Y22 i Y 3 31 Y32 P3 Y13 v1 Y23 v 2 Y33 v 3 The total impedance at P1, with P2 and P3 grounded, is 1/Y11 P1 P2 Z10 Z12 and so on: At P2, with P1 and P3 grounded, the total impedance is 1/Y22 And at P3, with P1 and P2 grounded, it is 1/Y33-34-

Application Example: 3-Port Transformer P1 P2 P3-35-

Outline The Impedance Plane Z = R + j*x and Typical Impedance Traces Impedances from LCRZ Meters Impedances from S-Parameters Related Non-S-Parameter TwoPort Definitions -36-

NON-S-PARAMETER TWOPORT DEFINITIONS INTERPRETATION AND APPLICATIONS OF THE MATRIX ELEMENTS -37 -

Before going into details, a quick look into MATRIX CONVERSIONS S to Z Matrix Conversion: Z to Y Matrix Conversion: E S Z Z0 E S Y 1/ Z Z to S Matrix Conversion: Y to Z Matrix Conversion: Z 1/ Y S Z Z0 E Z Z0 E S to Y Matrix Conversion: Pre-Requisite: - Z0, the characteristic impedance of the S-parameter measurement, is identical on all ports, and Z0 = REAL Y E S Z 0 E S S 11 S.. S M1 Z 11 Z.. Z M1 Y11 Y.. Y M1.................. S 1N.. S MN Z 1N.. Z MN Y1N.. YMN Y to S Matrix Conversion: S E Z0 Y E Z0 Y Remarks: - E is the identity matrix. It can be calculated the easiest way from any N-Port matrix by setting it to exponential 0: E = (Any_N_Port_Matrix)0-38 -

IMPEDANCE MATRIX Z Matrix i1 v v1 Port1 measured v1 v2 Z 11 Z 21 v2 Port2 v i2 stimulus Z 12 Z 22 i1 * i2-39 -

Important Z-Matrix Elements: measured v1 v2 Zz 11 z 21 Z11 = Input Impedance with Port2 OPEN stimulus z 12 zz 22 22 i1 * i2 Z22 = Output Impedance with Port1 OPEN Application: Verification of Passive Components Modeling -40 -

ADMITTANCE MATRIX i1 i2 Y Matrix i v1 - Port1 measured i1 i2 Note: Y 11 Y 21 Y Z 1 i - Port2 v2 stimulus Y 12 v 1 * Y 22 v 2-41 -

Important Y-Matrix Elements: measured i1 i2 Y 11 11 Y 21 1 Input Impedance with Port2 SHORTED Y11 1 - Y12 Impedance from Port2 to Port1 with Port1 SHORTED stimulus Y 12 Y 22 22 v1 * v2 1 Output Impedance with Port1 SHORTED Y22 Application: Verification of Passive Components Modeling -42 -

Important Y-Matrix Elements (cont'd): measured i1 i2 Y 11 YY21 21 stimulus Y 12 v 1 * Y 22 v 2 Y21= Trans-Conductance from Port1 to Port2 (gm=i2/v1) with Port2 SHORTED Application: Verification of gm Modeling of FETs -43 -

HYBRID MATRIX i2 H Matrix i1 v v1 Port1 measured v1 H 11 i2 H 21 i - Port2 v2 stimulus H 12 i1 * H 22 v 2-44 -

Important H-Matrix Elements: measured v1 H 11 H 21 i2 H 21 H21 = Current Amplification stimulus H 12 H 22 i1 * v2 i2/i1 with Port2 SHORTED Application: Verification of Bipolar Transistor betaac Modeling -45 -

INVERSE HYBRID MATRIX i1 G Matrix i v1 - Port1 measured i1 v2 Note: G 11 G 21 G H 1 Port2 v2 v i2 stimulus G 12 v 1 * G 22 i 2-46 -

Important G-Matrix Elements: measured i1 v2 G 11 G 21 G 21 stimulus G 12 G 22 v1 * i2 G21 = Voltage Amplification v2/v1 with Port2 OPEN = gm/gds Application: Voltage Amplification Verification for Transistor Modeling, especially MOS and HEMT -47 -

ABCD Matrix mind the direction of the i2 current flow! i1 A Matrix i v1 i2 also called ABC Matrix or chain matrix v Port1 Port2 measured v 1 A 11 i1 A 21 - v2 stimulus A 12 A 22 v2 * i2 i2: out of the TwoPort!! -48 -

Important ABCD-Matrix Elements: measured v 1 A 11 11 i1 A 21 stimulus A 12 A 22 v2 * i2 1/A11 = Voltage Amplification v2/v1 with Port2 OPEN * * Note: = gm/gds Application: Voltage Amplification Verification for Transistor Modeling, especially MOS and HEMT (see also G Matrix) 1/A11 means v2/v1 with i2=0. For measurements, to satisfy this condition with i2=0, Port1 has to be stimulated with v1, and v2 is measured at the open Port2-49 -

In a Nut Shell: Circuit Characteristics Calculated from Z, Y, H, G and ABCD Port1 Port2 v 1 Z 11 v 2 Z 21 i1 Y11 i 2 Y 21 Y12 Y 22 Condition Z Input Impedance Port2 OPEN Z11 Port2 SHORTED Port1 OPEN H12 i1 * H 22 v 2 i1 * i2 i1 G 11 v 2 G 21 G 12 v 1 * G 22 i 2 v1 * v 2 v 1 A 11 i1 A 21 A 12 v 2 * A 22 i 2 Z 12 Z 22 Characteristics Output Impedance v 1 H11 i 2 H 21 Y H G ABCD G21 1/A11 1/Y11 Z22 Port1 SHORTED 1/Y22 Trans-Conductance (gm=i2/v1) Port2 SHORTED Y21 Current Amplification i2/i1 Port2 SHORTED Voltage Amplification v2/v1 = gm/gds Port2 OPEN H21-50 -

In a Nut Shell: HEMT/MOS AC Characteristics Calculated from Y, H, G and ABCD Port1 MOS Port2 i1 Y11 i 2 Y 21 Y12 Y 22 v1 * v 2 i1 G 11 v 2 G 21 G 12 G 22 v 1 H11 i 2 H 21 H12 i1 * H 22 v 2 v 1 A 11 i1 A 21 A 12 v 2 * A 22 i 2 MOS AC Characteristics Condition Y Input Resistance Port2 SHORTED REAL(1/Y11) Input Cap (CGS & CGD) Port2 SHORTED IMAG(Y11)/ω Isolation (rev. Transconductance) Port1 SHORTED REAL(Y12) CGD Port1 SHORTED IMAG(Y12)/ω gm (Transconductance) Port2 SHORTED REAL(Y21) Rout (Channel & Substr. Resistors) Port1 SHORTED REAL(1/Y22) Output Cap (CDS & CGD) Port1 SHORTED IMAG(Y22)/ω ft Port2 SHORTED H G v1 * i2 ABCD H21*freq Note: Do not confuse these definitions with Inner-PI-Schematic modeling -51 -

Example: Angelov HEMT Modeling: Y-Parameter Fit -52 -

Example: Angelov HEMT Modeling: Z-Parameter Fit -53 -

Example: Angelov HEMT Modeling: H21, 1/A11 and other Fits -54 -

Wrap-Up The Impedance Plane Z = R + j*x and Typical Impedance Traces Impedances from LCRZ Meters Impedances from S-Parameters Related Non-S-Parameter TwoPort Definitions -55-

email: contact@sisconsult.de -56-56--