Physics-based compact model for ultimate FinFETs

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Physics-based compact model for ultimate FinFETs Ashkhen YESAYAN, Nicolas CHEVILLON, Fabien PREGALDINY, Morgan MADEC, Christophe LALLEMENT, Jean-Michel SALLESE nicolas.chevillon@iness.c-strasbourg.fr

Research team and collaboration Professor - Christophe LALLEMENT Associate professor - Fabien PREGALDINY Compact modeling of advanced devices Associate professor - Morgan MADEC Post-doc Ashkhen YESAYAN - left in Dec. 2010 PhD student - Nicolas CHEVILLON Collaboration Dr. Jean-Michel SALLESE LEG, EPFL N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 2

Outline 1 Introduction 2 Short-channel effects modeling 3 Mobility modeling 4 Quantum mechanical effect modeling 5 6 Transcapacitance modeling Doped DG MOSFET modeling N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 3

FinFET transistor L: channel length W Si : silicon width H Si : silicon height t ox : oxide thickness One of the best candidate to extend the CMOS technology. Needs of designers for advanced circuit simulation: (COMON European project) a physics-based FinFET compact model a parameter extraction methodology N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 4

Physics-based FinFET compact model Physics-based long-channel DG MOSFET model [1] Extension of the undoped model to high doping [2] Model accounts for small-geometry effects [3]: Short-channel effects (SCE), drain-induced barrier lowering (DIBL) Subthreshold swing degradation Drain saturation voltage and channel length modulation (CLM) Mobility degradation Quantum mechanical effects (QME) Transcapacitance modeling for small-geometry [3] [1] J.-M. Sallese, F. Krummenacher, F. Prégaldiny, C. Lallement, A. Roy and C. Enz, A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism, Solid-State Electronics, vol. 49, no. 3, pp.485-489, Mar 2005. [2] J.-M. Sallese, N. Chevillon, F. Prégaldiny, C. Lallement and B. Iñiguez, The equivalent-thickness concept for doped symmetric DG MOSFETs, IEEE Transactions on Electron Devices, vol. 57, no. 11, pp.2917-2924, Nov 2010. [3] A. Yesayan, F. Prégaldiny, N. Chevillon, C. Lallement and J.-M. Sallese, Physics-based compact model for ultra-scaled FinFETs, Solid-State Electronics, Article in Press, April 2011. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 5

Range of validity Gate length (L) : down to 25 nm Silicon width (W Si ) : down to 3 nm Silicon height (H Si ): down to 50 nm Gate oxide thickness (t ox ) : 1.5 nm Top oxide thickness (t top ) : 50nm Channel doping (N ch ) : intrinsic to 10 17 cm -3 and high doping* Source/Drain doping (N sd ) : 5 10 21 cm -3 *: only for long channel devices N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 6

Long channel drain current model [1] Normalized charge-potentials relationship: [2] Normalized drain current: [1] J.-M. Sallese, F. Krummenacher, F. Prégaldiny, C. Lallement, A. Roy and C. Enz, A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism, Solid-State Elec., vol. 49, no. 3, pp.485-489, Mar 2005. [2] F. Prégaldiny, F. Krummenacher, B. Diagne, F. Pêcheux, J.-M. Sallese and C. Lallement, Explicit modelling of the double-gate MOSFET with VHDL-AMS Int. J. Numer. Model., vol. 19, pp. 239-256, Mar 2006. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 7

Study of the minimum surface potential Cross-section of FinFET Study in: - classic physics - weak inversion N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 8

Current model for ultra-short channels [1] (1/2) Correction of the gate voltage: Drain current model: [1] A. Yesayan, F. Prégaldiny, N. Chevillon, C. Lallement and J.-M. Sallese, Physics-based compact model for ultra-scaled FinFETs, Solid-State Electronics, Article in Press, April 2011. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 9

Current model for ultra-short channels (2/2) Potential Expression in the channel in the subthreshold region [1]: valid for L > 1.5 W Si In weak inversion: General scaling length in the long-channel case, in the short-channel case, In strong inversion, analytical expression is negligeable w.r.t, No need of smoothing function between weak and strong inversion. [1] X. Liang, and Y. Taur, A 2-D Analytical solution for SCEs in DG MOSFETs, IEEE Trans. Electron Devices, vol. 51, no. 8, pp. 1385-1391, August 2004. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 10

Mobility model [1] Total mobility model and channel length modulation model taken from [2] Transversal mobility: Term of mobility degradation for the short channels in weak inversion Terms of mobility degradation in strong inversion : long-channel low field mobility : transversal electric field in weak inversion : transversal electric field in high inversion : normalizing factor : parameters to be extracted [1] A. Yesayan, F. Prégaldiny, N. Chevillon, C. Lallement and J.-M. Sallese, Physics-based compact model for ultra-scaled FinFETs, Solid-State Electronics, Article in Press, April 2011. [2] F. Lime, B. Iñiguez and O. Moldovan, A quasi-two dimentional compact drain-current model for undoped symmetric double-gate MOSFETs including short-channel effects, IEEE Trans. Electron Devices, vol. 55, no. 6, pp. 1441-1448, June 2008. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 11

Quantum mechanical effects [1] (1/3) Principle of the quantum mechanical effects modeling Quantum shift of the first energy level: W Si W Si E 1 E 1 E 0 E 0 E C Structural confinement E C Electrical confinement [1] A. Yesayan, F. Prégaldiny, N. Chevillon, C. Lallement and J.-M. Sallese, Physics-based compact model for ultra-scaled FinFETs, Solid-State Electronics, Article in Press, April 2011. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 12

Quantum mechanical effects (2/3) Modeling of the quantum shift as a correction to surface potential: Inclusion of the term of structural confinement in the charge-potential relationship Inclusion of the term of electrical confinement in the charge-potential relationship : elementary electronic charge : thermal voltage : effective mass of electrons in the channel length direction N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 13

Quantum mechanical effects (3/3) New charge-potentials relationship: Normalized drain current expression: Addition of a term in the drain current expression by taking into account the QMEs N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 14

Results of the static model Id(Vg) current curves Id(Vd) current curves Symbols: Quantum 3D simulations with CVT mobility model Lines: Compact model N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 15

Transcapacitance modeling [1] Transcapacitance definitions: Normalized total charge calculation according to the channel charge partition proposed by Ward Charge-based expressions for the transcapacitances [1] A. Yesayan, F. Prégaldiny, N. Chevillon, C. Lallement and J.-M. Sallese, Physics-based compact model for ultra-scaled FinFETs, Solid-State Electronics, Article in Press, April 2011. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 16

Transcapacitance modeling [1] Modeling of the structural confinement by the calculation of the charge density. in Modeling of the electrical confinement by to a taylor series, approximated according within a new definition of the gate oxide capacitance [1] A. Yesayan, F. Prégaldiny, N. Chevillon, C. Lallement and J.-M. Sallese, Physics-based compact model for ultra-scaled FinFETs, Solid-State Electronics, Article in Press, April 2011. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 17

Results of the dynamic model Cgg(Vg) of long channel Cgg(Vg) of short channel Symbols: Quantum 3D simulations with constant mobility Lines: Compact model N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 18

Doped DG MOSFET model [1] The equivalent-thickness concept Energy diagram Including the doping N a in the Poisson s equation, we obtain a similar model than the one for the undoped DG MOSFET [2]. [1] J.-M. Sallese, N. Chevillon, F. Prégaldiny, C. Lallement and B. Iñiguez, The equivalent-thickness concept for doped symmetric DG MOSFETs, IEEE Transactions on Electron Devices, vol. 57, no. 11, pp.2917-2924, Nov 2010. [2] J.-M. Sallese, F. Krummenacher, F. Prégaldiny, C. Lallement, A. Roy and C. Enz, A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism, Solid-State Electronics, vol. 49, no. 3, pp.485-489, Mar 2005. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 19

Doped DG MOSFET model [1] The equivalent-thickness concept Charge-potentials relationship [1] J.-M. Sallese, N. Chevillon, F. Prégaldiny, C. Lallement and B. Iñiguez, The equivalent-thickness concept for doped symmetric DG MOSFETs, IEEE Transactions on Electron Devices, vol. 57, no. 11, pp.2917-2924, Nov 2010. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 20

Doped DG MOSFET results Exact analytical relationship between the equivalent thickness and the doping Equivalent thickness Mobile charge density T si = 40 nm 20 nm 10 nm N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 21

Doped DG MOSFET results Normalized drain current Drain current versus gate voltage N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 22

Electrical parameter number of the model Effect Previous model [1,2] Present model [3] Roll-off (SCE), DIBL Subthreshold Slope (SS) Channel Length Modulation (CLM) 18 0 1 1 Mobility - 2 Quantification (QME) 9 0 Overlap capacitance - 1 All 28 4 [1] M. Tang, F. Prégaldiny, C. Lallement, J.-M. Sallese, Explicit compact model for ultranarrow body FinFETs IEEE Trans. Electron Devices, vol. 56, no. 7, pp.1543-1547, Jul 2009. [2] N. Chevillon, M. Tang, F. Prégaldiny, C. Lallement et M. Madec, FinFET compact modeling and parameter extraction, 16th IEEE MIXDES., pp.55-60, Juin 2009. [3] A. Yesayan, F. Prégaldiny, N. Chevillon, C. Lallement and J.-M. Sallese, Physics-based compact model for ultra-scaled FinFETs, Solid-State Electronics, Article in Press, April 2011. N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 23

Conclusion Included effects SCE & DIBL Sub-threshold Slope degradation Drain saturation voltage Channel length modulation (CLM) Mobility degradation Quantum mechanical effects Extrinsic capacitances Validity range Perspectives I D (V GS ) & I D (V DS ), small-signal parameters (g m, g ds, ) L 25nm W Si 3 nm H Si = 50nm t ox = 1.5nm Physic-based modeling of the temperature dependence 3D modeling: consideration of the triple-gate FinFET Extension of the doped model to short-channel devices Parameter extraction methodology associated with an automated extraction procedure N. CHEVILLON nicolas.chevillon@iness.c-strasbourg.fr 24

Major publications: J.-M. Sallese, F. Krummenacher, F. Prégaldiny, C. Lallement, A. Roy and C. Enz, A design oriented chargebased current model for symmetric DG MOSFET and its correlation with the EKV formalism, Solid-State Electronics, vol. 49, no. 3, pp.485-489, Mar 2005. A. Yesayan, F. Prégaldiny, N. Chevillon, C. Lallement and J.-M. Sallese, Physics-based compact model for ultra-scaled FinFETs, Solid-State Electronics, Article in Press, April 2011. J.-M. Sallese, N. Chevillon, F. Prégaldiny, C. Lallement and B. Iñiguez, The equivalent-thickness concept for doped symmetric DG MOSFETs, IEEE Transactions on Electron Devices, vol. 57, no. 11, pp.2917-2924, Nov 2010.

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