INTEGRATE CIRCUITS Octal -type flip-flop; positive edge-trigger (3-State) Supersedes data of 1996 Feb IC24 ata Handbook 1997 Mar 20
FEATURES Wide operating voltage: 1.0 to 5.5 Optimized for Low oltage applications: 1.0 to 3.6 Accepts TTL input levels between CC = 2.7 and CC = 3.6 Typical OLP (output ground bounce) 0.8 @ CC = 3.3, T amb = 25 C Typical OH (output OH undershoot) 2 @ CC = 3.3, T amb = 25 C Common 3-State output enable input Output capability: bus driver I CC category: MSI ESCRIPTION The is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT374. The is an octal -type flipflop featuring separate -type inputs for each flip-flop and 3-state outputs for bus oriented applications. A clock () and an output enable (OE) input are common to all flip-flops. The eight flip-flops will store the state of their individual -inputs that meet the set-up and hold times requirements on the LOW-to-HIGH transition. When OE is LOW, the contents of the eight flip-flops is available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. UICK REFERENCE ATA GN = 0; T amb = 25 C; t r =t f 2.5 ns SYMBOL PARAMETER CONITIONS TYPICAL UNIT t PHL /t PLH Propagation delay to n C L = 15pF CC = 3.3 14 ns f max Maximum clock frequency 77 MHz C I Input capacitance 3.5 pf C P Power dissipation capacitance per flip-flop Notes 1 and 2 25 pf NOTES: 1. C P is used to determine the dynamic power dissipation (P in µw) P = C P 2 CC x f i (C L 2 CC f o ) where: f i = input frequency in MHz; C L = output load capacity in pf; f o = output frequency in MHz; CC = supply voltage in ; (C L 2 CC f o ) = sum of the outputs. 2. The condition is I = GN to CC ORERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIE NORTH AMERICA NORTH AMERICA PKG. WG. # 20-Pin Plastic IL 40 C to +125 C N N SOT146-1 20-Pin Plastic SO 40 C to +125 C SOT163-1 20-Pin Plastic SSOP Type II 40 C to +125 C B B SOT339-1 PIN ESCRIPTION PIN NUMBER SYMBOL FUNCTION 1 OE Output enable input (active-low) 2, 5, 6, 9, 12, 15, 16, 19 3, 4, 7, 8, 13, 14, 17, 18 0 to 7 0 to 7 3-State flip-flop outputs ata inputs 10 GN Ground (0) 11 Clock input (LOW-to-HIGH, edgetriggered) 20 CC Positive supply voltage FUNCTION TABLE OPERATING INPUTS INTERNAL OUTPUTS MOES OE n FLIP-FLOPS 0 to 7 Load and read register Load register and disable outputs L L H H H = HIGH voltage level h l h l h L H L H = HIGH voltage level one set-up time prior to the LOW-to-HIGH transition L = LOW voltage level l = LOW voltage level one set-up time prior to the LOW-to-HIGH transition Z = High impedance OFF-state = LOWtoHIGH clock transition L H Z Z 1997 Mar 20 2
PIN CONFIGURATION LOGIC SYMBOL OE 1 20 CC 11 0 0 1 1 2 2 3 3 GN 2 3 4 5 6 7 8 9 10 19 18 17 16 15 14 13 12 11 7 7 6 6 5 5 4 4 S00338 3 4 7 8 13 14 17 18 0 1 2 3 4 5 6 7 OE 0 1 2 3 4 5 6 7 2 5 6 9 12 15 16 19 LOGIC SYMBOL (IEEE/IEC) 1 S00339 11 1 C1 EN1 FUNCTIONAL IAGRAM 3 0 0 2 3 1 2 4 1 1 5 4 7 8 13 14 17 5 6 9 12 15 16 7 2 2 6 8 3 3 9 FF1 3-STATE to 13 4 OUTPUTS FF8 4 12 14 5 5 15 17 6 6 16 18 7 7 19 18 19 11 S00340 1 OE LOGIC IAGRAM 0 1 2 3 4 5 6 7 S00341 FF1 FF2 FF3 FF4 FF5 FF6 FF7 FF8 OE 0 1 2 3 4 5 6 7 S00342 1997 Mar 20 3
ABSOLUTE MAXIMUM RATINGS 1, 2 In accordance with the Absolute Maximum Rating System (IEC 134) oltages are referenced to GN (ground = 0) SYMBOL PARAMETER CONITIONS RATING UNIT CC C supply voltage 0.5 to +7.0 ±I IK C input diode current I < 0.5 or I > CC + 0.5 20 ma ±I OK C output diode current O < 0.5 or O > CC + 0.5 50 ma C output source or sink current ±I O standard outputs bus driver outputs ±I GN, ±I CC C CC or GN current for types with standard outputs bus driver outputs 0.5 < O < CC + 0.5 25 35 T stg Storage temperature range 65 to +150 C P TOT Power dissipation per package plastic IL plastic mini-pack (SO) plastic shrink mini-pack (SSOP and TSSOP) for temperature range: 40 to +125 C above +70 C derate linearly with 12mW/K above +70 C derate linearly with 8 mw/k above +60 C derate linearly with 5.5 mw/k NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENE OPERATING CONITIONS SYMBOL PARAMETER CONITIONS MIN TYP. MAX UNIT CC C supply voltage See Note1 1.0 3.3 5.5 I Input voltage 0 CC O Output voltage 0 CC T amb t r, t f Operating ambient temperature range in free air Input rise and fall times except for Schmitt-trigger inputs See C and AC characteristics per device CC = 1.0 to 2.0 CC = 2.0 to 2.7 CC = 2.7 to 3.6 CC = 3.6 to 5.5 40 40 50 70 750 500 400 +85 +125 500 200 100 50 NOTES: 1. The L is guaranteed to function down to CC = 1.0 (input levels GN or CC ); C characteristics are guaranteed from CC = 1.2 to CC = 5.5. ma ma mw C ns/ 1997 Mar 20 4
C CHARACTERISTICS FOR THE L FAMILY Over recommended operating conditions voltages are referenced to GN (ground = 0) LIMITS SYMBOL PARAMETER TEST CONITIONS -40 C to +85 C -40 C to +125 C UNIT MIN TYP 1 MAX MIN MAX CC = 1.2 0.9 0.9 HIGH level Input CC = 2.0 1.4 1.4 IH voltage CC = 2.7 to 3.6 2.0 2.0 CC = 4.5 to 5.5 0.7* CC 0.7* CC CC = 1.2 0.3 0.3 LOW level Input CC = 2.0 0.6 0.6 IL voltage CC = 2.7 to 3.6 0.8 0.8 OH OH OH OL OL OL I I I OZ I CC I CC HIGH level output voltage; all outputs uts CC = 4.5 to 5.5 0.3* CC 0.3* CC CC = 1.2; I = IH or IL; I O = 100µA 1.2 CC = 2.0; I = IH or IL; I O = 100µA 1.8 2.0 1.8 CC = 2.7; I = IH or IL; I O = 100µA 2.5 2.7 2.5 CC = 3.0; I = IH or IL; I O = 100µA 2.8 3.0 2.8 CC = 4.5; I = IH or IL; I O = 100µA 4.3 4.5 4.3 HIGH level output voltage; CC = 3.0; I = IH or IL; I O = 6mA 2.40 2.82 2.20 STANAR outputs CC = 4.5; I = IH or IL; I O = 12mA 3.60 4.20 3.50 HIGH level output CC = 3.0; I = IH or IL; I O = 8mA 2.40 2.82 2.20 voltage; BUS driver outputs CC = 4.5; I = IH or IL; I O = 16mA 3.60 4.20 3.50 LOW level output voltage; all outputs uts CC = 1.2; I = IH or IL; I O = 100µA 0 CC = 2.0; I = IH or IL; I O = 100µA 0 0.2 0.2 CC = 2.7; I = IH or IL; I O = 100µA 0 0.2 0.2 CC = 3.0; I = IH or IL; I O = 100µA 0 0.2 0.2 CC = 4.5; I = IH or IL; I O = 100µA 0 0.2 0.2 LOW level output voltage; CC = 3.0; I = IH or IL; I O = 6mA 0.25 0.40 0.50 STANAR outputs CC = 4.5; I = IH or IL; I O = 12mA 0.35 0.55 0.65 LOW level output CC = 3.0; I = IH or IL; I O = 8mA 0.20 0.40 0.50 voltage; BUS driver outputs CC = 4.5; I = IH or IL; I O = 16mA 0.35 0.55 0.65 Input leakage current 3-State output OFF-state current uiescent supply current; SSI uiescent supply current; flip-flops uiescent supply current; MSI uiescent supply current; LSI CC = 5.5; I = CC or GN 1.0 1.0 µa CC = 5.5; I = IH or IL; O = CC or GN 5 10 µa CC = 5.5; I = CC or GN; I O = 0 20.0 40 CC = 5.5; I = CC or GN; I O = 0 20.0 80 CC = 5.5; I = CC or GN; I O = 0 20.0 160 CC = 5.5; I = CC or GN; I O = 0 500 1000 I CC Additional quiescent supply CC = 2.7 to 3.6; I = CC 0.6 500 850 µa current per input NOTE: 1. All typical values are measured at T amb = 25 C. µa µa 1997 Mar 20 5
AC CHARACTERISTICS GN = 0; t r = t f = 2.5ns; C L = 50pF; R L = 500Ω SYMBOL PARAMETER WAEFORM t PHL/ t PLH t PZH/ t PZL t PHZ/ t PLZ t W t su t h f max Propagation delay to n Propagation delay OE to n Propagation delay OE to n Clock pulse width HIGH or LOW Set-up time n to Hold time n to Maximum clock pulse frequency CONITION LIMITS 40 to +85 C LIMITS 40 to +125 C UNIT CC () MIN TYP MAX MIN MAX 1.2 90 2.0 31 39 49 Figure 1 2.7 23 29 36 ns 3.0 to 3.6 17 2 23 29 4.5 to 5.5 19 24 1.2 75 2.0 26 34 43 Figure 2 2.7 19 25 31 ns 3.0 to 3.6 14 2 20 25 4.5 to 5.5 17 21 1.2 80 2.0 29 39 48 Figure 2 2.7 22 29 36 ns 3.0 to 3.6 17 2 24 29 4.5 to 5.5 20 24 2.0 34 12 41 Figure 1 2.7 25 9 30 ns Figure 3 Figure 3 NOTE: 1. Unless otherwise stated, all typical values are at T amb = 25 C. 2. Typical value measured at CC = 3.3. 3. Typical value measured at CC = 5.0. 3.0 to 3.6 20 7 2 24 1.2 25 2.0 22 9 26 2.7 16 6 19 3.0 to 3.6 13 5 2 15 1.2 10 2.0 5 3 5 2.7 5 2 5 3.0 to 3.6 5 2 2 5 2.0 15 40 12 Figure 2 2.7 19 58 16 MHz 3.0 to 3.6 24 70 2 20 ns ns 1997 Mar 20 6
AC WAEFORMS M = 1.5 at CC 2.7 3.6 M = 0.5 * CC at CC 2.7 and 4.5 OL and OH are the typical output voltage drop that occur with the output load. I INPUT M (1) 1/f max GN t su t su INPUT M t W n INPUT ÌÌÌÌ I ÌÌÌÌ GN M t h t h ÌÌÌÌÌ Ì ÌÌÌÌÌÌÌ t PHL t PLH OH n OUTPUT 90% M 10% n OUTPUT OL M t THL t TLH NOTE: the shaded areas indicate when the input is permitted to change for predictable output performance. S00345 S00343 Figure 1. Waveforms showing the clock () to output (n) propagation delays, the clock pulse width, output transition times and the maximum clock pulse frequency Figure 3. Waveforms showing the data set-up and hold times for the n input to the input NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. I OE INPUT M GN CC OUTPUT LOW-to-OFF OFF-to-LOW OL t PLZ X t PZL M t PHZ t PZH OH OUTPUT HIGH-to-OFF OFF-to-HIGH Y M GN outputs enabled outputs disabled outputs enabled S00344 Figure 2. Waveforms showing the 3-state enable and disable times 1997 Mar 20 7
TEST CIRCUIT PULSE GENERATOR l cc.u.t. O S 1 R L = 1k S1 Open GN NEGATIE PULSE t W 90% 90% M 10% 10% t THL (t f ) M t TLH (t r ) t TLH (t r ) t THL (t f ) I 0 R T C L = 50pF R L = 1k POSITIE PULSE M 90% 90% M I Test Circuit for Outputs 10% 10% t W 0 M = 1.5 Input Pulse efinition SWITCH POSITION TEST S 1 t PLH/ t PHL Open t PLZ/ t PZL S1 t PHZ /t PZH GN CC < 2.7 2.73.6 4.5 I CC 2.7 CC S1 2 CC 2 CC 2 CC EFINITIONS R L = Load resistor C L = Load capacitance includes jig and probe capacitance R T = Termination resistance should be equal to Z OUT of pulse generators. SY00044 Figure 4. Load circuitry for switching times 1997 Mar 20 8
IP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1 1997 Mar 20 9
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 1997 Mar 20 10
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 1997 Mar 20 11
EFINITIONS ata Sheet Identification Product Status efinition Objective Specification Preliminary Specification Product Specification Formative or in esign Preproduction Product Full Production This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 940883409 Telephone 800-234-7381 Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A. print code ate of release: 05-96 ocument order number: 9397-750-04448 yyyy mmm dd 12