Voltage cotrolled oscillator (VO) Oscillatio frequecy jl Z L(V) jl[ L(V)] [L L (V)] L L (V) T
VO gai / Logf Log 4 L (V) f f 4 L(V) Logf / L(V) f 4 L (V) f (V) 3 Lf 3 VO gai / (V) j V / V Bi (V) / V Bi j ( V / V Bi ) 3/ / VBi V (V V) Bi j 3/ V k V k V 8 V L[ f f Lf V V V T Bi (V Poiché: Bi j V)] f 3/ () L 8 L[ 3 T c VBi (V V) Bi V Bi j j V / V j 3/ Bi (V Bi V)] 3/ 4
Phase-locked loop (PLL) / PLL is a system that allows sychroizatio of local oscillator i the receiver to received data: the phase-locked oscillator ca be used or received sigal regeeratio The system performs evaluatio of the phase of received sigal, ad the sychroizatio of VO phase by meas of a D feedback loop 5 Phase-locked loop (PLL) / The overall system comprises a Phase Detector, a low-pass filter with pulse respose w(t), ad a VO 6 3
Phase-locked loop (PLL) /3 Uder the hypothesis that the received sigal v i (t) shows istataeous phase i (t), ad that at iitial time istat it shows a phase differece vi () with respect to the sigal at VO output: v v (t) = A v (t) si( v t + vi ()) v i (t) = A i (t) si( i t) K p is the phase detector gai, ad K v the VO gai 7 Phase-locked loop (PLL) /4 The system ca be represeted by meas of the equivalet scheme below: 8 4
Phase-locked loop (PLL) /5 e p (t) = K p [ i (t) - v (t)] E p (s) = K p [ i (s) - v (s)] e v (t) = e p (t) w(t) E v (s) = E p (s) W(s) v (t) = + K v e v (t) 9 Phase-locked loop (PLL) /6 I order to uderstad the PLL dyamic behavior, we suppose that at the iitial time istat the system is i lock ( i =, e v = ). Moreover, we suppose a little deviatio i (t) (i.e. a small-sigal model ca be used) with respect to the value i at lock: itot (t) = i + i (t) vtot (t) = v + v (t) = i + v (t) 5
Phase-locked loop (PLL) /7 From liear aalysis, PLL trasfer fuctios as a fuctio of the loop gai T(s) are derived: T(s) = K p K v W(s) / s v (s) / i (s) = T(s) / [ + T(s)] = H(s) (s) / i (s) = [ i (s) - v (s)] / i (s) = / [ + T(s)] If K p K v the VO phase is locked to the received sigal phase Phase-locked loop (PLL) /8 PLL operatio ca be comprised by evaluatig the respose to a step iput sigal, startig from the lock coditio. Both a phase step ad a frequecy step are cosidered: I case of phase step i we get: lim (t) = lim s (s) = lim s i /s / [ + T(s)] = t s s I case of frequecy step i we get: lim (t) = lim s (s) = lim s i /s / [ + T(s)] = i / [K p K v W()] t s s 6
Phase-locked loop (PLL) /9 The PLL behaves as a uitary feedback system with loop gai T(s). i (s)] - T(s) v (s)] Loop stability ca be checked by tracig the root locus of loop gai T(s), as a fuctio of the filter trasfer fuctio W(s) 3 Phase-locked loop (PLL) / If W(s) = (o filter), T(s) shows a sigle pole i the origi, ad therefore o istability issues are foud If W(s) = / ( + s R ) (R- filter) T(s) shows a pole i the origi ad a secod pole s = - / (R ): a oscillatio behavior is foud i the time respose, ad the dampig factor decreases as the loop gai K p K v icreases: K p K R v R K p K v 4 7
Phase-locked loop (PLL) / I order to iduce oscillatio dampig, a zero is added i the filter trasfer fuctio, so that the followig root locus is foud: 5 Phase-locked loop (PLL) / K K (R R ) p v K p K v R (R R )K p K v Loop gai expressio is: K T(s) p K s v sr s(r R ) 6 8
Phase-locked loop (PLL) /3 A more efficiet filter topology ca be cosidered exploitig a operatioal amplifier (active filter) 7 Phase-locked loop (PLL) /4 I this case we have T(s) = K p K v / s ( + s R ) / (s R ). I particular, W(s) shows a pole i the origi, ad the system allows phase lock eve i presece of a frequecy step K p R K v ( R / R) K p K v 8 9
Phase-locked loop (PLL) /5 The followig expressio for H(s) is foud: s H(s) s s We ll see below the effect of PLL i presece of white phase oise 9 Phase-locked loop (PLL) /6 The Lock Rage is a parameter which accouts for PLL capability to recover istataeously (i.e. withi a sigle period) the lock coditio, i presece of phase oise The lock Time T L shows iverse proportioality versus the atural radia frequecy of poles. The lock rage L istead shows direct proportioality versus. Therefore, a more fast sychroizatio is obtaied with a grater value (a greater loop badwidth) However, a greater loop badwidth produces more phase oise at the output
Phase-locked loop (PLL) /7 The Lock Rage ca be evaluated by supposig a stepwise iput i : it correspods to a iput phase error i = i t, ad at PD output (if a aalog multiplier is used) we fid: e p (t) = K p cos( i t) At filter output (W(j) = W(j) exp( W (j)) is filter respose), the sigal e v (t) is: e v (t) = K p W(j i ) cos( i t + W ( i )) Ad maximum radia frequecy variatio at VO output is: MAX = K p K v W(j i ) Phase-locked loop (PLL) /8 The coditio to obtai PLL lock withi a period, as a fuctio of VO tuig rage ad loop gai, is the followig: L = K p K v W(j L ) If a active filter is cosider, we have: L = K p K v R / R =
Noise sources i electroic devices / T e 4kTBr b i Shot qi B i Flic ker K B F A IB f F df The presece of such oise sources i a -port etwork ca be represeted by meas of a oisy equivalet model 3 Noise sources i electroic devices / The power spectral desity of curret oise i a E amplifier shows the behavior depicted below, i which three mai regios ca be see:. /f behavior due to Flicker oise (up to some KHz). Flat behavior due to white oise (Shot & Johso) 3. f behavior due to trasistor domiat pole I eq 3 f c f 4
Phase oise i oscillators - Due to the presece o device oise sources, oise is added to both amplitude ad phase of the oscillators: vout(t) [Vˆ v(t)] si[ t (t)] ( t) d(t) dt Amplitude modulatio ca be cacelled by meas of a limiter, while phase oise caot be elimiated 5 Phase oise i oscillators - Noise ca be cosidered as a phasor that produces modificatio of the output sigal phasor: both the amplitude (but it ca be eglected) ad the phase are affected. For oise power (i.e. oise variace) we get: (t) s s(t) i( t) arctg Vˆ c(t) Vˆ B (t) i S N S As it ca be see, power oise is iversely proportioal to sigal-to-oise ratio 6 3
Phase oise i oscillators - 3 The sigal spectrum shows side-bads with differet power, together with the cetral frequecy (i.e. the oscillatio frequecy f ) If we evaluate the spectral compoet at f m frequecy of a sigal composed of side-bads B (at -f m ) e B (at f m ), ad f v(t) A cos( t) B cos[( )t] B cos[( m m It ca be cosidered as the superpositio of a amplitude modulatio ad a low-idex phase modulatio )t] 7 Phase oise i oscillators - 4 A symmetrical spectrum is produced by amplitude modulatio v(t) A [ cos(ω t)] cos(ω t) A A cos(ω t) cos[(ω ω m A )t] cos[( m m )t] If we suppose a cosie waveform with uitary amplitude ad phase modulatio with maximum phase deviatio << 9 : v(t) cos[ t si( m t)] 8 4
Phase oise i oscillators - 5 By usig trigoometric trasformatios, we get: v(t) cos(ω t) cos[(ω ω )t] cos[( m m )t] I the followig slide, we ca see the overall sigal together with the modulated sigals 9 Phase oise i oscillators - 6 Overall Amplitude modulatio Phase modulatio 3 5
Phase oise i oscillators - 7 The Figure of Merit used to accout for phase oise performace is Sigle Sidebad to arrier Ratio SSR(), the ratio betwee oise i a sigle sidebad = Hz placed at distace from, ad the overall power: S SSR ( ) log Now, a lik will be foud betwee physical oise sources i electroic devices ad phase oise, uder additive oise hypothesis vv ( ) P tot 3 Phase oise i oscillators - 8 Block A amplificatio is cosidered as real Noise is filtered by a resoat etwork characterized with its frequecy stability coefficiet S F : S F S S( ) ( ) S F N( ) Noise N() of electroic devices produces trasfer fuctio phase variatio 3 6
Phase oise i oscillators - 9 Phase oise spectrum ca be evaluated from frequecy depedece o oise spectrum Aroud Flicker oise is the mai cotributio ad the spectrum is: S( ) 3 S F Oly white oise is foud for frequecies greater tha the oise corer frequecy (f c ): S ( ) S F kb T F 33 Phase oise i oscillators - Noise is o more filtered by the resoat etwork: the S F expressio used to evaluate phase oise is ot valid, ad the phase oise spectrum is white as the oise Flicker (-3dB/dec) White (-db/dec) Amp. poles F k T S ( ) B No filterig S Fially, above the cut-off frequecy of the amplifier block, oise is filtered out by the amplifier trasfer fuctio (- db/dec slope if sigle-pole respose) 34 7
PLL Phase oise - Let s suppose to start from lock coditio ad to iject white oise with B badwidth From PLL trasfer fuctios we get: v( i s) H(s) (s) ad fially the overall phase oise power spectrum is: S v (j) H(j) S i (s) H(j) N SB 35 PLL Phase oise - Output phase oise depeds o PLL trasfer fuctio (ad so from chose filter): No filter: H(j) K p Kv K K p v R filter: Active filter: H(j) H(j) ( 4 ) 4 4 ( ) 4 36 8
PLL Phase oise - 3 I particular, if a active filter is cosidered, for the output phase oise power we get: N (t) H(j) d v SB N SB 4 Therefore, reductio of phase oise is obtaied accordig to the factor /B ( =.5 is cosidered): ( t) i N S B B 37 PLL Phase oise - 4 Err QUARTZ Err VO Kp W(s) Kv + /s OUT /s : N PLL works as LPF for iput phase oise, ad as a HPF for VO phase oise: i both cases, 38 is the cut-off radia frequecy 9
4-quadrat Multiplier A 4-quadrat multiplier architecture is obtaied by drivig the Gilbert cell by meas of a differetial curret i X i F i X v Y tah V T Also temperature compesatio is obtaied 39 4-quadrat Multiplier A multiplier is obtaied uder smallsigal hypothesis: i X F I EE v X tah V T (R EE =) i F I EE v X tah V T v Y tah V T 4
4-quadrat Multiplier I case of small-sigal iputs at the same radia frequecy : i F I EE vˆ X cos V T t vˆ cost Y V T The toe at radia frequecy is cacelled by meas of a LPF, ad the output curret is proportioal the product of the iputs: i F I EE vˆ X vˆ V Y T X cos t Filtered-out 4 4-quadrat Multiplier as Phase Detector A aalog multiplier ad a LPF ca be used as a phase detector, for istace i a PLL: If the two iputs are at the same frequecy but differet phase: v A si ( t) v A si ( t ) At the output we get: A A The PD gai Kp depeds o amplitude of iput sigals X vout cos( ) cos( t ) Filtered-out I a PLL, whe lock coditio is foud, / phase differece is got, as cos() = 4