5.0 V Dual TTL to Differential PECL Translator The MC0ELT/00ELT22 is a dual TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5 V and ground are required. The small outline -lead package and the low skew, dual gate design of the ELT22 makes it ideal for applications which require the translation of a clock and a data signal. Features.2 ns Typical Propagation Delay < 300 ps Typical Output to Output Skew PNP TTL Inputs for Minimal Loading Flow Through Pinouts Operating Range: V CC = 4.75 V to 5.25 V with GND = 0 V No Internal Input Pulldown Resistors Pb Free Packages are Available SO D SUFFIX CASE 75 TSSOP DT SUFFIX CASE 94R MARKING DIAGRAMS* HLT22 ALYW HT22 ALYW KLT22 ALYW KT22 ALYW H = MC0 K = MC00 A = Assembly Location L = Wafer Lot Y = Year W = Work Week = Pb Free Package (Note: Microdot may be in either location) *For additional information, see Application Note AND002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Semiconductor Components Industries, LLC, 2006 Publication Order Number: MC0ELT22/D
Table. PIN DESCRIPTION Q0 V CC Pin Function Qn, Qn PECL Differential Outputs* Q0 2 7 D0 Dn V CC TTL Inputs Positive Supply PECL TTL GND Ground Q 3 6 D *Output state undetermined when inputs are open. Q 4 5 GND Figure. Logic Diagram and Pinout Assignment Table 2. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Value N/A N/A > 2 kv > 200 V Moisture Sensitivity, Indefinite Time Out of Drypack (Note ) Level Flammability Rating Oxygen Index: 2 to 34 UL 94 V 0 @ 0.25 in Transistor Count 5 Meets or exceeds JEDEC Spec EIA/JESD7 IC Latchup Test. For additional information, see Application Note AND003/D. 2
Table 3. MAXIMUM RATINGS Symbol Parameter Condition Condition 2 Rating Units V CC Positive Power Supply GND = 0 V 7 V V IN Input Voltage GND = 0 V GND + 0.025 V I V CC 0.025 V I out Output Current Continuous Surge T A Operating Temperature Range 40 to +5 C T stg Storage Temperature Range 65 to + C JA Thermal Resistance (Junction to Ambient) 0 lfpm 0 lfpm SOIC SOIC JC Thermal Resistance (Junction to Case) Standard Board SOIC 4 to 44 JA Thermal Resistance (Junction to Ambient) 0 lfpm 0 lfpm TSSOP TSSOP JC Thermal Resistance (Junction to Case) Standard Board TSSOP 4 to 44 ± 5% T sol Wave Solder <2 to 3 sec @ 24 C 265 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 00 90 30 5 40 ma ma Table 4. 0ELT SERIES PECL DC CHARACTERISTICS V CC = 5.0 V; GND = 0.0 V (Note 2) 40 C 25 C 5 C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I CC Power Supply Current 22 22 22 ma V OH Output HIGH Voltage (Note 3) 3920 400 40 4020 405 490 4090 45 420 mv V OL Output LOW Voltage (Note 3) 30 3200 33 30 320 3370 30 3227 3405 mv board with maintained transverse airflow greater than 0 lfpm. Electrical parameters are guaranteed only over the declared 2. Output parameters vary : with V CC. V CC can vary ± 0.25 V. 3. Outputs are terminated through a resistor to V CC 2.0 V. Table 5. 00ELT SERIES PECL DC CHARACTERISTICS V CC = 5.0 V; GND = 0.0 V (Note 4) Symbol Characteristic 40 C 25 C 5 C Min Typ Max Min Typ Max Min Typ Max I CC Power Supply Current 22 22 22 ma V OH Output HIGH Voltage (Note 5) 395 3995 420 3975 4045 420 3975 40 420 mv V OL Output LOW Voltage (Note 5) 370 3305 3445 390 3295 330 390 3295 330 mv board with maintained transverse airflow greater than 0 lfpm. Electrical parameters are guaranteed only over the declared 4. Output parameters vary : with V CC. V CC can vary ± 0.25 V. 5. Outputs are terminated through a resistor to V CC 2.0 V. Unit 3
Table 6. TTL INPUT DC CHARACTERISTICS V CC = 4.75 V to 5.25 V; T A = 40 C to 5 C Symbol Characteristic Condition Min Typ Max Unit I IH Input HIGH Current V IN = 2.7 V; V IN = (V CC 0.025) V 20 A I IHH Input HIGH Current V IN = 7.0 V 00 A I IL Input LOW Current V IN = 0.5 V; V IN = (GND + 0.025) V 0.6 ma V IK Input Clamp Diode Voltage I IN = ma.2 V V IH Input HIGH Voltage 2.0 V CC 0.025 V V V IL Input LOW Voltage GND + 0.025 V 0. V board with maintained transverse airflow greater than 0 lfpm. Electrical parameters are guaranteed only over the declared Table 7. AC CHARACTERISTICS V CC = 4.75 V to 5.25 V; GND= 0.0 V Symbol Characteristic 40 C 25 C 5 C Min Typ Max Min Typ Max Min Typ Max f MAX Maximum Input Frequency 0 MHz t PLH Propagation Delay (Note 6).5 V to % 0.6.2 0.9.2.5 0.6.35 ns Unit t PHL Propagation Delay (Note 6).5 V to % 0.4.0 0.5 0.. 0.7.30 ns t skew Within Device Skew (Note 7) Device to Device Skew (Note ) 300 00 600 300 00 600 3 00 7 ps t JITTER CLOCK Random Jitter (RMS) 0.5 ps t r /t f Output Rise/Fall Time (20 0%) 0.4.6 0.4.6 0.4.6 ns board with maintained transverse airflow greater than 0 lfpm. Electrical parameters are guaranteed only over the declared 6. Specifications for standard TTL input signal. 7. Skew is measured between outputs under identical transitions and conditions on any one device.. Device to Device Skew for identical transitions at identical V CC levels. 4
Driver Device Q Q Z o = Z o = D D Receiver Device V TT V TT = V CC 2.0 V Figure 2. Typical Termination for Output Driver and Device Evaluation (See Application Note AND020/D Termination of ECL Logic Devices.) ORDERING INFORMATION Device Package Shipping MC0ELT22D SO 9 Units / Rail MC0ELT22DG SO 9 Units / Rail MC0ELT22DR2 SO 20 Tape & Reel MC0ELT22DR2G SO 20 Tape & Reel MC0ELT22DT TSSOP 00 Units / Rail MC0ELT22DTG TSSOP 00 Units / Rail MC0ELT22DTR2 TSSOP 20 Tape & Reel MC0ELT22DTR2G TSSOP 20 Tape & Reel MC00ELT22D SO 9 Units / Rail MC00ELT22DG SO 9 Units / Rail MC00ELT22DR2 SO 20 Tape & Reel MC00ELT22DR2G SO 20 Tape & Reel MC00ELT22DT TSSOP 00 Units / Rail MC00ELT22DTG TSSOP 00 Units / Rail MC00ELT22DTR2 TSSOP 20 Tape & Reel MC00ELT22DTR2G TSSOP 20 Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD0/D. 5
PACKAGE DIMENSIONS SOIC NB CASE 75 07 ISSUE AH Y B X A 5 4 S 0.25 (0.00) M Y M K NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 92. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 75 0 THRU 75 06 ARE OBSOLETE. NEW STANDARD IS 75 07. Z H G D C 0.25 (0.00) M Z Y S X S SEATING PLANE 0.0 (0.004) N X 45 M J MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.0 5.00 0.9 0.97 B 3.0 4.00 0. 0.57 C.35.75 0.053 0.069 D 0.33 0.5 0.03 0.020 G.27 BSC 0.0 BSC H 0.0 0.25 0.004 0.00 J 0.9 0.25 0.007 0.00 K 0.40.27 0.06 0.0 M 0 0 N 0.25 0. 0.00 0.020 S 5.0 6.20 0.22 0.244 SOLDERING FOOTPRINT*.52 0.060 7.0 0.275 4.0 0.55 0.6 0.024.270 0.0 SCALE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 7