MT9V(SO) IG H MO ard Page escription Page lock iagram Pinout Sensor Power Supply VideoOut_lock_Reset xternal Interface Rev Who ate escription Rev 0.0 jwrede 0/0/0 ase Schematic for ustom esign Rev 0. aralex 0/0/0 Initial schematic - dded new symbol MT9V to schematic aralex 0//0 - Implemented review feedback from Sanjeev 0//0 - Updated block diagram and annotated for layout reference aralex 0/9/0 - dded Socket 0//0 Implemented Sesha review comments - deleted TP, TP and TP test points - changed RP and RP to.k Rev 0. aralex 0/09/0 changed ref des for layout reference (as per SX board) - made socket ref des as MP - swapped U and U - R and R is made 00 package Rev 0. aralex 0/0/0 changes as requested by layout - deleted RP-, RP9; dded R0-R - dded R9-R0 - swapped nets on RP- aralex 0//0 changes as requested by layout - deleted RP; dded R0-R0 - swapped all shorted jumpers as per convention aralex 0//0 dded R09, R0 for URT circuitry to isolate the URT traces and aid in length matching for the signals LS0 and LS aralex 0/9/0 Made P as NP as per Joe's feedback in sync note Rev 0. aralex 0//0 Updated P/N of RP and RP. No electrical change aralex 0/0/0 Renamed the folder and file to MT9V from MT9V. Made these text changes on the schematic pages,, and. hanged the ocument name also on the title block. No electrical change Rev 0. aralex 0//0 - Subsituted the symbol MT9V to schematic as part of change to MT9V. NO electrical change aralex 0//0 Updated header text for p and P. No electrical changes Script executed Size ocument Name Rev MT9V(SO)_IG_H_MO_ard 0. ate: Wednesday, July, 0 Sheet of
lock iagram -Pin emo onnector VIO_SNS +V_H +V_VIO_H +V_V_H +V_H MO_LK +VIO_LS +VIO_LS +.V emo onnector H_MLK +.V OS (MHz) LKGN +VIO_LS XTL XTL (MHz) S_LK XTL +V +V_PLL +V_ +VIO +V +V-PIX S_OUT_LS[:0] URT Interface S_OUT [/ 0 bit] emo onnector MO_RST_L +VIO_LS +.V S_RST_L SO MT9V_iG PIXLK MR RST (0ms) SR Header S_SR LPF Video Out Phono SP_FSYN F_SYN H_I +VIO_LS H_I I Header SPI PROM kbit 0x (default) SPI Flash +VIO_LS lock iagram Script executed Size ocument Name Rev MT9V(SO)_IG_H_MO_ard 0. ate: Friday, June, 0 Sheet of
MT9V_SNSOR(SO) Pinout Size ocument Name Rev MT9V(SO)_IG_H_MO_ard 0. Friday, June, 0 ate: Sheet of
FLSH PROGRMMING ONNTOR +VIO_LS P SPI_S_N SPI_SLK SPI_SO, MO_RST_L SPI_SI MT9V_SNSOR +V_V-PIX +V_V +V_VPLL +V_VIO,, +VIO_LS +V_V +V_V,, GN +V_V-PIX +V_V +V_VPLL +V_VIO +VIO_LS +V_V +V_V HR-x-P SPI FLSH P HR-x-P SPI_S_N SPI_SLK SPI_SO ONFIGURTION HR SO SPI_SI I HR P HR-x-P U TF0 S V SK SI SO WP HOL GN P Open: uto configured Mode -: Flash mode (default) -: Host Mode S_S S_SL S_RST_L Open for xternal connection +VIO_LS SO uf U S_RST_L RST_N S_LK LK_IN XTL XTL G S_SL H SLK S_S ST SR H SR TST F TST G TST TST SPI_SI G SPI_SI OVRLY_IN_LK IN_LK OVRLY_IN0 IN0 OVRLY_IN IN OVRLY_IN F IN OVRLY_IN G IN OVRLY_IN F IN OVRLY_IN G IN OVRLY_IN H IN OVRLY_IN IN TRST_N F F TRST_N TK F TK TMS TMS TI TI OUT0 OUT OUT OUT OUT OUT OUT OUT OUT_LS0 OUT_LS PIXLK FRM_SYN _POS _NG _RF TO SPI_SLK SPI_S_N SPI_SO H G H T0 T T T T T T U T +V_V G OUT_LS0 +V_V-PIX G V GN OUT_LS V GN F GN F VPIX GN PIXLK VPIX +V_V GN_ R 0 FRM_SYN V V GN +V_VIO V GN GN _NG _POS VIO R9.K +V_VPLL VIO VIO +V_V VPLL TO V SPI_SLK SPI_S_N SPI_SO MT9V_MO_G H H H TRMINTION RSISTORS RP T S_T S_T[:0] T S_T T S_T T0 S_T0 RP T S_T T S_T T S_T T S_T OUT_LS0 R OUT_LS R S_OUT_LS0 S_OUT_LS PIXLK R0 S_PIXLK R0 S_ R0 S_ TST POINTS S_PIXLK TP PIXLK MT9V_MO_G S_T0 TP S_T0 P -: losed (default) +VIO_LS S_T TP S_T -:lose -> Normal (default) Open-> Horizontal Flip -:lose: Normal (default) Open -> Pedestal R9 R00 R0 R0 00K 00K 00K 00K FRM_SYN S_OUT_LS0 P HR-x-P R99.K R0.K R0.K R0.K -: lose - > NTS(default) Open -> PL SOKT TST P TST TST MTG MP MTG HR-x-P losed for normal operation(default) LNS HOLR SOKT WITH LI MTG MTG SR P9 +VIO_LS R 0K SR SKT-0-09_iG HR-x-P Jumper -: 0x90 (default) Jumper -: 0x +V_V PS +V_V +V_VPLL +VIO_LS TRST_N P0 TRST_N R 0K 0uF uf 00nF 00nF 9 00nF 0 0nF 0nF 0nF 0uF 00nF 0nF 0nF 00nF 0uF HR-x-P +V_V-PIX +V_V +V_VIO lose: Normal Operation (default) Open: Test Mode 0uF 9 0nF 0 00nF 00nF 0nF 0uF 00nF 00nF 0nF 0nF 9 0uF 90 00nF 9 00nF 9 00nF 9 0nF 9 0nF 9 0nF Sensor Size ocument Name Rev MT9V(SO)_IG_H_MO_ard 0. Wednesday, July, 0 ate: Sheet of
SNSOR POWR SUPPLY +V_V-PIX +V_V +V_VPLL +V_VIO,, +VIO_LS, +V +V_V +V_V,, GN +V_V-PIX +V_V +V_VPLL +V_VIO +VIO_LS +V +V_V +V_V.V V-PIX Power supply +V_V_H +V_V-PIX PRIPHRL NP JMPR-PIN_SHORT 9 JP 0uF.V V Power supply Peripheral V Power Supply +V0_H +V0 Layout: Mount L on bottom side of P +V0 +V_V_H +V_V NP JP 9 0uF R 0 NP JP 9 0uF JMPR-PIN_SHORT On L for US Supply GRN JMPR-PIN_SHORT Peripheral.V Supply +V_H +V V_PLL Power Supply +V_VIO_H +V_VPLL L. NP JP JMPR-PIN_SHORT 99 0uF NP JP 00 0uF JMPR-PIN_SHORT VIO & VIO_LS.VSupply V- Power Supply +V_VIO_H +V_VIO_H +V_V +V_VIO JMPR-PIN_SHORT JMPR-PIN_SHORT +VIO_LS JP NP NP JP NP JP 0 0uF 0 0uF 0 0uF JMPR-PIN_SHORT V Power Supply +V_H +V_V NP JP9 0 0uF JMPR-PIN_SHORT Tripod Mount Fiducials Mounting Holes Ground Testpoints NP MP MH MH F F F TP TP TRI-PO PTR 00RP 00RP MTG MTG FIUIL FIUIL FIUIL TRIPO-PTR F F F MH MH FIUIL FIUIL FIUIL 00RP 00RP Power Supply Size ocument Name Rev 0. MT9V(SO)_IG_H_MO_ard Friday, June, 0 ate: Sheet of
VideoOut_lock_Reset,, +VIO_LS, +V +VIO_LS +V,, GN VIO OUT _POS L.0uH LOW PSS FILTR L.uH L.0uH J ON-JK-YL-R-J L.0uH 0pF L.uH 0pF L.0uH _NG NP NP NP R9 9 R R0 0 R 0 R 0 NP R 0 O NOT POPULT L, L, L, R FOR SINGL N LOK IRUIT 00nF +V Layout:- Silkscreen the clock frequency V N/IS Y OUT GN P0 -: Oscillator clk(default) P0 HR-x-P R LKGN LK_OUT +VIO_LS 00nF U V N Y GN R MLK_OUT XTL P -: Oscillator clk(default) -: rystal lk P MHz SNG HR-x-P +VIO_LS pf S_LK MO_MLK MO_F_LK TP9 MO_FLK R 0 00nF U9 V Y GN N SNG GN GN Y MHz 9 pf P Open: Oscillator clk(default) lose: rystal lk P HR-x-P XTL Layout: - Place P jumper header to be as close as possible to the MT9V sensor, less than 00mil RST IRUIT +VIO_LS, MO_RST_L R +V 0K 00nF 0 00nF SW P-SPST MR_SW_L U T V RST MR GN (0ms) PWRST U0 SNUPG0 V Y GN TP0 S_RST_N S_RST_L VideoOut_lock_Reset Size ocument Name Rev MT9V(SO)_IG_H_MO_ard 0. Friday, June, 0 ate: Sheet of
xternal Interface,, +VIO_LS, +V,, GN +VIO_LS +V S_T[:0] MO INTRF J URT INTRF IRUIT P0 Open - URT Shutdown(Tri-State) [efault] losed - URT ctive +VIO_LS Note: U and associated passives are to interface to the internal debug URT and are disabled by defalut +V MO_F_LK 9 0 NP uf +VIO_LS 9 NP URT onnector +VIO_LS R 0 +VIO_H 00nF S_OUT_LS0, NP P NP, S_OUT_LS 9 0 S_T0 SWITH_NO L 0uH S_T S_T V S_T S_T URT_RX RX S_T S_T P NP URT_TX TX S_T FRM_SYN +V_V_H HR-x-P GN 9 0 0nF S_ +V_H NP U NP +V0_H, MO_RST_L HR-x-P (TSW) P V S_ S_PIXLK NP SW uf, S_S NP 9 V SWITHR_V 9 0 +V_H +V_VIO_H R 0K SWITHR_PS MO 0 NP PS VL NP, S_SL MO_MLK URT_RX R 0 URT_RIN URT_ROUT R0 0 RIN ROUT S_OUT_LS0, NP 9 0, S_OUT_LS R09 0 URT_TIN URT_TOUT R 0 URT_TX NP TIN TOUT GN GN US V/P +VIO_LS MTG ON-x-J (QFS) NP uf LT0 NP R.K NP R.K 00nF +V_H +V_V_H +V_H +V_VIO_H TP S_SL TP S_S 0uF 00nF 0uF 00nF 0uF 00nF 9 0uF 0 00nF LNS ORRTION PROM Note: -/SN Serial PROM has speed limitation wrt voltage used. t.v, only 00KHz operation of I is allowed and above.v we can use 00KHz. +VIO_LS +VIO_LS P (default) - : Short => Ground/Low () - : Open => Pull-up/High () R0 R9 0K 0K U OVRLY IRUIT V SL S_SL, 00nF S_S, 0uF S 0 R 0 0 VSS WP P F-I/SN OVRLY ONNTOR P HR-x-0-P (MTLW) NP 9 0 OVRLY_IN0 OVRLY_IN OVRLY_IN OVRLY_IN OVRLY_IN OVRLY_IN OVRLY_IN OVRLY_IN OVRLY_IN_LK +V +VIO_LS R0 R R R 00K 00K 00K 00K OVRLY_IN0 OVRLY_IN OVRLY_IN OVRLY_IN SW OFF ON SLI-SPST RP.K PPROM ddress Switch Settings: = HIGH, = LOW, 0 = LOW; ddress => 0x (default) = HIGH, = HIGH, 0 = LOW; ddress => 0x = LOW, = HIGH, 0 = LOW; ddress => 0x = LOW, = LOW, 0 = LOW; ddress => 0x0 JTG IRUIT FOR INTRNL US ONLY +VIO_LS SW OFF ON +VIO_LS R 00K OVRLY_IN P9 RP R9 R 00K OVRLY_IN.K R 00K OVRLY_IN TI TMS 9 0 OVRLY_IN_LK R9 00K OVRLY_IN TK RTK.K TO MO_RST_L SLI-SPST 9 0 (JTG Probe) HR-x-P TK NP R0 0 RTK HR0-x0-P NP xternal Interface Size ocument Name Rev 0. MT9V(SO)_IG_H_MO_ard Friday, June, 0 ate: Sheet of