On the Growth of the Prime Numbers Based Encoded Vector Clock

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On the Growth of the Prime Numbers Based Encoded Vector Clock Ajay D. Kshemkalyani Bhargav Voleti University of Illinois at Chicago ajay@uic.edu Kshemkalyani, Voleti (UIC) Encoded Vector Clock 1 / 22

Overview 1 Introduction 2 Encoded Vector Clock (EVC) Operations on the EVC 3 Simulations Number of Events until EVC size exceeds 32n Size of EVC as a function of Number of Events Number of Events until Overflow 32n bits (function of Event Types) 4 Scalability of EVCs 5 Case Study 6 Discussion and Conclusions Kshemkalyani, Voleti (UIC) Encoded Vector Clock 2 / 22

Introduction Scalar clocks: e f C(e) < C(f ) Vector clocks: e f V (e) < V (f ) Fundamental tool to characterize causality To capture the partial order (E, ), size of vector clock is the dimension of the partial order, bounded by the size of the system, n Not scalable! encoding of vector clocks (EVC) using prime numbers to use a single number to represent vector time big integer EVC grows fast, eventually exceeds size of vector clock Contribution Evaluate and analyze the growth rate of EVC using simulations Kshemkalyani, Voleti (UIC) Encoded Vector Clock 3 / 22

Vector Clock Operation at a Process P i 1 Initialize V to the 0-vector. 2 Before an internal event happens at process P i, V [i] = V [i] + 1 (local tick). 3 Before process P i sends a message, it first executes V [i] = V [i] + 1 (local tick), then it sends the message piggybacked with V. 4 When process P i receives a message piggybacked with timestamp U, it executes k [1... n], V [k] = max(v [k], U[k]) (merge); V [i] = V [i] + 1 (local tick) before delivering the message. Kshemkalyani, Voleti (UIC) Encoded Vector Clock 4 / 22

Encoded Vector Clock (EVC) and Operations A vector clock V = v 1, v 2,, v n can be encoded by n distinct prime numbers, p 1, p 2,, p n as: Enc(V ) = p v1 1 pv2 2 pvn n EVC operations: Tick, Merge, Compare Tick at P i : Enc(V ) = Enc(V ) p i Kshemkalyani, Voleti (UIC) Encoded Vector Clock 5 / 22

EVC Operations (contd.) Merge: For V 1 = v 1, v 2,, v n and V 2 = v 1, v 2,, v n, merging yields: U = u 1, u 2,, u n, where u i = max(v i, v i ) The encodings of V 1, V 2, and U are: However, Enc(V 1 ) = p v1 1 pv2 2 pvn n Enc(V 2 ) = p v 1 Enc(U) = 1 pv 2 n i=1 Enc(U) = LCM(Enc(V 1 ), Enc(V 2 )) = 2 pv n n p max(v i,v i ) i Enc(V 1 ) Enc(V 2 ) GCD(Enc(V 1 ), Enc(V 2 )) Kshemkalyani, Voleti (UIC) Encoded Vector Clock 6 / 22

EVC Operations (contd.) Compare: Thus, to manipulate the EVC, i) Enc(V 1 ) Enc(V 2 ) if Enc(V 1 ) < Enc(V 2 ) and Enc(V 2 ) mod Enc(V 1 ) = 0 ii) Enc(V 1 ) Enc(V 2 ) if Enc(V 1 ) Enc(V 2 ) and Enc(V 2 ) Enc(V 1 ) Each process needs to know only its own prime Merging EVCs requires computing LCM Use Euclid s algorithm for GCD, which does not require factorization Kshemkalyani, Voleti (UIC) Encoded Vector Clock 7 / 22

Correspondence of Operations Table: Correspondence between vector clocks and EVC. Operation Vector Clock Encoded Vector Clock Representing clock V = v 1, v 2,, v n Enc(V ) = p v 1 p v 2 p vn n Local Tick V [i] = V [i] + 1 1 2 Enc(V ) = Enc(V ) p i (at process P i ) Merge Merge V 1 and V 2 yields V Merge Enc(V 1) and Enc(V 2) yields where V [j] = max(v 1[j], V 2[j]) Enc(V ) = LCM(Enc(V 1), Enc(V 2)) Compare V 1 < V 2: Enc(V 1) Enc(V 2): j [1, n], V 1[j] V 2[j], Enc(V 1) < Enc(V 2), and j, V 1[j] < V 2[j] and Enc(V 2) mod Enc(V 1) = 0 Kshemkalyani, Voleti (UIC) Encoded Vector Clock 8 / 22

Operation of the Encoded Vector Clock 1 Initialize t i = 1. 2 Before an internal event happens at process P i, t i = t i p i (local tick). 3 Before process P i sends a message, it first executes t i = t i p i (local tick), then it sends the message piggybacked with t i. 4 When process P i receives a message piggybacked with timestamp s, it executes t i = LCM(s, t i ) (merge); t i = t i p i (local tick) before delivering the message. Figure: Operation of EVC t i at process P i. Kshemkalyani, Voleti (UIC) Encoded Vector Clock 9 / 22

Illustration of Using EVC P 1 2 [1,0,0] [2,0,1] [3,0,1] 2 20 40 P 2 3 [0,1,0] 3 [1,2,0] [1,3,0] 18 54 [3,4,1] 3240 P 3 5 prime number [0,0,1] [1,3,2] 5 1350 Figure: The vector timestamps and EVC timestamps are shown above and below each timeline, respectively. In real scenarios, only the EVC is stored and transmitted. Kshemkalyani, Voleti (UIC) Encoded Vector Clock 10 / 22

Simulation Assumptions Simulated distributed executions with a random communication pattern pr s : probability of a send (versus internal) event Used first n primes for the n processes Overflow process: that process which is earliest to have its EVC size exceed 32n bits Kshemkalyani, Voleti (UIC) Encoded Vector Clock 11 / 22

Number of Events until EVC Size exceeds 32n bits Figure: Average of 10 runs. pr s= 0.6. Typically, 21-25 events/process before EVC size exceeded 32n Kshemkalyani, Voleti (UIC) Encoded Vector Clock 12 / 22

Strawman Analysis pr s = 0.6 implies every third event is a receive event. Consider n = 60. 60 lowest prime numbers needs 8 bit representation. At each event, EVC size increases by 8 bits (local tick) At a receive event, (every 3rd event), size of EVC doubles due to LCM Worst-case progression of size of EVC in bits approx. as: 8, 16, 32 and 40 (event ei 3 ), 48, 56, 112 and 120 (event ei 6 ), 128, 136, 272 and 280 (event ei 9 ), 288, 296, 592 and 600 (event ei 12 ), 608, 616, 1232 and 1240 (event ei 15 ), 1248, 1256, 2512 and 2520 (event ei 18 ) At the 18th event at P i, the EVC size exceeds 60 32 = 1920 bits As per simulation, overflow happens at the 1250/60th event, or the 21st event, at the overflow process Kshemkalyani, Voleti (UIC) Encoded Vector Clock 13 / 22

About 900 events until EVC size reached 960 (= 30 32) bits at overflow process Kshemkalyani, Voleti (UIC) Encoded Vector Clock 14 / 22 Size of EVC as a Function of Number of Events Figure: pr s= 0.5.

About 1800 events until EVC size reached 1920 (= 60 32) bits at overflow process Kshemkalyani, Voleti (UIC) Encoded Vector Clock 15 / 22 Size of EVC as a Function of Number of Events Figure: pr s= 0.5.

About 3000 events until EVC size reached 3200 (= 100 32) bits at overflow process Kshemkalyani, Voleti (UIC) Encoded Vector Clock 16 / 22 Size of EVC as a Function of Number of Events Figure: pr s= 0.5.

Number of Events until Overflow 32n bits (function of Event Types) Number of events until EVC size is 32n bits 10000 8000 6000 4000 2000 0 n = 10 n = 40 n = 60 n = 80 10 20 30 40 50 60 70 80 90 The percentage of internal events Figure: Varied percentage of internal events (out of internal, send, and receive events) Receive events cause EVC to grow very fast due to LCM Kshemkalyani, Voleti (UIC) Encoded Vector Clock 17 / 22

Strawman Analysis Consider n = 60, and prob(int. event) = 0.9, prob(receive event) = 0.05 For n = 60, 60 lowest prime numbers needs 8 bit representation. At each event, EVC size increases by 8 bits (local tick) At a receive event, (every 20th event), size of EVC doubles due to LCM Worst-case progression of size of EVC in bits approx. as: 8, 152, 304 and 312 (event e 20 i ), 320, 464, 928 and 936 (event e 40 i ), 944, 1088, 2176 and 2184 (event e 60 i ) At the 60th event at P i, or 3600th event in execution, the EVC size exceeds 60 32 = 1920 bits As per simulation, overflow happens at the 6000th event. Apply correction: In the initial window before steady state, more than 20 non-receive events per receive event Kshemkalyani, Voleti (UIC) Encoded Vector Clock 18 / 22

Scalability of EVCs EVC timestamps grow very fast. To alleviate this problem: 1 Tick only at relevant events, e.g., when the variables alter the truth value of a predicate On social platforms, e.g., Twitter and Facebook, max length of any chain of messages is usually small 2 Application requiring a vector clock is confined to a subset of processes 3 Reset the EVC at a strongly consistent (i.e., transitless) global state 4 Use logarithms to store and transmit EVCs Local tick: single addition Merge and Compare: Take anti-logs and then logs, complexity is subsumed by that of GCD computation extra space is only scratch space Kshemkalyani, Voleti (UIC) Encoded Vector Clock 19 / 22

Case Study Detecting memory consistency errors in MPI one-sided applications using EVC in the MC-CChecker tool Relevant events were the synchronization events; only these were timestamped Each concurrent region in the code was a unit of computation; boundary between two concurrent regions corresponded to a global transitless state MC-CChecker safely reset EVCs at the start of each concurrent region Execution time and memory usage using EVC in MC-CChecker were much lower than using traditional vector clocks Kshemkalyani, Voleti (UIC) Encoded Vector Clock 20 / 22

Conclusions Studied the encoding of vector clocks using prime numbers, to use a single number to represent vector time Simulations show that the single integer EVCs grow fast Analyzed the growth rate Receive events cause EVCs to grow much faster due to LCM Proposed several solutions to deal with this problem Tick at relevant events; detection regions; reset EVC at transitless global state; use logs of EVCs Case study: Detecting memory consistency errors in MPI one-sided applications Using EVCs far more memory- and time-efficient than using traditional vector clocks Kshemkalyani, Voleti (UIC) Encoded Vector Clock 21 / 22

Thank You! Kshemkalyani, Voleti (UIC) Encoded Vector Clock 22 / 22