Lecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University

Similar documents
Gate-Level Minimization

Lecture 4: More Boolean Algebra

Lecture 5: NAND, NOR and XOR Gates, Simplification of Algebraic Expressions

Lecture 6: Manipulation of Algebraic Functions, Boolean Algebra, Karnaugh Maps

UNIT 5 KARNAUGH MAPS Spring 2011

Unit 2 Session - 6 Combinational Logic Circuits

Karnaugh Maps Objectives

E&CE 223 Digital Circuits & Systems. Lecture Transparencies (Boolean Algebra & Logic Gates) M. Sachdev

ELC224C. Karnaugh Maps

Chapter 2 Combinational Logic Circuits

E&CE 223 Digital Circuits & Systems. Lecture Transparencies (Boolean Algebra & Logic Gates) M. Sachdev. Section 2: Boolean Algebra & Logic Gates

The Karnaugh Map COE 202. Digital Logic Design. Dr. Muhamed Mudawar King Fahd University of Petroleum and Minerals

Lecture 7: Karnaugh Map, Don t Cares

Karnaugh Map & Boolean Expression Simplification

Lecture 5. Karnaugh-Map

This form sometimes used in logic circuit, example:

CHAPTER III BOOLEAN ALGEBRA

Digital Logic Design. Combinational Logic

CS/EE 181a 2010/11 Lecture 4

Optimizations and Tradeoffs. Combinational Logic Optimization

ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN. Week 2 Dr. Srinivas Shakkottai Dept. of Electrical and Computer Engineering

CHAPTER III BOOLEAN ALGEBRA

II. COMBINATIONAL LOGIC DESIGN. - algebra defined on a set of 2 elements, {0, 1}, with binary operators multiply (AND), add (OR), and invert (NOT):

Chapter 4 Optimized Implementation of Logic Functions

ENG2410 Digital Design Combinational Logic Circuits

UNIT 4 MINTERM AND MAXTERM EXPANSIONS

Signals and Systems Digital Logic System

Why digital? Overview. Number Systems. Binary to Decimal conversion

EE 110 Practice Problems for Exam 1: Solutions, Fall 2008

Z = F(X) Combinational circuit. A combinational circuit can be specified either by a truth table. Truth Table

Simplifying Logic Circuits with Karnaugh Maps

Binary logic consists of binary variables and logical operations. The variables are

Textbook: Digital Design, 3 rd. Edition M. Morris Mano

Lecture 2 Review on Digital Logic (Part 1)

Combinational Logic Fundamentals

MC9211 Computer Organization

DIGITAL ELECTRONICS & it0203 Semester 3

Review for Test 1 : Ch1 5

Simplification of Boolean Functions. Dept. of CSE, IEM, Kolkata

Boolean Algebra and Logic Simplification

LOGIC GATES. Basic Experiment and Design of Electronics. Ho Kyung Kim, Ph.D.

Number System conversions

Chapter-2 BOOLEAN ALGEBRA

Principles of Computer Architecture. Appendix B: Reduction of Digital Logic. Chapter Contents

Minimization techniques

EECS150 - Digital Design Lecture 19 - Combinational Logic Circuits : A Deep Dive

211: Computer Architecture Summer 2016

CHAPTER 2 BOOLEAN ALGEBRA

Week-I. Combinational Logic & Circuits

Review. EECS Components and Design Techniques for Digital Systems. Lec 06 Minimizing Boolean Logic 9/ Review: Canonical Forms

Logic Simplification. Boolean Simplification Example. Applying Boolean Identities F = A B C + A B C + A BC + ABC. Karnaugh Maps 2/10/2009 COMP370 1

CHAPTER 5 KARNAUGH MAPS

Chap 2. Combinational Logic Circuits

Karnaugh Maps (K-Maps)

EEE130 Digital Electronics I Lecture #4

Digital Circuit And Logic Design I. Lecture 4

CS/EE 181a 2008/09 Lecture 4

Digital Logic Design ENEE x. Lecture 12

Chapter 2 Combinational Logic Circuits

Introduction to Digital Logic Missouri S&T University CPE 2210 Karnaugh Maps

Spiral 1 / Unit 5. Karnaugh Maps

Chapter 7 Logic Circuits

Outcomes. Spiral 1 / Unit 5. Logic Function Synthesis KARNAUGH MAPS. Karnaugh Maps

Systems I: Computer Organization and Architecture

Standard Expression Forms

14:332:231 DIGITAL LOGIC DESIGN

Outcomes. Spiral 1 / Unit 5. Logic Function Synthesis KARNAUGH MAPS. Karnaugh Maps

Chapter 2: Princess Sumaya Univ. Computer Engineering Dept.

L4: Karnaugh diagrams, two-, and multi-level minimization. Elena Dubrova KTH / ICT / ES

Chapter 4: Combinational Logic Solutions to Problems: [1, 5, 9, 12, 19, 23, 30, 33]

Combinatorial Logic Design Principles

CS 121 Digital Logic Design. Chapter 2. Teacher Assistant. Hanin Abdulrahman

Logic Design I (17.341) Fall Lecture Outline

Midterm1 Review. Jan 24 Armita

Chapter 2 : Boolean Algebra and Logic Gates

ELCT201: DIGITAL LOGIC DESIGN

CMSC 313 Lecture 19 Combinational Logic Components Programmable Logic Arrays Karnaugh Maps

Contents. Chapter 3 Combinational Circuits Page 1 of 36

CHAPTER1: Digital Logic Circuits Combination Circuits

Unit 2 Boolean Algebra

Lecture 3: Boolean Algebra

Introduction to Karnaugh Maps

Chapter 2 Combinational Logic Circuits

Unit 2 Boolean Algebra

Chapter 3. Boolean Algebra. (continued)

Computer Organization I. Lecture 13: Design of Combinational Logic Circuits

CSCI 220: Computer Architecture-I Instructor: Pranava K. Jha. BCD Codes

Combinational Logic Circuits Part II -Theoretical Foundations

Unit 6. Quine-McClusky Method. Unit 6 1

Chapter 2 Combinational Logic Circuits

CMSC 313 Lecture 19 Homework 4 Questions Combinational Logic Components Programmable Logic Arrays Introduction to Circuit Simplification

1. Name the person who developed Boolean algebra

CprE 281: Digital Logic

Digital Circuit And Logic Design I. Lecture 3

Midterm Examination # 1 Wednesday, February 25, Duration of examination: 75 minutes

Combinational Digital Design. Laboratory Manual. Experiment #6. Simplification using Karnaugh Map

Functions. Computers take inputs and produce outputs, just like functions in math! Mathematical functions can be expressed in two ways:

UNIVERSITI TENAGA NASIONAL. College of Information Technology

9.1. Unit 9. Implementing Combinational Functions with Karnaugh Maps or Memories

ECE 238L Boolean Algebra - Part I

Transcription:

Lecture 6: Gate Level Minimization Syed M. Mahmud, Ph.D ECE Department Wayne State University Original Source: Aby K George, ECE Department, Wayne State University

Contents The Map method Two variable K-Map Three variable K-Map Four-variable K-Map Prime implicants Essential prime implicants Product-of-sums simplification Don t-care conditions Chapter 3 ECE 2610 Digital Logic 1 2

Introduction Logic synthesis: Minimization of logic function with available gates. Manual methods for the design of simple circuits. Gate-level minimization with manual methods (using theorems and postulates) is difficult when function is complex. Computer-based logic synthesis tools for minimization of complex functions. Chapter 3 ECE 2610 Digital Logic 1 3

The Map method or K-Map method Karnaugh Map or K-Map Pictorial form of a truth table. K-map Made up of squares Each square represents on minterm in the truth table The simplified expression Sum of product form (SOP) Product of sum (POS) Gives simplest algebraic expression. In some cases, more than one simplest expressions are possible. Chapter 3 ECE 2610 Digital Logic 1 4

Two-variable K-Map 2 variables => 2 2 = 4 min terms Ex: Simplify the following truth table x y F 0 0 0 0 1 0 1 0 0 1 1 1 F = m 3 F = x. y Chapter 3 ECE 2610 Digital Logic 1 5

Two-variable K-Map Simplify the following truth table using K-Map x y F 0 0 0 0 1 1 1 0 1 1 1 1 F = m 1 + m 2 + m 3 = x y + xy + xy F = x + y Chapter 3 ECE 2610 Digital Logic 1 6

Three-variable K-Map 3 variables => 2 3 = 8 minterms. Sequence arranged in Gray code Only one bit change in value between two adjacent squares Chapter 3 ECE 2610 Digital Logic 1 7

Three-variable K-Map Simplify the following truth table using K-Map x y z F 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 F x x y yz 00 01 11 10 0 m 0 m 1 m 3 m 2 m 4 m 5 m 7 1 1 1 m 6 1 0 1 1 1 1 0 0 1 1 1 1 z F = xz Chapter 3 ECE 2610 Digital Logic 1 8

Three-variable K-Map Simplify using K-Map F = Σ 2,3,4,5 F = Σ 3,4,6,7 F x yz y 00 01 11 10 F x yz y 00 01 11 10 m 0 m 1 m 3 m 2 0 1 1 m 0 m 1 m 3 m 2 0 1 x m 4 m 5 1 1 1 m 7 m 6 x m 4 m 5 m 7 m 6 1 1 1 1 z F = xy + x y z F = yz + xz Chapter 3 ECE 2610 Digital Logic 1 9

Three-variable K-Map Simplify using K-Map F = Σ 0,2,4,5,6 F = Σ 1,2,3,5,7 F x x y yz 00 01 11 10 m 0 m 1 m 3 m 2 0 1 1 m 4 m 5 m 7 m 6 1 1 1 1 F x x y yz 00 01 11 10 m 0 m 1 m 3 m 2 0 1 1 1 m 4 m 5 m 7 1 1 1 m 6 F = xy + z z z F = x y + z Chapter 3 ECE 2610 Digital Logic 1 10

K-Map Simplification Three variable K-Map Number of squares combined in K-Map Minimized literals One square Three literals Two adjacent squares combined Two literals Four adjacent squares combined One literal Eight adjacent squares combined Zero literals (Always answer is 1) Four variable K-Map Number of squares combined in K-Map Minimized literals One square Four literals Two adjacent squares combined Three literals Four adjacent squares combined Two literal Eight adjacent squares combined One literal Sixteen adjacent squares combined Zero literals (Always answer is 1) Chapter 3 ECE 2610 Digital Logic 1 11

Four-Variable K-Map No. of minterms = 2 4 = 16 Chapter 3 ECE 2610 Digital Logic 1 12

Four-variable K-Map Simplify the Boolean function F w, x, y, z = Σ(0,1,2,4,5,6,8,9,12,13,14) F y yz wx 00 01 11 10 w m 0 m 1 m 3 m 2 00 1 1 1 m 4 m 5 01 1 1 1 11 1 1 1 10 1 1 m 7 m 12 m 13 m 15 m 8 m 9 m 6 m 14 x m 11 m 10 F = y + xz + w z z Chapter 3 ECE 2610 Digital Logic 1 13

Four-variable K-Map Simplify the Boolean function F A, B, C, D = A B C + B CD + A BCD + AB C F A AB CD 00 01 11 10 00 1 1 1 01 1 11 C m 0 m 1 m 3 m 2 m 4 m 5 m 7 m 12 m 13 m 15 m 8 m 9 m 6 m 14 B m 11 m 10 10 1 1 1 A B C = A B C D + D = A B C D + A B C D = m 1 + m 0 B CD = B CD A + A = AB CD + A B CD = m 10 + m 2 A BCD = m 6 AB C = AB C D + D = AB C D + AB C D = m 9 + m 8 D F = m 0 + m 1 + m 2 + m 6 + m 8 + m 9 + m 10 F = B D + B C + A CD Chapter 3 ECE 2610 Digital Logic 1 14

Prime Implicants While choosing adjacent squares: All minterms covered The number of terms in the expression is minimized There are no redundant terms A prime implicant is a product term obtained by combining the maximum possible number of adjacent squares in the Map. A prime implicant is essential if: It cannot be removed from a description of the function. It is the only prime implicant that covers the minterm. Chapter 3 ECE 2610 Digital Logic 1 15

Prime implicants F = Σ(0,2,3,5,7,8,9,10,11,13,15) F A AB C CD 00 01 11 10 m 0 m 1 m 3 m 2 00 1 1 1 m 4 m 5 m 7 01 1 1 m 12 m 13 m 15 11 1 1 m 8 m 9 10 1 1 1 1 D m 6 m 14 B m 11 m 10 Only one way to include m 0 and m 5 Essential Prime implicants: BD, B D Prime implicants: CD, B C, AD, AB F = BD + B D + CD + AD = BD + B D + CD + AB = BD + B D + B C + AD = BD + B D + B C + AB Chapter 3 ECE 2610 Digital Logic 1 16

Product of sums simplification Take max terms for simplification Simplify F = Σ(0,1,2,5,8,9,10) into product of sum form F A AB C CD 00 01 11 10 m 0 m 1 m 3 m 2 00 1 1 0 1 m 4 m 5 m 7 m 6 01 0 1 0 0 m 12 m 13 m 15 11 0 0 0 0 m 8 m 9 m 14 B m 11 m 10 10 1 1 0 1 F = AB + CD + BD Apply DeMorgan s theorem to get F F = (A + B )(C + D )(B + D) D Chapter 3 ECE 2610 Digital Logic 1 17

Product of sums simplification Simplify F = Π(0,2,5,7) into product of sum form F = Π 0,2,5,7 = Σ(1,3,4,6) F x x y yz 00 01 11 10 m 0 m 1 m 3 m 2 0 0 1 1 0 m 4 m 5 m 7 m 6 1 1 0 0 1 F = x z + xz F = (x + z)(x + z ) z Chapter 3 ECE 2610 Digital Logic 1 18

Don t-care conditions Don t-care (X) minterm is a combination of variables whose logical value is not specific. Example: 4-bit binary code for decimal numbers 0000 to 1001 Valid 1010 to 1111 Invalid The don t-care condition can be used on a map to provide further simplification of Boolean expression. Chapter 3 ECE 2610 Digital Logic 1 19

Don t-care condition Simplify the Boolean function F(w, x, y, z) = Σ(1,3,7,11,15) which has a don t-care condition d(w, x, y, z) = Σ(0,2,5) F w wx y yz 00 01 11 10 m 0 m 1 m 3 m 2 00 X 1 1 X m 4 m 5 m 7 01 X 1 m 12 m 13 m 15 11 1 m 8 m 9 10 1 m 6 m 14 x m 11 m 10 F = yz + w z z Chapter 3 ECE 2610 Digital Logic 1 20

Don t-care condition Simplify the Boolean function F(w, x, y, z) = Σ(1,3,7,11,15) which has a don t-care condition d(w, x, y, z) = Σ(0,2,5) using product of sum simplificiton F w wx yz y 00 01 11 10 m 0 m 1 m 3 m 2 00 X 1 1 X m 4 m 5 m 7 m 6 01 0 X 1 0 m 12 m 13 m 15 11 0 0 1 0 m 8 m 9 m 14 x m 11 m 10 10 0 0 1 0 F = z + wy F = z(w + y) z Chapter 3 ECE 2610 Digital Logic 1 21

Other minimization methods Algebraic methods Simplify using Algebraic theorems. Quine McClusky Method Tabular method Can work for any number of variables Scheinman Method Column-wise writing of minterms as decimal numbers and their simplification Can work for any number of variables Chapter 3 ECE 2610 Digital Logic 1 22

Summary Simplify a Karnaugh Map for Boolean functions of 2, 3, and 4 variables Find prime implicants of a Boolean function How to obtain the sum-of-product terms and product-of-sum forms of a Boolean function directly from K-Map How to use don t-care conditions to simplify a K-Map Chapter 3 ECE 2610 Digital Logic 1 23

Homework 3 Part a Simplify Boolean functions 3.2 3.3 3.7 3.10 3.11 3.12 3.15 Chapter 3 ECE 2610 Digital Logic 1 24