6.012 Electronic Devices and Circuits Lecture 18 Single Transistor Amplifier Stages Outline Announcements Handouts Lecture Outline and Summary Notes on Single Transistor Amplifiers Exam 2 Wednesday night, November 5, Room 10250 Closed book; formula sheet provided; one crib sheet permitted Review Biasing and amplifier metrics Current mirrors in emitter and source circuits Performance metrics: gains (voltage, current, power); input and output resistances; power dissipation; bandwidth Midband analysis Biasing capacitors: short circuits above w LO Device capacitors: open circuits below w HI Midband: w LO < w < w HI Buildingblock stages Common emitter/source Common base/gate Emitter/source follower Series feedback Shunt feedback (also called common collector/drain) (more commonly: emitter/source degeneration) Clif Fonstad, 11/03 Lecture 18 Slide 1
Linear amplifier performance metrics: The characteristics of linear amplifiers that we use to compare different amplifier designs, and to judge their performance and suitability for a given application are given below: i in i out Linear Amplifier Rest of circuit Voltage gain, A v = / Current gain, A i = i out /i in Power gain, A power = P out /P in = i out / i in = A v A i Input resistance, r in = /i in i test Linear Amplifier v test Output resistance, r out = v test /i test with = 0 DC Power dissipation, P DC = (V V )(S 's) Clif Fonstad, 11/03 Lecture 18 Slide 2
Linear equivalent circuits: pn diodes: g d a C d g d = q I D /kt C d = g d t d C dpl (V AB ) BJTs: (in FAR) b e g p v p MOSFETs: g v gs C gd Cp C m g m v p (in saturation) C gs g m v gs g mb v bs g o s s v bs C db C sb b b C gb g o g m = q I C /kt g p = g m /b F g o = I C /V A [or l I C ] C p = g m t b C dpl,be (V BE ) [t b = w B2 /2D e ] C m = C dpl,bc (V BC ) g m = K(V GS V T ) = (2K I D ) 1/2 g mb = hg m [h = {e Si qn A /2( 2f p V BS )} 1/2 /C ox* ] g o = I D /V A [or l I D ] C gs = (2/3) WL C ox * C gd : GD fringing and overlap capacitance, all parasitic C sb, C gb, C db : depletion capacitances Clif Fonstad, 11/03 Lecture 18 Slide 3 c e d v ds
BJTs and MOSFETs biased for linear amplifier applications V V V V V V V V npn pnp nmos pmos Clif Fonstad, 11/03 Lecture 18 Slide 4
Examples of current mirror biased BJT circuits: V V V R REF Q 1 I C R REF Q 1 I C V Above: Concept Right: Implementations Q 2 Q 3 V BJT Mirror I C (A Q3 /A Q2 ) I REF Q 2 Q 3 V MOSFET Mirror I C (K Q3 /K Q2 ) I REF Clif Fonstad, 11/03 Lecture 18 Slide 5
Looking at a complicated circuit: Lesson I Find the biasing circuitry and represent it symbolically Consider the following example: 1.5 V Q 1 A Q 2 Q 3 Q 4 Q 5 Q 8 Q 10 Q 11 A Q 23 Q 9 5 R 1 B v IN1 B Q 7 Q 6 Q 19 v IN2 B R 2 R 3 Q 12 Q 13 Q 14 Q 15 Q 20 B Q B 21 Q B 22 Q 24 Q 16 Q 17 v OUT Q 18 1 2 3 4 6 Circuitry providing the V REF 's 1.5 V 8 of the 24 transistors are "only" used for biasing the other 16 transistors! If we get them out of the picture for awhile, the circuit looks simpler: Clif Fonstad, 11/03 Lecture 18 Slide 6
Looking at a complicated circuit: Lesson I, cont. segregating out the biasing circuitry Indicating the current sources symbolically lets you focus on the action: 1.5 V Q 2 Q 3 Q 4 Q 5 Q 8 Q 10 Q 11 5 Q 9 v IN1 Q 6 Q 7 R 2 R 3 Q 12 Q 13 v IN2 Q 14 Q 15 Q 16 Q 17 v OUT 1 2 3 4 6 1.5 V 16 transistors left. In Lessons II and III we reduce the number to 5! Stay tuned Clif Fonstad, 11/03 Lecture 18 Slide 7
Three BJT singletransistor amplifiers V V V V COMMON EMITTER Input: base Output: collector Common: emitter V I C BIAS I V v IN COMMON BASE Input: emitter Output: collector Common: base EMITT ER FOLLOWER
Three MOSFET singletransistor amplifiers V V V V COMMON SOURCE Input: gate Output: drain Common: source Substrate: to source V C I v IN COMMON GATE Input: source; Output: drain Common: gate; Substrate: to ground V SOURCE FOLLOWER
Singletransistor amplifiers with feedback V V R F R F V Series feedback also termed "emitter degeneration" R F Shunt feedback Clif Fonstad, 11/03 Lecture 18 Slide 10 R F V
The "midband"concept: frequency range of constant gain and phase V V v t Common emitter example: The linear equivalent circuit for the common emitter amplifier stage on the left is drawn below with all of the elements included: r t g p gm v p g o v p C p C m g LOAD gnext r IBIAS The capacitors are one of two types: Biasing capacitors: typically very large (in µf range) (,, etc.) effectively shorts above some w LO Device capacitors: typically very small (in pf range) (C p, C m, etc.) effectively open until some w HI Clif Fonstad, 11/03 Lecture 18 Slide 11
The "midband"concept, cont.: At frequencies above some value ( w LO ) The biasing capacitors look like shorts: v t r t g p gm v p g o v p C p C m g LOAD gnext r IBIAS At frequencies below some other value ( w HI ) The parasitic capacitors look like open circuits: v t r t g p gm v p g o v p C p C m g LOAD gnext r IBIAS Clif Fonstad, 11/03 Lecture 18 Slide 12
The "midband"concept, cont.: If w LO < w HI, then there is a range where all of the capacitors are either short circuits (the biasing capacitors) or open circuits (the parasitics). v t r t g p gm v p g o v p C p C m g LOAD gnext r IBIAS We call the frequency range between w LO and w HI the "midband" range; for frequencies in this range our model is simply: r t g p v t v p g m v p g o Valid for w LO < w< w HI, i.e. in the "midband" range. [where all bias capacitors are shorts and all parasitic capacitors are open] g l (= g LOAD g next ) Clif Fonstad, 11/03 Lecture 18 Slide 13
Common emitter/source amplifiers Common emitter V v t r t v g p in v p g m v p g o g l Midband LEC for common emitter g l : conductance of "LOAD" and anything connected at " " BJT MOSFET A v : g m /(g o g l ) g m /(g o g l ) g m (R o r l ) g m (R o r l ) V A i : b g l /(g o g l ) @ b R in : r p R out : 1/g o = r o 1/g o = r o A good workhorse gain stage Clif Fonstad, 11/03 Lecture 18 Slide 14
Common base/gate amplifiers V Common gate Midband LEC for common gate g l : conductance of "LOAD" and anything connected at " " C I The conductance of can be neglected. BJT MOSFET v IN v t r t (g m g mb )v sg A v : (g m g o )/(g l g o ) (g m g mb g o )/(g l g o ) @ g m (r l r o ) @ (g m g mb )(r l r o ) V A i : (g m g o )/(g m g o g p g p g o /g l ) 1 @ 1 R in : [g m g p g o (g l g m )/(g l g o )] 1 [g m g mb g o (g l g m g mb )/(g l g o )] 1 @ 1/(g m g p ) = r p /(b1) @ 1/(g m g mb ) R out : r o [1 (g m g o )/(g p g t )] r o [1 (g m g mb g o )/g t ] @ (b1)r o A very low R in, large R out stage often used to complement other stages Clif Fonstad, 11/03 Lecture 18 Slide 15 g o g l = v sg
Emitter/source followers Emitter Follower V V A great output buffer stage with small R out, big R in v t r t Midband LEC for emitter follower g l : conductance of " " and anything connected at " " BJT g p v p g m v p g o MOSFET A v : 1/[1 (g o g l )/(g m g p )] 1/[1 (g o g l )/g m ] @ 1 @ 1 A i : b g l /(g o g l ) R in : 1/g p (b1)/(g o g l ) = r p (b1) r o r l R out : [g o g l (g m g p )/(1 g p r t )] 1 [g o g l g m ] 1 @ (r t r p )/(b1) @ 1/g m Clif Fonstad, 11/03 Lecture 18 Slide 16 g l
Series Feedback: emitter/source degeneration Emitter degeneration V v t r t v g p in v p g m v p g o g l R F R F Midband LEC emitter degeneration g l : conductance of "LOAD" and anything connected at " " BJT MOSFET A v : @ r l /R F @ r l /R F A i : @ b R in : @ r p (b1)r F V R out : @ 1/g o @ 1/g o Useful in discrete device circuit design; we use to understand commonmode gain suppression in differential amplifiers Clif Fonstad, 11/03 Lecture 18 Slide 17
Feedback: shunt feedback element Shunt feedback R F V V v t r t v g p in v p g m v p g o g l Midband LEC for a shunted commonemitter g l : conductance of "LOAD" and anything connected at " " BJT MOSFET A v : (g m G F )/(g o G F ) (g m G F )/(g o G F ) @ g m R F @ g m R F A i : @ g l /G F @ g l /G F R in : 1/[g p G F (1A v )] R F /(1A v ) @ r p R F /(1A v ) R out : @ (r o R F ) @ (r o R F ) Used to stabilize high gain circuits and in transimpedance amplifiers; the same topology leads to the Miller effect (Lec. 24). Clif Fonstad, 11/03 Lecture 18 Slide 18 R F
Summary of the stages (bipolar) Common emitter Common base Emitter follower Emitter degeneration (series feedback) Shunt feedback Voltage gain, A v g m [ ] g o g l Current gain, A i ( = g m r l ') b g l g o g l [ ] g m r ( = g [ g o g l ] m r l ') ª1 ª p [ b 1] [ g m g p ] [ ] ª1 b g l [ ] ª b r p b 1 g m g p g o g l g G m F g o G F g o g l Input resistance, R i Output resistance, R o r p r o Ê = 1 ˆ Á Ë g o ª [ b 1]r o [ ]r ' ª r r t p l b 1 [ ] ª r l ª b ª r p [ b 1]R F ª r o R F [ ] [ ] ª g mr F g l [ ] 1 G F g p G F 1 A v Ê r o R F Á = Ë 1 [ ] g o G F ˆ Clif Fonstad, 11/03 Lecture 18 Slide 19
6.012 Electronic Devices and Circuits Lecture 18 Single Transistor Amplifier Stages Summary Midband analysis Biasing capacitors: typically in mf range should/can be avoided completely in modern IC design (w LO = 0) Device capacitors: typically in pf range; goal is to make as small as possible Midband: no capacitors in incremental analysis; gain and phase constant want as wide as possible (we won't find w LO and w HI until Lec. 22) Buildingblock stages Common emitter/source: good voltage and current gain large R in and R out good gain stage Common base/gate: very small R in ; very large R out unity current gain; good voltage gain will find paired with other stages to form "cascode" Emitter/source follower: very small R out ; very large R in unity voltage gain; good current gain an excellent output stage or buffer Series feedback: moderate voltage gain dependant on ratio of resistors Shunt feedback: used in transimpedance amplifiers Clif Fonstad, 11/03 Lecture 18 Slide 20