ECE 44 Microwav Fundamntals Lctur 08: Powr Dividrs and Couplrs Part Prpard By Dr. hrif Hkal 4/0/08
Microwav Dvics 4/0/08
Microwav Dvics 4/0/08
Powr Dividrs and Couplrs Powr dividrs, combinrs and dirctional couplrs ar passiv structurs that divid RF input powr among svral outputs or combin powr from svral inputs. Powr Dividrs and Combinrs Usd to split input powr into roughly qual outputs, or vic vrsa. Dirctional Couplrs Usd to sampl a fraction of input powr and/or to sparat forward and rvrs travling wavs. 4/0/08 4
Powr Dividrs and Couplrs Ths ar xampls of a thr-port ntwork. A powr dividr is usd to split a signal. P P P P P A couplr/combinr is usd to combin a signal. P P P P P Goal: Distribut powr from on input among svral outputs, or combin powr from svral inputs to on output. Problms for RF and microwav dsigns Impdanc match Isolation Phas rlationships among signals 4/0/08 5
Thr Port Ntworks Gnral -port ntwork: 4/0/08 6
Thr Port Ntworks (cont.) If all thr ports ar matchd, and th dvic is rciprocal and losslss, w hav: 0 0 0 (Th matrix is also unitary.) (Thr ar thr distinct valus.) This is not physically possibl! (s nxt slid) 4/0/08 7
Powr Dividrs and Couplrs (cont.) 0 0 0 Unitary: not physically possibl Losslss [] is unitary Ths cannot all b satisfid. (If only on is nonzro, w cannot satisfy all thr.) 4/0/08 0 0 0 At last of,, must b zro. (If only on is zro (or non is zro), w cannot satisfy all thr.) 8
Unitary Matrix It can b don in an asy way: Th dot product of any column of [] with th conjugat of that column givs unity. Th dot product of any column with th conjugat of a diffrnt column givs zro (orthogonal). 4/0/08 9
Circulators Now considr a -port ntwork that is non-rciprocal, with all ports matchd, and is losslss: 0 0 0 (Thr ar six distinct valus.) Circulator Ths quations will b satisfid if: Losslss 0 4/0/08 0 0 0 or Not that ij ji. 0 0
Circulators (cont.) 0 0 0 0 0 0 Not: W hav assumd hr that th phass of all th paramtrs ar zro. Clockwis (LH) circulator 0 0 0 0 0 0 Circulators can b mad using biasd frrit matrials. 4/0/08 Countr-clockwis (RH) circulator
Powr Dividrs T-Junction: losslss dividr Y in 0 0 Y in 0 0 To match: Not, howvr, Y 0 0 0 in 0 0 0 0 Thus, Yi n Also, Y 0 Y in 0 0 0 0 0 0 0 0 00 0 00 0 0 in 0 0 4/0/08 If w match at port, w cannot match at th othr ports!
Powr Dividrs (cont.) Assuming port matchd: P 0 0 0 0 0 0 in 0 0 0 out in in in 0 0 0 0 P P P K P 0 0 out in in in 0 0 0 0 P P P K P 0 0 4/0/08 W can dsign th splittr to control th powrs into th two output lins.
Powr Dividrs (cont.) Examin th rflction at ach port ( ii ): 0 / 0 / 0 a a 0 aa0 0 0 in 0 0 0 0 in 0 0 0 0 a a 0 a a 0 0 0 0 0 0 0 0 0 0 0 0 0 4/0/08 zro if port is matchd Not: A match on port rquirs 0 0 0 0 (sinc th two output lins combin in paralll) 0, 0 4
Powr Dividrs (cont.) Also, w hav: 0 0 a a 0 0 0 0 ; / / 0 0 imilarly, and 0 0 0 0 4/0/08 5
Powr Dividrs (cont.) If port is matchd: 0 0 0 0 0 0 ; ; 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Only 0 4/0/08 Th output ports ar not isolatd. 6
Output powrs: Powr Dividrs (cont.) P 0 P 0 0 P 0 P 0 0 Not: P is th input powr on port. Hnc P P 0 0 Chck : P P P P P P 0 0 0 0 0 0 4/0/08 7
Powr Dividrs (cont.) ummary 0 0 0 0 0 0 0 P P 0 0 0; ; 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4/0/08 0 0 0 Th input port is matchd, but not th output ports. Th output ports ar not isolatd. Wavs rflctd from dvics on ports and with caus intrfrnc with th dvics. 8
Powr Dividrs (cont.) Exampl: Microstrip T-junction powr dividr 0 0 50 [ ] Incidnt 0 00 [ ] 0 0 0 0 50 00. [ ] 0 00 [ ] 4/0/08 9
Powr Dividrs (cont.) Th matchd powr dividr also works as a match powr combinr 0 0 50 [ ] 0 00 [ ] Incidnt 0 0 0 0 50 00. [ ] 0 00 [ ] b a a 0 a Equal wavs ar incidnt from ports and. 4/0/08 0
Rsistiv Powr Dividr in 4 4 0 0 0 0 0 (Th sam for in and in.) 0 0 in 0 0 0 0 0 All ports ar matchd. 0 4/0/08
Rsistiv Powr Dividr (cont.) 0 0 a a 0 0 0 0 0 0 0 4 0 in 0 0 0 By rciprocity and symmtry 0 0 4/0/08
Rsistiv Powr Dividr (cont.) Hnc w hav 0 0 0 P P a in 0 0 in 0 0 0 0 0 P P P b a P P 4 in All ports ar matchd, but / P in is dissipatd by rsistors, and th output ports ar not isolatd. 4/0/08
Evn-Odd Mod Analysis (This is ndd for analyzing th Wilkinson) Exampl: W want to solv for. W do this using vn/odd mod analysis. (This works bcaus th circuit itslf is symmtric.) Corrct answr : 4/0/08 4
Evn-Odd Mod Analysis Lt o Plan of symmtry o o o Evn problm Odd problm o 4/0/08 5
Evn-Odd Mod Analysis (cont.) Evn problm PO I 0 4 4 4 4 4 4/0/08 6
Evn-Odd Mod Analysis (cont.) Odd problm o o o o 0 4 4 hort circuit (C) plan of symmtry 4 o o 0 4/0/08 7
Evn-Odd Mod Analysis (cont.) By suprposition: o 0 Hnc w hav 4/0/08 8
Wilkinson Powr Dividr Equal-split ( db) powr dividr (Th Wilkinson can b dsignd to hav an unqual split.) g / 4 0 0 0 0 All ports matchd ( = = = 0) Output ports ar isolatd ( = = 0) g / 4 0 0 Not: No powr is lost in going from port to ports and. 0 j 0 0 0 0 4/0/08 Obviously not unitary 9
Wilkinson Powr Dividr (cont.) Exampl: Microstrip Wilkinson powr dividr 0 50 [ ] 0 50 [ ] 0T 70.7 [ ] 0T 70.7 [ ] R 00 [ ] 0 50 [ ] 4/0/08 0
Wilkinson Powr Dividr (cont.) Evn and odd analysis is usd to analyz th structur whn port is xcitd. To dtrmin, Only vn analysis is ndd to analyz th structur whn port is xcitd. To dtrmin, Th othr componnts can b found by using symmtry and rciprocity. 4/0/08
Wilkinson Powr Dividr (cont.) Top viw 0 / 4 g g 0 / 4 0 0 Plan of symmtry 0 0 A microstrip ralization is shown. plit structur along plan of symmtry (PO) Evn voltag vn about PO plac OC along PO Odd voltag odd about PO plac C along PO 4/0/08
Wilkinson Powr Dividr (cont.) 0 / 4 0 g g 0 / 4 0 0 0 How do you split a transmission lin? (This is ndd for th vn cas.) Top viw I / 0 oltag is th sam for ach half of lin () Currnt is halvd for ach half of lin (I/) I / (magntic wall) I h 0 0 0 microstrip lin 4/0/08 For ach half
Wilkinson Powr Dividr (cont.) Evn Problm g / 4 0 Not: Th 0 rsistor has bn split into two 0 rsistors in sris. 0 0 0 0 OC Ports and ar xcitd in phas. OC 0 0 g / 4 0 4/0/08 Not : 4
Wilkinson Powr Dividr (cont.) Odd problm g / 4 0 o 0 0 o Not: Th 0 rsistor has bn split into two 0 rsistors in sris. 0 o o Ports and ar xcitd 80 o out of phas. 0 0 0 g / 4 o 0 o 4/0/08 Not : 0, o o o 5
Wilkinson Powr Dividr (cont.) Evn Problm Port xcitation g / 4, in 0 Port 0 0 OC 0 in 0 0 in 0 in 0 0 Rcall: in T (quartr-wav transformr) L Also, by symmtry, 0 4/0/08 6
Wilkinson Powr Dividr (cont.) Odd Problm Port xcitation g / 4 0 o, o o in 0 0 o Port 0 o o 0 hort o in 0 0 o o in 0 o in 0 0 4/0/08 Also, by symmtry, o 0 7
Wilkinson Powr Dividr (cont.) W add th rsults from th vn and odd cass togthr: a a 0 o o o 0 0 0 0 (by symmtry) a a 0 o o o 0 0 0 0 (by rciprocity) Not: inc all ports hav th sam 0, w ignor th normalizing factor 0 in th paramtr dfinition. 4/0/08 In summary, for port xcitation, w hav: 0 0 0 8
Wilkinson Powr Dividr (cont.) Port xcitation Port g / 4 0 0 g / 4 0 0 0 0 Whn port is xcitd, th rspons, by symmtry, is vn. (Hnc, th total filds ar th sam as th vn filds.) 4/0/08 9
Wilkinson Powr Dividr (cont.) Evn Problm Port 0 g / 4 0 0 0 0 0 O.C. symmtry plan 0 g / 4 0 OC 0 g / 4 4/0/08 40
Wilkinson Powr Dividr (cont.) Evn Problm Port xcitation Port 0 g / 4 0 OC 0 0 in 0 0 in 0 in 0 0, in Hnc a a 0 a 0 0 0 4/0/08 4
Wilkinson Powr Dividr (cont.) Evn Problm Port xcitation a a 0 Port 0 g / 4 0 0 z OC j j 4/0/08 j (rciprocal) Along g /4 wav transformr: jz jz 0 z z 0 0 g /4 j 0 0 0 0 0 distanc from port 4
Wilkinson Powr Dividr (cont.) For th othr componnts: By symmtry: j By rciprocity: j 4/0/08 4
Wilkinson Powr Dividr (cont.) 0 j 0 0 0 0 g / 4 0 0 0 0 0 g / 4 0 0 0 All thr ports ar matchd, and th output ports ar isolatd. 4/0/08 44
Wilkinson Powr Dividr (cont.) 0 j 0 0 0 0 g / 4 0 0 j 0 0 g / 4 0 0 j Whn a wav is incidnt from port, half of th total incidnt powr gts transmittd to ach output port (no loss of powr). Whn a wav is incidnt from port or port, half of th powr gts transmittd to port and half gts absorbd by th rsistor, but nothing gts through to th othr output port. 4/0/08 45
Wilkinson Powr Dividr (cont.) Figur 7.5 of Pozar Photograph of a four-way corporat powr dividr ntwork using thr microstrip Wilkinson powr dividrs. Not th isolation chip rsistors. Courtsy of M.D. Abouzahra, MIT Lincoln Laboratory. 4/0/08 46
Wilkinson Powr Dividr (cont.) Figur 7. of Pozar Frquncy rspons of an qual-split Wilkinson powr dividr. Port is th input port; ports and ar th output ports. 4/0/08 47