74HC123; 74HCT123. Dual retriggerable monostable multivibrator with reset

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Product data sheet 1. General description 2. Features The are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The are dual retriggerable monostable multivibrators with output pulse width control by three methods: 1. The basic pulse time is programmed by selection of an external resistor (R EXT ) and capacitor (C EXT ). 2. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (na) or the active HIGH-going edge input (nb). By repeating this process, the output pulse period (nq = HIGH, nq = LOW) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input nrd, which also inhibits the triggering. 3. An internal connection from nrd to the input gates makes it possible to trigger the circuit by a HIGH-going signal at input nrd as shown in the function table. Schmitt-trigger action in the na and nb inputs, makes the circuit highly tolerant to slower input rise and fall times. The is identical to the 74HC423; 74HCT423 but can be triggered via the reset input. DC triggered from active HIGH or active LOW inputs Retriggerable for very long pulses up to 100 % duty factor Direct reset terminates output pulse Schmitt-trigger action on all inputs except for the reset input ESD protection: HBM EIA/JESD22-A114-C exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V Specified from 40 C to+85 C and from 40 C to +125 C

3. Ordering information Table 1. Type number Ordering information Package Temperature range Name Description Version 74HC123 74HC123N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil); long body 74HC123D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm 74HC123DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm 74HC123PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm 74HC123BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 3.5 0.85 mm 74HCT123 74HCT123N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil); long body 74HCT123D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm 74HCT123DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm 74HCT123PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT38-1 SOT109-1 SOT338-1 SOT403-1 SOT763-1 SOT38-1 SOT109-1 SOT338-1 SOT403-1 Product data sheet 2 of 28

7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V CC supply voltage 0.5 +7 V I IK input clamping current V I < 0.5 V or V I >V CC + 0.5 V - ±20 ma I OK output clamping current V O < 0.5 V or V O >V CC + 0.5 V - ±20 ma I O output current except for pins nrext/cext; V O = 0.5 V to (V CC + 0.5 V) [1] For DIP16 package: P tot derates linearly with 12 mw/k above 70 C. [2] For SO16 package: P tot derates linearly with 8 mw/k above 70 C. [3] For SSOP16 and TSSOP16 packages: P tot derates linearly with 5.5 mw/k above 60 C. [4] For DHVQFN16 package: P tot derates linearly with 4.5 mw/k above 60 C. 8. Recommended operating conditions - ±25 ma I CC quiescent supply current - 50 ma I GND ground current - 50 ma T stg storage temperature 65 +150 C P tot total power dissipation DIP16 package [1] - 750 mw SO16 package [2] - 500 mw SSOP16 package [3] - 500 mw TSSOP16 package [3] - 500 mw DHVQFN16 package [4] - 500 mw Table 5. Recommended operating conditions 74HC123 V CC supply voltage 2.0 5.0 6.0 V V I input voltage 0 - V CC V V O output voltage 0 - V CC V t r, t f input rise and fall time nrd input V CC = 2.0 V - - 1000 ns V CC = 4.5 V - 6.0 500 ns V CC = 6.0 V - - 400 ns T amb ambient temperature 40 +25 +125 C 74HCT123 V CC supply voltage 4.5 5.0 5.5 V V I input voltage 0 - V CC V V O output voltage 0 - V CC V t r, t f input rise and fall time nrd input; V CC = 4.5 V - 6.0 500 ns T amb ambient temperature 40 +25 +125 C Product data sheet 7 of 28

9. Static characteristics Table 6. Static characteristics 74HC123 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). T amb =25 C V IH HIGH-state input voltage V CC = 2.0 V 1.5 1.2 - V V CC = 4.5 V 3.15 2.4 - V V CC = 6.0 V 4.2 3.2 - V V IL LOW-state input voltage V CC = 2.0 V - 0.8 0.5 V V CC = 4.5 V - 2.1 1.35 V V CC = 6.0 V - 2.8 1.8 V V OH HIGH-state output voltage V I =V IH or V IL I O = 20 µa; V CC = 2.0 V 1.9 2.0 - V I O = 20 µa; V CC = 4.5 V 4.4 4.5 - V I O = 20 µa; V CC = 6.0 V 5.9 6.0 - V I O = 4 ma; V CC = 4.5 V 3.98 4.32 - V I O = 5.2 ma; V CC = 6.0 V 5.48 5.81 - V V OL LOW-state output voltage V I =V IH or V IL I O =20µA; V CC = 2.0 V - 0 0.1 V I O =20µA; V CC = 4.5 V - 0 0.1 V I O =20µA; V CC = 6.0 V - 0 0.1 V I O = 4 ma; V CC = 4.5 V - 0.15 0.26 V I O = 5.2 ma; V CC = 6.0 V - 0.16 0.26 V I LI input leakage current V I =V CC or GND; V CC = 6.0 V - - ±0.1 µa I CC quiescent supply current V I =V CC or GND; I O = 0 A; V CC = 6.0 V - - 8.0 µa C i input capacitance - 3.5 - pf T amb = 40 C to +85 C V IH HIGH-state input voltage V CC = 2.0 V 1.5 - - V V CC = 4.5 V 3.15 - - V V CC = 6.0 V 4.2 - - V V IL LOW-state input voltage V CC = 2.0 V - - 0.5 V V CC = 4.5 V - - 1.35 V V CC = 6.0 V - - 1.8 V V OH HIGH-state output voltage V I =V IH or V IL I O = 20 µa; V CC = 2.0 V 1.9 - - V I O = 20 µa; V CC = 4.5 V 4.4 - - V I O = 20 µa; V CC = 6.0 V 5.9 - - V I O = 4 ma; V CC = 4.5 V 3.84 - - V I O = 5.2 ma; V CC = 6.0 V 5.34 - - V Product data sheet 8 of 28

Table 6. Static characteristics 74HC123 continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). V OL LOW-state output voltage V I =V IH or V IL I O =20µA; V CC = 2.0 V - - 0.1 V I O =20µA; V CC = 4.5 V - - 0.1 V I O =20µA; V CC = 6.0 V - - 0.1 V I O = 4 ma; V CC = 4.5 V - - 0.33 V I O = 5.2 ma; V CC = 6.0 V - - 0.33 V I LI input leakage current V I =V CC or GND; V CC = 6.0 V - - ±1.0 µa I CC quiescent supply current V I =V CC or GND; I O = 0 A; V CC = 6.0 V - - 80 µa T amb = 40 C to +125 C V IH HIGH-state input voltage V CC = 2.0 V 1.5 - - V V CC = 4.5 V 3.15 - - V V CC = 6.0 V 4.2 - - V V IL LOW-state input voltage V CC = 2.0 V - - 0.5 V V CC = 4.5 V - - 1.35 V V CC = 6.0 V - - 1.8 V V OH HIGH-state output voltage V I =V IH or V IL I O = 20 µa; V CC = 2.0 V 1.9 - - V I O = 20 µa; V CC = 4.5 V 4.4 - - V I O = 20 µa; V CC = 6.0 V 5.9 - - V I O = 4 ma; V CC = 4.5 V 3.7 - - V I O = 5.2 ma; V CC = 6.0 V 5.2 - - V V OL LOW-state output voltage V I =V IH or V IL I O =20µA; V CC = 2.0 V - - 0.1 V I O =20µA; V CC = 4.5 V - - 0.1 V I O =20µA; V CC = 6.0 V - - 0.1 V I O = 4 ma; V CC = 4.5 V - - 0.4 V I O = 5.2 ma; V CC = 6.0 V - - 0.4 V I LI input leakage current V I =V CC or GND; V CC = 6.0 V - - ±1.0 µa I CC quiescent supply current V I =V CC or GND; I O = 0 A; V CC = 6.0 V - - 160 µa Table 7. Static characteristics 74HCT123 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). T amb =25 C V IH HIGH-state input voltage V CC = 4.5 V to 5.5 V 2.0 1.6 - V V IL LOW-state input voltage V CC = 4.5 V to 5.5 V - 1.2 0.8 V V OH HIGH-state output voltage V I =V IH or V IL ; V CC = 4.5 V I O = 20 µa 4.4 4.5 - V I O = 4 ma 3.98 4.32 - V Product data sheet 9 of 28

Table 7. Static characteristics 74HCT123 continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). V OL LOW-state output voltage V I =V IH or V IL ; V CC = 4.5 V I O =20µA - 0 0.1 V I O = 4.0 ma - 0.15 0.26 V I LI input leakage current V I =V CC or GND; V CC = 5.5 V - - ±0.1 µa I CC quiescent supply current V I =V CC or GND; I O = 0 A; V CC = 5.5 V - - 8.0 µa I CC additional quiescent supply current per input pin; V I =V CC 2.1 V and other inputs at V CC or GND; I O =0A; V CC = 4.5 V to 5.5 V pins na, nb - 35 125 µa pin nrd - 50 180 µa C i input capacitance - 3.5 - pf T amb = 40 C to +85 C V IH HIGH-state input voltage V CC = 4.5 V to 5.5 V 2.0 - - V V IL LOW-state input voltage V CC = 4.5 V to 5.5 V - - 0.8 V V OH HIGH-state output voltage V I =V IH or V IL ; V CC = 4.5 V I O = 20 µa 4.4 - - V I O = 4.0 ma 3.84 - - V V OL LOW-state output voltage V I =V IH or V IL ; V CC = 4.5 V I O =20µA - - 0.1 V I O = 4.0 ma - - 0.33 V I LI input leakage current V I =V CC or GND; V CC = 5.5 V - - ±1.0 µa I CC quiescent supply current V I =V CC or GND; I O = 0 A; V CC = 5.5 V - - 80 µa I CC additional quiescent supply current per input pin; V I =V CC 2.1 V and other inputs at V CC or GND; I O =0A; V CC = 4.5 V to 5.5 V pins na, nb - - 160 µa pin nrd - - 225 µa T amb = 40 C to +125 C V IH HIGH-state input voltage V CC = 4.5 V to 5.5 V 2.0 - - V V IL LOW-state input voltage V CC = 4.5 V to 5.5 V - - 0.8 V V OH HIGH-state output voltage V I =V IH or V IL ; V CC = 4.5 V I O = 20 µa 4.4 - - V I O = 4 ma 3.7 - - V V OL LOW-state output voltage V I =V IH or V IL ; V CC = 4.5 V I O =20µA - - 0.1 V I O = 4.0 ma - - 0.4 V I LI input leakage current V I =V CC or GND; V CC = 5.5 V - - ±1.0 µa I CC quiescent supply current V I =V CC or GND; I O = 0 A; V CC = 5.5 V - - 160 µa Product data sheet 10 of 28

Table 7. Static characteristics 74HCT123 continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). I CC additional quiescent supply current 10. Dynamic characteristics per input pin; V I =V CC 2.1 V and other inputs at V CC or GND; I O =0A; V CC = 4.5 V to 5.5 V pins na, nb - - 170 µa pin nrd - - 245 µa Table 8. Dynamic characteristics 74HC123 Voltages are referenced to GND (ground = 0 V); C L = 50 pf unless otherwise specified. For test circuit see Figure 12. T amb = 25 C t PHL, t PLH propagation delay C EXT = 0 pf; R EXT = 5 kω; see Figure 9 nrd, na, nb to nq or nq V CC = 2.0 V - 83 255 ns V CC = 4.5 V - 30 51 ns V CC = 5 V; C L = 15 pf - 26 - ns V CC = 6.0 V - 24 43 ns nrd (reset) to nq or nq V CC = 2.0 V - 66 215 ns V CC = 4.5 V - 24 43 ns V CC = 5 V; C L = 15 pf - 20 - ns V CC = 6.0 V - 19 37 ns t THL, t TLH output transition time see Figure 9 V CC = 2.0 V - 19 75 ns V CC = 4.5 V - 7 15 ns V CC = 6.0 V - 6 13 ns t W pulse width na LOW see Figure 10 V CC = 2.0 V 100 8 - ns V CC = 4.5 V 20 3 - ns V CC = 6.0 V 17 2 - ns nb HIGH see Figure 10 V CC = 2.0 V 100 17 - ns V CC = 4.5 V 20 6 - ns V CC = 6.0 V 17 5 - ns nrd LOW see Figure 11 V CC = 2.0 V 100 14 - ns V CC = 4.5 V 20 5 - ns V CC = 6.0 V 17 4 - ns nq HIGH and nq LOW V CC = 5.0 V; see Figure 10 and 11 [1] C EXT = 100 nf; R EXT = 10 kω - 450 - µs C EXT = 0 pf; R EXT = 5 kω - 75 - ns Product data sheet 11 of 28

Table 8. Dynamic characteristics 74HC123 continued Voltages are referenced to GND (ground = 0 V); C L = 50 pf unless otherwise specified. For test circuit see Figure 12. t rt retrigger time na, nb C EXT = 0 pf; R EXT = 5 kω; V CC = 5.0 V; see Figure 10 R EXT external timing resistor see Figure 7 [2][3] - 110 - ns V CC = 2.0 V 10-1000 kω V CC = 5.0 V 2-1000 kω C EXT external timing capacitor V CC = 5.0 V; see Figure 7 [3] no limits pf C PD power dissipation capacitance per monostable [4][5] - 54 - pf T amb = 40 C to +85 C t PHL, t PLH propagation delay C EXT = 0 pf; R EXT = 5 kω; see Figure 9 nrd, na, nb to nq or nq V CC = 2.0 V - - 320 ns V CC = 4.5 V - - 64 ns V CC = 6.0 V - - 54 ns nrd (reset) to nq or nq V CC = 2.0 V - - 270 ns t THL, t TLH output transition time see Figure 9 t W pulse width na LOW see Figure 10 nb HIGH see Figure 10 nrd LOW see Figure 11 V CC = 4.5 V - - 54 ns V CC = 6.0 V - - 46 ns V CC = 2.0 V - - 95 ns V CC = 4.5 V - - 19 ns V CC = 6.0 V - - 16 ns V CC = 2.0 V 125 - - ns V CC = 4.5 V 25 - - ns V CC = 6.0 V 21 - - ns V CC = 2.0 V 125 - - ns V CC = 4.5 V 25 - - ns V CC = 6.0 V 21 - - ns V CC = 2.0 V 125 - - ns V CC = 4.5 V 25 - - ns V CC = 6.0 V 21 - - ns Product data sheet 12 of 28

Table 8. Dynamic characteristics 74HC123 continued Voltages are referenced to GND (ground = 0 V); C L = 50 pf unless otherwise specified. For test circuit see Figure 12. T amb = 40 C to +125 C t PHL, t PLH propagation delay C EXT = 0 pf; R EXT = 5 kω; see Figure 9 nrd, na, nb to nq or nq V CC = 2.0 V - - 385 ns [1] For other R EXT and C EXT combinations see Figure 7. If C EXT > 10 nf, the next formula is valid. t W =K R EXT C EXT, where: t W = typical output pulse width in ns; R EXT = external resistor in kω; C EXT = external capacitor in pf; K = constant = 0.45 for V CC = 5.0 V and 0.55 for V CC = 2.0 V. The inherent test jig and pin capacitance at pins 15 and 7 (nrext/cext) is approximately 7 pf. [2] The time to retrigger the monostable multivibrator depends on the values of R EXT and C EXT. The output pulse width will only be extended when the time between the active-going edges of the trigger input pulses meets the minimum retrigger time. If C EXT >10 pf, the next formula (at V CC = 5.0 V) for the setup time of a retrigger pulse is valid: t rt = 30 + 0.19 R EXT C EXT 0.9 +13 R EXT 1.05, where: t rt = retrigger time in ns; C EXT = external capacitor in pf; R EXT = external resistor in kω. The inherent test jig and pin capacitance at pins 15 and 7 (nrext/cext) is 7 pf. [3] When the device is powered-up, initiate the device via a reset pulse, when C EXT <50pF. V CC = 4.5 V - - 77 ns V CC = 6.0 V - - 65 ns nrd (reset) to nq or nq V CC = 2.0 V - - 325 ns t THL, t TLH output transition time see Figure 9 t W pulse width na LOW see Figure 10 nb HIGH see Figure 10 nrd LOW see Figure 11 V CC = 4.5 V - - 65 ns V CC = 6.0 V - - 55 ns V CC = 2.0 V - - 110 ns V CC = 4.5 V - - 22 ns V CC = 6.0 V - - 19 ns V CC = 2.0 V 150 - - ns V CC = 4.5 V 30 - - ns V CC = 6.0 V 26 - - ns V CC = 2.0 V 150 - - ns V CC = 4.5 V 30 - - ns V CC = 6.0 V 26 - - ns V CC = 2.0 V 150 - - ns V CC = 4.5 V 30 - - ns V CC = 6.0 V 26 - - ns Product data sheet 13 of 28

[4] C PD is used to determine the dynamic power dissipation (P D in µw). P D =C PD V 2 CC f i + (C L V 2 CC f o ) + 0.75 C EXT V 2 CC f o +D 16 V CC where: f i = input frequency in MHz; f o = output frequency in MHz; D = duty factor in %; C L = output load capacitance in pf; V CC = supply voltage in V; C EXT = timing capacitance in pf; (C L V 2 CC f o ) sum of outputs. [5] The condition is V I = GND to V CC. Table 9. Dynamic characteristics 74HCT123 Voltages are referenced to GND (ground = 0 V); C L = 50 pf unless otherwise specified. For test circuit see Figure 12. T amb = 25 C t PHL propagation delay C EXT = 0 pf; R EXT = 5 kω; see Figure 9 nrd, na, nb to nq V CC = 4.5 V - 30 51 ns V CC = 5 V; C L =15pF - 26 - ns nrd (reset) to nq V CC = 4.5 V - 27 46 ns V CC = 5 V; C L =15pF - 23 - ns t PLH propagation delay C EXT = 0 pf; R EXT = 5 kω; see Figure 9 nrd, na, nb to nq V CC = 4.5 V - 28 51 ns V CC = 5 V; C L =15pF - 26 - ns nrd (reset) to nq V CC = 4.5 V - 23 46 ns V CC = 5 V; C L =15pF - 23 - ns t THL, t TLH output transition time V CC = 4.5 V; see Figure 9-7 15 ns t W pulse width V CC = 4.5 V na LOW see Figure 10 20 3 - ns nb HIGH see Figure 10 20 5 - ns nrd LOW see Figure 11 20 7 - ns nq HIGH and nq LOW V CC = 5.0 V; see Figure 10 and 11 [1] C EXT = 100 nf; R EXT = 10 kω - 450 - µs C EXT = 0 pf; R EXT = 5 kω - 75 - ns t rt retrigger time na, nb C EXT = 0 pf; R EXT = 5 kω; V CC = 5.0 V; [2][3] - 110 - ns see Figure 10 R EXT external timing resistor V CC = 5.0 V; see Figure 7 2-1000 kω C EXT external timing capacitor V CC = 5.0 V; see Figure 7 [3] no limits pf C PD power dissipation capacitance per monostable [4][5] - 56 - pf T amb = 40 C to +85 C t PHL propagation delay C EXT = 0 pf; R EXT = 5 kω; see Figure 9 nrd, na, nb to nq V CC = 4.5 V - - 64 ns nrd (reset) to nq V CC = 4.5 V - - 58 ns Product data sheet 14 of 28

Table 9. Dynamic characteristics 74HCT123 continued Voltages are referenced to GND (ground = 0 V); C L = 50 pf unless otherwise specified. For test circuit see Figure 12. t PLH propagation delay C EXT = 0 pf; R EXT = 5 kω; see Figure 9 nrd, na, nb to nq V CC = 4.5 V - - 64 ns nrd (reset) to nq V CC = 4.5 V - - 58 ns t THL, t TLH output transition time V CC = 4.5 V - - 19 ns t W pulse width V CC = 4.5 V T amb = 40 C to +125 C na LOW see Figure 10 25 - - ns nb HIGH see Figure 10 25 - - ns nrd LOW see Figure 11 25 - - ns t PHL propagation delay C EXT = 0 pf; R EXT = 5 kω; see Figure 9 nrd, na, nb to nq V CC = 4.5 V - - 77 ns nrd to nq (reset) V CC = 4.5 V - - 69 ns t PLH propagation delay C EXT = 0 pf; R EXT = 5 kω; see Figure 9 nrd, na, nb to nq V CC = 4.5 V - - 77 ns nrd to nq (reset) V CC = 4.5 V - - 69 ns t THL, t TLH output transition time V CC = 4.5 V - - 22 ns t W pulse width V CC = 4.5 V na LOW see Figure 10 30 - - ns nb HIGH see Figure 10 30 - - ns nrd LOW see Figure 11 30 - - ns [1] For other R EXT and C EXT combinations see Figure 7. If C EXT > 10 nf, the next formula is valid. t W =K R EXT C EXT, where: t W = typical output pulse width in ns; R EXT = external resistor in kω; C EXT = external capacitor in pf; K = constant = 0.45 for V CC = 5.0 V, see Figure 8. The inherent test jig and pin capacitance at pins 15 and 7 (nrext/cext) is approximately 7 pf. [2] The time to retrigger the monostable multivibrator depends on the values of R EXT and C EXT. The output pulse width will only be extended when the time between the active-going edges of the trigger input pulses meets the minimum retrigger time. If C EXT >10 pf, the next formula (at V CC = 5.0 V) for the setup time of a retrigger pulse is valid: t rt = 30 + 0.19 R EXT C EXT 0.9 +13 R EXT 1.05, where: t rt = typical retrigger time in ns; C EXT = external capacitor in pf; R EXT = external resistor in kω. The inherent test jig and pin capacitance at pins 15 and 7 (nrext/cext) is 7 pf. [3] When the device is powered-up, initiate the device via a reset pulse, when C EXT <50pF. Product data sheet 15 of 28

[4] C PD is used to determine the dynamic power dissipation (P D in µw). P D =C PD V 2 CC f i + (C L V 2 CC f o ) + 0.75 C EXT V 2 CC f o +D 16 V CC where: f i = input frequency in MHz; f o = output frequency in MHz; D = duty factor in %; C L = output load capacitance in pf; V CC = supply voltage in V; C EXT = timing capacitance in pf; (C L V 2 CC f o ) sum of outputs. [5] The condition is V I = GND to V CC 1.5 V. 10 6 001aaa611 0.8 001aaa612 t W (ns) 10 5 (1) (2) 'K' factor 0.6 10 4 (3) (4) 0.4 10 3 10 2 0.2 10 1 10 10 2 10 3 10 4 C EXT (pf) 0 0 2 4 6 8 V CC (V) V CC = 5.0 V; T amb = 25 C. (1) R EXT = 100 kω (2) R EXT = 50 kω (3) R EXT = 10 kω (4) R EXT = 2 kω Fig 7. Typical output pulse width as a function of the external capacitor value Fig 8. C X = 10 nf; R X = 10 kω to 100 kω 74HCT123 typical K factor as function of V CC Product data sheet 16 of 28

13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 D M E seating plane A 2 A L A 1 Z 16 e b b 1 9 w M c (e ) 1 M H pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. A 1 A 2 (1) (1) min. max. b b 1 c D E e e 1 L M E M H 4.7 0.51 3.7 0.19 0.02 0.15 1.40 1.14 0.055 0.045 0.53 0.38 0.021 0.015 0.32 0.23 0.013 0.009 21.8 21.4 0.86 0.84 6.48 6.20 0.26 0.24 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. 2.54 7.62 0.1 0.3 3.9 3.4 0.15 0.13 8.25 7.80 0.32 0.31 9.5 8.3 0.37 0.33 w 0.254 0.01 (1) Z max. 2.2 0.087 OUTLINE VERSION SOT38-1 REFERENCES IEC JEDEC JEITA 050G09 MO-001 SC-503-16 EUROPEAN PROJECTION Fig 16. Package outline SOT38-1 (DIP16) Product data sheet 21 of 28

SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y H E v M A Z 16 9 Q A 2 A 1 (A ) 3 A pin 1 index θ L p 1 8 L e b p w M detail X 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 0.25 1.75 0.10 0.069 0.010 0.004 A 1 A 2 A 3 b p c D (1) E (1) e H (1) E L L p Q v w y Z 1.45 1.25 0.057 0.049 0.25 0.01 0.49 0.36 0.019 0.014 0.25 0.19 0.0100 0.0075 10.0 9.8 0.39 0.38 4.0 3.8 0.16 0.15 1.27 6.2 5.8 0.244 0.228 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 0.05 1.05 0.041 1.0 0.4 0.039 0.016 0.7 0.6 0.028 0.020 0.25 0.25 0.1 0.01 0.01 0.004 θ 0.7 0.3 o 8 o 0.028 0 0.012 OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION SOT109-1 076E07 MS-012 Fig 17. Package outline SOT109-1 (SO16) Product data sheet 22 of 28