CD4528BC Dual Monostable Multivibrator

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Transcription:

Dual Monostable Multivibrator General Description The CD4528BC is a dual monostable multivibrator. Each device is retriggerable and resettable. Triggering can occur from either the rising or falling edge of an input pulse, resulting in an output pulse over a wide range of widths. Pulse duration and accuracy are determined by external timing components Rx and Cx. Ordering Code: Features October 1987 Revised April 2002 Wide supply voltage range: 3.0V to 18V Separate reset available Quiescent current = 5.0 na/package (typ.) at 5.0 V DC Diode protection on all inputs Triggerable from leading or trailing edge pulse Capable of driving two low-power TTL loads or one lowpower Schottky TTL load over the rated temperature range CD4528BC Dual Monostable Multivibrator Order Number Package Number Package Description CD4528BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4528BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Connection Diagram Top View Truth Table Inputs Outputs Clear A B Q Q L X X L H X H X L H X X L L H H L H H H = HIGH Level L = LOW Level = Transition from LOW-to-HIGH = Transition from HIGH-to-LOW = One HIGH Level Pulse = One LOW Level Pulse X = Irrelevant 2002 Fairchild Semiconductor Corporation DS005998 www.fairchildsemi.com

Block Diagram Logic Diagram (½ of Device Shown) Note: Externally ground pins 1 and 15 to pin 8. www.fairchildsemi.com 2

Absolute Maximum Ratings(Note 1) (Note 2) DC Supply Voltage (V DD ) 0.5 V DC to +18 V DC Input Voltage, All Inputs (V IN ) 0.5 V DC to V DD +0.5 V DC Storage Temperature Range (T S ) 65 C to +150 C Power Dissipation (P D ) Dual-In-Line 700 mw Small Outline 500 mw Lead Temperature (T L ) (Soldering, 10 seconds) 260 C Recommended Operating Conditions (Note 2) DC Supply Voltage (V DD ) 3V to 15V Input Voltage (V IN ) 0V to V DD V DC Operating Temperature Range (T A ) 55 C to +125 C Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. Except for Operating Temperature Range, they are not meant to imply that the devices should be operated at these limits. The table of Electrical Characteristics provides conditions for actual device operation. Note 2: V SS = 0V unless otherwise specified. CD4528BC DC Electrical Characteristics (Note 3) Symbol Parameter Conditions 55 C +25 C +125 C Min Max Min Typ Max Min Max I DD Quiescent Device Current V DD = 5V 5 0.005 5 150 V DD = 10V 10 0.010 10 300 V DD = 15V 20 0.015 20 600 V OL LOW Level Output Voltage V DD = 5V 0.05 0.05 0.05 V DD = 10V 0.05 0.05 0.05 V DD = 15V 0.05 0.05 0.05 V OH HIGH Level Output Voltage V DD = 5V 4.95 4.95 5.0 4.95 V DD = 10V 9.95 9.95 10.0 9.95 V DD = 15V 14.95 14.95 15.0 14.95 V IL LOW Level Input Voltage V DD = 5V, V O = 0.5V or 4.5V 1.5 2.25 1.5 1.5 V DD = 10V, V O = 1V or 9V 3.0 4.50 3.0 3.0 V DD = 15V, V O = 1.5V or 13.5V 4.0 6.75 4.0 4.0 V IH HIGH Level Input Voltage V DD = 5V, V O = 0.5V or 4.5V 3.5 3.5 2.75 3.5 V DD = 10V, V O = 1V or 9V 7.0 7.0 5.50 7.0 V DD = 15V, V O = 1.5V or 13.5V 11.0 11.0 8.25 11.0 I OL LOW Level Output Current V DD = 5V, V O = 0.4V 0.64 0.51 0.88 0.36 (Note 4) V DD = 10V, V O = 0.5V 1.6 1.3 2.25 0.9 V DD = 15V, V O = 1.5V 4.2 3.4 8.8 2.4 I OH HIGH Level Output Current V DD = 5V, V O = 4.6V 0.25 0.2 0.36 0.14 (Note 4) V DD = 10V, V O = 9.5V 0.62 0.5 0.9 0.35 V DD = 15V, V O = 13.5V 1.8 1.5 3.5 1.1 I IN Input Current V DD = 15V, V IN = 0V 0.1 10 5 0.1 1.0 V DD = 15V, V IN = 15V 0.1 10 5 0.1 1.0 Note 3: V SS = 0V unless otherwise specified. Note 4: I OH and I OL are tested one output at a time. Units µa V V V V ma ma µa 3 www.fairchildsemi.com

AC Electrical Characteristics (Note 5) T A = 25 C, C L = 50 pf, R L = 200 kω, Input t r = t f = 20 ns, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units t r Output Rise Time t r = (3.0 ns/pf) C L + 30 ns, V DD = 5.0V 180 400 t r = (1.5 ns/pf) C L + 15 ns, V DD = 10.0V 90 200 ns t r = (1.1 ns/pf) C L + 10 ns, V DD = 15.0V 65 160 t f Output Fall Time t f = (1.5 ns/pf) C L + 25 ns, V DD = 5.0V 100 200 t f = (0.75 ns/pf) C L + 12.5 ns, V DD = 10V 50 100 ns t f = (0.55 ns/pf) C L + 9.5 ns, V DD = 15.0V 35 80 t PLH Turn-Off, Turn-On Delay t PLH, t PHL = (1.7 ns/pf) C L + 240 ns, V DD = 5.0V 230 500 t PHL A or B to Q or Q t PLH, t PHL = (0.66 ns/pf) C L + 8 ns, V DD = 10.0V 100 250 ns Cx = 15 pf, Rx = 5.0 kω t PLH, t PHL = (0.5 ns/pf) C L + 65 ns, V DD = 15.0V 65 150 Turn-Off, Turn-On Delay t PLH, t PHL = (1.7 ns/pf) C L + 620 ns, V DD = 5.0V 230 500 A or B to Q or Q t PLH, t PHL = (0.66 ns/pf) C L + 257 ns, V DD = 10.0V 100 250 ns Cx = 100 pf, Rx = 10 kω t PLH, t PHL = (0.5 ns/pf) C L + 185 ns, V DD = 15.0V 65 150 t WL Minimum Input Pulse Width V DD = 5.0V 60 150 t WH A or B V DD = 10.0V 20 50 ns Cx = 15 pf, Rx = 5.0 kω V DD = 15V 20 50 Cx = 1000 pf, Rx = 10 kω V DD = 5.0V 60 150 V DD = 10.0V 20 50 ns V DD = 15.0V 20 50 PW OUT Output Pulse Width Q or Q V DD = 5.0V 550 For Cx < 0.01 µf (See Graph for Appropriate V DD Level) V DD = 10.0V 350 ns Cx = 15 pf, Rx = 5.0 kω V DD = 15.0V 300 For Cx > 0.01 µf Use V DD = 5.0V 15 29 45 PW out = 0.2 Rx Cx In [V DD V SS ] V DD = 10.0V 10 37 90 µs Cx = 10,000 pf, Rx = 10 kω V DD = 15.0V 15 42 95 t PLH Reset Propagation Delay, V DD = 5.0V 325 600 t PHL t PLH, t PHL V DD = 10.0V 90 225 ns Cx = 15 pf, Rx = 5.0 kω V DD = 15.0V 60 170 Cx = 1000 pf, Rx = 10 kω V DD = 5.0V 7.0 V DD = 10.0V 6.7 µs V DD = 15.0V 6.7 t RR Minimum Retrigger Time V DD = 5.0V 0 Cx = 15 pf, Rx = 5.0 kω V DD = 10.0V 0 V DD = 15.0V 0 Cx = 1000 pf, Rx = 10 kω V DD = 5.0V 0 ns V DD = 10.0V 0 V DD = 15.0V 0 Pulse Width Match between Circuits V DD = 5.0V 6 25 in the Same Package V DD = 10.0V 8 35 % Cx = 10,000 pf, Rx = 10 kω V DD = 15.0V 8 35 Note 5: AC parameters are guaranteed by DC correlated testing. www.fairchildsemi.com 4

Pulse Widths CD4528BC FIGURE 1. Pulse Width vs Cx FIGURE 2. Normalized Pulse Width vs Temperature 5 www.fairchildsemi.com

AC Test Circuits and Waveforms Duty Cycle = 50% FIGURE 3. Power Dissipation Test Circuit and Waveforms *Includes capacitance of probes, wiring, and fixture parasitic. Note: AC test waveforms for PG1, PG2, and PG3 in Figure 4. Input Connections Characteristics C D A B t PLH, t PHL, t r, t f, V DD PG1 V DD PW out, PW in t PLH, t PHL, t r, t f, V DD V SS PG2 PW out, PW in t PLH(R), t PHL(R), PW in PG3 PG1 PG2 FIGURE 4. AC Test Circuit www.fairchildsemi.com 6

AC Test Circuits and Waveforms (Continued) CD4528BC FIGURE 5. AC Test Waveforms 7 www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A www.fairchildsemi.com 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E CD4528BC Dual Monostable Multivibrator Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 9 www.fairchildsemi.com